[AArch64] Add ARMv8.3 PACGA instruction

[deliverable/binutils-gdb.git] / gas / config / tc-rl78.h

diff --git a/gas/config/tc-rl78.h b/gas/config/tc-rl78.h
index e2b9699ea9a82c11f744fce53bdd3da058b1f3a4..83bac240e721b8f1ad19add0be5a15bffaaed141 100644 (file)
--- a/gas/config/tc-rl78.h
+++ b/gas/config/tc-rl78.h
@@ -1,5 +1,5 @@
 /* tc-rl78.h - header file for Renesas RL78
-   Copyright (C) 2011-2015 Free Software Foundation, Inc.
+   Copyright (C) 2011-2016 Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.
 
@@ -85,3 +85,19 @@ extern void rl78_elf_final_processing (void);
 
 #define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES)  \
   ((EXP)->X_md = 0, expression (EXP), TC_PARSE_CONS_RETURN_NONE)
+
+#define TC_LINKRELAX_FIXUP(seg) ((seg->flags & SEC_CODE) || (seg->flags & SEC_DEBUGGING))
+
+/* Do not adjust relocations involving symbols in code sections,
+   because it breaks linker relaxations.  This could be fixed in the
+   linker, but this fix is simpler, and it pretty much only affects
+   object size a little bit.  */
+#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEC) \
+  (   ((SEC)->flags & SEC_CODE) != 0           \
+   || ((SEC)->flags & SEC_DEBUGGING) != 0      \
+   || ! SEG_NORMAL (SEC)                       \
+   || TC_FORCE_RELOCATION (FIX))
+
+#define DWARF2_USE_FIXED_ADVANCE_PC 1
+
+#define TC_FORCE_RELOCATION(FIX) (linkrelax)