#include "subsegs.h"
#include "struc-symbol.h"
#include "dwarf2dbg.h"
+#include "dw2gencfi.h"
#include "opcode/s390.h"
#include "elf/s390.h"
#endif
static char *default_arch = DEFAULT_ARCH;
/* Either 32 or 64, selects file format. */
-static int s390_arch_size;
-/* Current architecture. Start with the smallest instruction set. */
-static enum s390_opcode_arch_val current_architecture = S390_OPCODE_ESA;
-static int current_arch_mask = 1 << S390_OPCODE_ESA;
-static int current_arch_requested = 0;
+static int s390_arch_size = 0;
+
+static unsigned int current_mode_mask = 0;
+static unsigned int current_cpu = -1U;
/* Whether to use user friendly register names. Default is TRUE. */
#ifndef TARGET_REG_NAMES_P
as in 0d1.0. */
const char FLT_CHARS[] = "dD";
+/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
+int s390_cie_data_alignment;
+
/* The target specific pseudo-ops which we support. */
/* Define the prototypes for the pseudo-ops */
size_t md_longopts_size = sizeof (md_longopts);
/* Initialize the default opcode arch and word size from the default
- architecture name. */
+ architecture name if not specified by an option. */
static void
init_default_arch ()
{
- if (current_arch_requested)
- return;
-
if (strcmp (default_arch, "s390") == 0)
{
- s390_arch_size = 32;
- current_architecture = S390_OPCODE_ESA;
+ if (s390_arch_size == 0)
+ s390_arch_size = 32;
}
else if (strcmp (default_arch, "s390x") == 0)
{
- s390_arch_size = 64;
- current_architecture = S390_OPCODE_ESAME;
+ if (s390_arch_size == 0)
+ s390_arch_size = 64;
}
else
as_fatal ("Invalid default architecture, broken assembler.");
- current_arch_mask = 1 << current_architecture;
+
+ if (current_mode_mask == 0)
+ {
+ if (s390_arch_size == 32)
+ current_mode_mask = 1 << S390_OPCODE_ESA;
+ else
+ current_mode_mask = 1 << S390_OPCODE_ZARCH;
+ }
+ if (current_cpu == -1U)
+ {
+ if (current_mode_mask == (1 << S390_OPCODE_ESA))
+ current_cpu = S390_OPCODE_G5;
+ else
+ current_cpu = S390_OPCODE_Z900;
+ }
}
/* Called by TARGET_FORMAT. */
{
/* We don't get a chance to initialize anything before we're called,
so handle that now. */
- if (! s390_arch_size)
- init_default_arch ();
+ init_default_arch ();
return s390_arch_size == 64 ? "elf64-s390" : "elf32-s390";
}
else if (arg != NULL && strcmp (arg, "64") == 0)
s390_arch_size = 64;
+ else if (arg != NULL && strcmp (arg, "esa") == 0)
+ current_mode_mask = 1 << S390_OPCODE_ESA;
+
+ else if (arg != NULL && strcmp (arg, "zarch") == 0)
+ current_mode_mask = 1 << S390_OPCODE_ZARCH;
+
+ else if (arg != NULL && strncmp (arg, "arch=", 5) == 0)
+ {
+ if (strcmp (arg + 5, "g5") == 0)
+ current_cpu = S390_OPCODE_G5;
+ else if (strcmp (arg + 5, "g6") == 0)
+ current_cpu = S390_OPCODE_G6;
+ else if (strcmp (arg + 5, "z900") == 0)
+ current_cpu = S390_OPCODE_Z900;
+ else if (strcmp (arg + 5, "z990") == 0)
+ current_cpu = S390_OPCODE_Z990;
+ else
+ {
+ as_bad (_("invalid switch -m%s"), arg);
+ return 0;
+ }
+ }
+
else
{
as_bad (_("invalid switch -m%s"), arg);
break;
case 'A':
+ /* Option -A is deprecated. Still available for compatibility. */
if (arg != NULL && strcmp (arg, "esa") == 0)
- current_architecture = S390_OPCODE_ESA;
+ current_cpu = S390_OPCODE_G5;
else if (arg != NULL && strcmp (arg, "esame") == 0)
- current_architecture = S390_OPCODE_ESAME;
+ current_cpu = S390_OPCODE_Z900;
else
as_bad ("invalid architecture -A%s", arg);
- current_arch_mask = 1 << current_architecture;
- current_arch_requested = 1;
break;
/* -V: SVR4 argument to print version ID. */
const char *retval;
/* Give a warning if the combination -m64-bit and -Aesa is used. */
- if (s390_arch_size == 64 && current_arch_mask == (1 << S390_OPCODE_ESA))
+ if (s390_arch_size == 64 && current_cpu < S390_OPCODE_Z900)
as_warn ("The 64 bit file format is used without esame instructions.");
+ s390_cie_data_alignment = -s390_arch_size / 8;
+
/* Set the ELF flags if desired. */
if (s390_flags)
bfd_set_private_flags (stdoutput, s390_flags);
op_end = s390_opcodes + s390_num_opcodes;
for (op = s390_opcodes; op < op_end; op++)
- {
- retval = hash_insert (s390_opcode_hash, op->name, (PTR) op);
- if (retval != (const char *) NULL)
- {
- as_bad (_("Internal assembler error for instruction %s"), op->name);
- dup_insn = TRUE;
- }
- }
+ if (op->min_cpu <= current_cpu)
+ {
+ retval = hash_insert (s390_opcode_hash, op->name, (PTR) op);
+ if (retval != (const char *) NULL)
+ {
+ as_bad (_("Internal assembler error for instruction %s"),
+ op->name);
+ dup_insn = TRUE;
+ }
+ while (op < op_end - 1 && strcmp (op->name, op[1].name) == 0)
+ op++;
+ }
if (dup_insn)
abort ();
}
/* val is ok, now restrict it to operand->bits bits. */
uval = (addressT) val & ((((addressT) 1 << (operand->bits-1)) << 1) - 1);
+ /* val is restrict, now check for special case. */
+ if (operand->bits == 20 && operand->shift == 20)
+ uval = (uval >> 12) | ((uval & 0xfff) << 8);
}
else
{
if (suffix == ELF_SUFFIX_GOT)
{
- if (operand->flags & S390_OPERAND_DISP)
+ if ((operand->flags & S390_OPERAND_DISP) &&
+ (operand->bits == 12))
reloc = BFD_RELOC_390_GOT12;
+ else if ((operand->flags & S390_OPERAND_DISP) &&
+ (operand->bits == 20))
+ reloc = BFD_RELOC_390_GOT20;
else if ((operand->flags & S390_OPERAND_SIGNED)
&& (operand->bits == 16))
reloc = BFD_RELOC_390_GOT16;
if ((operand->flags & S390_OPERAND_DISP)
&& (operand->bits == 12))
reloc = BFD_RELOC_390_TLS_GOTIE12;
+ else if ((operand->flags & S390_OPERAND_DISP)
+ && (operand->bits == 20))
+ reloc = BFD_RELOC_390_TLS_GOTIE20;
}
else if (suffix == ELF_SUFFIX_TLS_IE)
{
/* After a displacement a block in parentheses can start. */
if (*str != '(')
{
- /* Check if parethesed block can be skipped. If the next
+ /* Check if parenthesized block can be skipped. If the next
operand is neiter an optional operand nor a base register
then we have a syntax error. */
operand = s390_operands + *(++opindex_ptr);
while (!(operand->flags & S390_OPERAND_BASE))
operand = s390_operands + *(++opindex_ptr);
- /* If there is a next operand it must be seperated by a comma. */
+ /* If there is a next operand it must be separated by a comma. */
if (opindex_ptr[1] != '\0')
{
if (*str++ != ',')
if (*str++ != ')')
as_bad (_("syntax error; missing ')' after base register"));
skip_optional = 0;
- /* If there is a next operand it must be seperated by a comma. */
+ /* If there is a next operand it must be separated by a comma. */
if (opindex_ptr[1] != '\0')
{
if (*str++ != ',')
as_bad (_("syntax error; ')' not allowed here"));
str++;
}
- /* If there is a next operand it must be seperated by a comma. */
+ /* If there is a next operand it must be separated by a comma. */
if (opindex_ptr[1] != '\0')
{
if (*str++ != ',')
because fixup_segment will signal an overflow for large 4 byte
quantities for GOT12 relocations. */
if ( fixups[i].reloc == BFD_RELOC_390_GOT12
+ || fixups[i].reloc == BFD_RELOC_390_GOT20
|| fixups[i].reloc == BFD_RELOC_390_GOT16)
fixP->fx_no_overflow = 1;
}
as_bad (_("Unrecognized opcode: `%s'"), str);
return;
}
- else if (!(opcode->architecture & current_arch_mask))
+ else if (!(opcode->modes & current_mode_mask))
{
- as_bad ("Opcode %s not available in this architecture", str);
+ as_bad ("Opcode %s not available in this mode", str);
return;
}
-
memcpy (insn, opcode->opcode, sizeof (insn));
md_gather_operands (s, insn, opcode);
}
|| fixP->fx_r_type == BFD_RELOC_390_PLT32DBL
|| fixP->fx_r_type == BFD_RELOC_390_PLT64
|| fixP->fx_r_type == BFD_RELOC_390_GOT12
+ || fixP->fx_r_type == BFD_RELOC_390_GOT20
|| fixP->fx_r_type == BFD_RELOC_390_GOT16
|| fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL
|| fixP->fx_r_type == BFD_RELOC_390_GOT64
|| fixP->fx_r_type == BFD_RELOC_390_GOTENT
|| fixP->fx_r_type == BFD_RELOC_390_GOTPLT12
|| fixP->fx_r_type == BFD_RELOC_390_GOTPLT16
+ || fixP->fx_r_type == BFD_RELOC_390_GOTPLT20
|| fixP->fx_r_type == BFD_RELOC_390_GOTPLT32
|| fixP->fx_r_type == BFD_RELOC_390_GOTPLT64
|| fixP->fx_r_type == BFD_RELOC_390_GOTPLTENT
|| fixP->fx_r_type == BFD_RELOC_390_TLS_GD32
|| fixP->fx_r_type == BFD_RELOC_390_TLS_GD64
|| fixP->fx_r_type == BFD_RELOC_390_TLS_GOTIE12
+ || fixP->fx_r_type == BFD_RELOC_390_TLS_GOTIE20
|| fixP->fx_r_type == BFD_RELOC_390_TLS_GOTIE32
|| fixP->fx_r_type == BFD_RELOC_390_TLS_GOTIE64
|| fixP->fx_r_type == BFD_RELOC_390_TLS_LDM32
switch (fixp->fx_r_type)
{
case BFD_RELOC_390_GOT12:
+ case BFD_RELOC_390_GOT20:
case BFD_RELOC_32_GOT_PCREL:
case BFD_RELOC_32_GOTOFF:
case BFD_RELOC_390_GOTOFF64:
case BFD_RELOC_390_PLT64:
case BFD_RELOC_390_GOTPLT12:
case BFD_RELOC_390_GOTPLT16:
+ case BFD_RELOC_390_GOTPLT20:
case BFD_RELOC_390_GOTPLT32:
case BFD_RELOC_390_GOTPLT64:
case BFD_RELOC_390_GOTPLTENT:
fixP->fx_where += 4;
fixP->fx_r_type = BFD_RELOC_390_12;
}
+ else if (operand->bits == 20 && operand->shift == 20)
+ {
+ fixP->fx_size = 2;
+ fixP->fx_where += 2;
+ fixP->fx_r_type = BFD_RELOC_390_20;
+ }
else if (operand->bits == 8 && operand->shift == 8)
{
fixP->fx_size = 1;
}
break;
+ case BFD_RELOC_390_20:
+ case BFD_RELOC_390_GOT20:
+ case BFD_RELOC_390_GOTPLT20:
+ if (fixP->fx_done)
+ {
+ unsigned int mop;
+ mop = bfd_getb32 ((unsigned char *) where);
+ mop |= (unsigned int) ((value & 0xfff) << 8 |
+ (value & 0xff000) >> 12);
+ bfd_putb32 ((bfd_vma) mop, (unsigned char *) where);
+ }
+ break;
+
case BFD_RELOC_16:
case BFD_RELOC_GPREL16:
case BFD_RELOC_16_GOT_PCREL:
case BFD_RELOC_390_TLS_GD32:
case BFD_RELOC_390_TLS_GD64:
case BFD_RELOC_390_TLS_GOTIE12:
+ case BFD_RELOC_390_TLS_GOTIE20:
case BFD_RELOC_390_TLS_GOTIE32:
case BFD_RELOC_390_TLS_GOTIE64:
case BFD_RELOC_390_TLS_LDM32:
return reloc;
}
+
+void
+s390_cfi_frame_initial_instructions ()
+{
+ cfi_add_CFA_def_cfa (15, s390_arch_size == 64 ? 160 : 96);
+}
+
+int
+tc_s390_regname_to_dw2regnum (const char *regname)
+{
+ int regnum = -1;
+
+ if (regname[0] != 'c' && regname[0] != 'a')
+ {
+ regnum = reg_name_search (pre_defined_registers, REG_NAME_CNT, regname);
+ if (regname[0] == 'f' && regnum != -1)
+ regnum += 16;
+ }
+ else if (strcmp (regname, "ap") == 0)
+ regnum = 32;
+ else if (strcmp (regname, "cc") == 0)
+ regnum = 33;
+ return regnum;
+}
projects / deliverable / binutils-gdb.git / blobdiff