/* tc-sh.c -- Assemble code for the Renesas / SuperH SH
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
- 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+ Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2, or (at your option)
+ the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
/* Written By Steve Chamberlain <sac@cygnus.com> */
-#include <stdio.h>
#include "as.h"
-#include "bfd.h"
#include "subsegs.h"
#define DEFINE_TABLE
#include "opcodes/sh-opc.h"
static int dont_adjust_reloc_32;
-/* preset architecture set, if given; zero otherwise. */
+/* Flag to indicate that '$' is allowed as a register prefix. */
+
+static int allow_dollar_register_prefix;
+
+/* Preset architecture set, if given; zero otherwise. */
static unsigned int preset_target_arch;
else
demand_empty_rest_of_line ();
}
-#endif /* OBJ_ELF */
+/* The regular frag_offset_fixed_p doesn't work for rs_align_test
+ frags. */
+
+static bfd_boolean
+align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2,
+ bfd_vma *offset)
+{
+ const fragS *frag;
+ bfd_vma off;
+
+ /* Start with offset initialised to difference between the two frags.
+ Prior to assigning frag addresses this will be zero. */
+ off = frag1->fr_address - frag2->fr_address;
+ if (frag1 == frag2)
+ {
+ *offset = off;
+ return TRUE;
+ }
+
+ /* Maybe frag2 is after frag1. */
+ frag = frag1;
+ while (frag->fr_type == rs_fill
+ || frag->fr_type == rs_align_test)
+ {
+ if (frag->fr_type == rs_fill)
+ off += frag->fr_fix + frag->fr_offset * frag->fr_var;
+ else
+ off += frag->fr_fix;
+ frag = frag->fr_next;
+ if (frag == NULL)
+ break;
+ if (frag == frag2)
+ {
+ *offset = off;
+ return TRUE;
+ }
+ }
+
+ /* Maybe frag1 is after frag2. */
+ off = frag1->fr_address - frag2->fr_address;
+ frag = frag2;
+ while (frag->fr_type == rs_fill
+ || frag->fr_type == rs_align_test)
+ {
+ if (frag->fr_type == rs_fill)
+ off -= frag->fr_fix + frag->fr_offset * frag->fr_var;
+ else
+ off -= frag->fr_fix;
+ frag = frag->fr_next;
+ if (frag == NULL)
+ break;
+ if (frag == frag1)
+ {
+ *offset = off;
+ return TRUE;
+ }
+ }
+
+ return FALSE;
+}
+
+/* Optimize a difference of symbols which have rs_align_test frag if
+ possible. */
+
+int
+sh_optimize_expr (expressionS *l, operatorT op, expressionS *r)
+{
+ bfd_vma frag_off;
+
+ if (op == O_subtract
+ && l->X_op == O_symbol
+ && r->X_op == O_symbol
+ && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol)
+ && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol))
+ || r->X_add_symbol == l->X_add_symbol)
+ && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol),
+ symbol_get_frag (r->X_add_symbol),
+ &frag_off))
+ {
+ l->X_add_number -= r->X_add_number;
+ l->X_add_number -= frag_off / OCTETS_PER_BYTE;
+ l->X_add_number += (S_GET_VALUE (l->X_add_symbol)
+ - S_GET_VALUE (r->X_add_symbol));
+ l->X_op = O_constant;
+ l->X_add_symbol = 0;
+ return 1;
+ }
+ return 0;
+}
+#endif /* OBJ_ELF */
\f
/* This function is called once, at assembler startup time. This should
set up all the tables, etc that the MD part of the assembler needs. */
/* Try to parse a reg name. Return the number of chars consumed. */
-static int
-parse_reg (char *src, int *mode, int *reg)
+static unsigned int
+parse_reg_without_prefix (char *src, int *mode, int *reg)
{
char l0 = TOLOWER (src[0]);
char l1 = l0 ? TOLOWER (src[1]) : 0;
return 0;
}
+/* Like parse_reg_without_prefix, but this version supports
+ $-prefixed register names if enabled by the user. */
+
+static unsigned int
+parse_reg (char *src, int *mode, int *reg)
+{
+ unsigned int prefix;
+ unsigned int consumed;
+
+ if (src[0] == '$')
+ {
+ if (allow_dollar_register_prefix)
+ {
+ src ++;
+ prefix = 1;
+ }
+ else
+ return 0;
+ }
+ else
+ prefix = 0;
+
+ consumed = parse_reg_without_prefix (src, mode, reg);
+
+ if (consumed == 0)
+ return 0;
+
+ return consumed + prefix;
+}
+
static char *
parse_exp (char *s, sh_operand_info *op)
{
char *save;
- char *new;
+ char *new_pointer;
save = input_line_pointer;
input_line_pointer = s;
|| sh_PIC_related_p (op->immediate.X_op_symbol))
as_bad (_("misplaced PIC operand"));
#endif
- new = input_line_pointer;
+ new_pointer = input_line_pointer;
input_line_pointer = save;
- return new;
+ return new_pointer;
}
/* The many forms of operand:
sh_operand_info *user = operands + n;
sh_arg_type arg = this_try->arg[n];
- if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up)
- && ( arg == A_DISP_REG_M
- || arg == A_DISP_REG_N))
- {
- /* Check a few key IMM* fields for overflow. */
- int opf;
- long val = user->immediate.X_add_number;
-
- for (opf = 0; opf < 4; opf ++)
- switch (this_try->nibbles[opf])
- {
- case IMM0_4:
- case IMM1_4:
- if (val < 0 || val > 15)
- goto fail;
- break;
- case IMM0_4BY2:
- case IMM1_4BY2:
- if (val < 0 || val > 15 * 2)
- goto fail;
- break;
- case IMM0_4BY4:
- case IMM1_4BY4:
- if (val < 0 || val > 15 * 4)
- goto fail;
- break;
- default:
- break;
- }
- }
switch (arg)
{
case A_DISP_PC:
printf (_("unhandled %d\n"), arg);
goto fail;
}
+ if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up)
+ && ( arg == A_DISP_REG_M
+ || arg == A_DISP_REG_N))
+ {
+ /* Check a few key IMM* fields for overflow. */
+ int opf;
+ long val = user->immediate.X_add_number;
+
+ for (opf = 0; opf < 4; opf ++)
+ switch (this_try->nibbles[opf])
+ {
+ case IMM0_4:
+ case IMM1_4:
+ if (val < 0 || val > 15)
+ goto fail;
+ break;
+ case IMM0_4BY2:
+ case IMM1_4BY2:
+ if (val < 0 || val > 15 * 2)
+ goto fail;
+ break;
+ case IMM0_4BY4:
+ case IMM1_4BY4:
+ if (val < 0 || val > 15 * 4)
+ goto fail;
+ break;
+ default:
+ break;
+ }
+ }
}
if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch))
goto fail;
static unsigned int
build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand)
{
- int index;
+ int indx;
char nbuf[8];
char *output;
unsigned int size = 2;
else
output = frag_more (2);
- for (index = 0; index < max_index; index++)
+ for (indx = 0; indx < max_index; indx++)
{
- sh_nibble_type i = opcode->nibbles[index];
+ sh_nibble_type i = opcode->nibbles[indx];
if (i < 16)
{
- nbuf[index] = i;
+ nbuf[indx] = i;
}
else
{
{
case REG_N:
case REG_N_D:
- nbuf[index] = reg_n;
+ nbuf[indx] = reg_n;
break;
case REG_M:
- nbuf[index] = reg_m;
+ nbuf[indx] = reg_m;
break;
case SDT_REG_N:
if (reg_n < 2 || reg_n > 5)
as_bad (_("Invalid register: 'r%d'"), reg_n);
- nbuf[index] = (reg_n & 3) | 4;
+ nbuf[indx] = (reg_n & 3) | 4;
break;
case REG_NM:
- nbuf[index] = reg_n | (reg_m >> 2);
+ nbuf[indx] = reg_n | (reg_m >> 2);
break;
case REG_B:
- nbuf[index] = reg_b | 0x08;
+ nbuf[indx] = reg_b | 0x08;
break;
case REG_N_B01:
- nbuf[index] = reg_n | 0x01;
+ nbuf[indx] = reg_n | 0x01;
break;
case IMM0_3s:
- nbuf[index] |= 0x08;
+ nbuf[indx] |= 0x08;
case IMM0_3c:
insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand);
break;
case IMM0_3Us:
- nbuf[index] |= 0x80;
+ nbuf[indx] |= 0x80;
case IMM0_3Uc:
insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand);
break;
break;
case REPEAT:
output = insert_loop_bounds (output, operand);
- nbuf[index] = opcode->nibbles[3];
+ nbuf[indx] = opcode->nibbles[3];
operand += 2;
break;
default:
if (opcode == NULL)
{
/* The opcode is not in the hash table.
- This means we definately have an assembly failure,
+ This means we definitely have an assembly failure,
but the instruction may be valid in another CPU variant.
In this case emit something better than 'unknown opcode'.
Search the full table in sh-opc.h to check. */
as_bad (_("Delayed branches not available on SH1"));
parse_exp (op_end + 1, &operand[0]);
build_relax (opcode, &operand[0]);
+
+ /* All branches are currently 16 bit. */
+ size = 2;
}
else
{
emits a BFD_RELOC_SH_LABEL reloc if necessary. */
void
-sh_frob_label (void)
+sh_frob_label (symbolS *sym)
{
static fragS *last_label_frag;
static int last_label_offset;
last_label_offset = offset;
}
}
+
+ dwarf2_emit_label (sym);
}
/* This routine is called when the assembler is about to output some
}
/* Various routines to kill one day. */
-/* Equal to MAX_PRECISION in atof-ieee.c. */
-#define MAX_LITTLENUMS 6
-
-/* Turn a string in input_line_pointer into a floating point constant
- of type TYPE, and store the appropriate bytes in *LITP. The number
- of LITTLENUMS emitted is stored in *SIZEP . An error message is
- returned, or NULL on OK. */
char *
md_atof (int type, char *litP, int *sizeP)
{
- int prec;
- LITTLENUM_TYPE words[4];
- char *t;
- int i;
-
- switch (type)
- {
- case 'f':
- prec = 2;
- break;
-
- case 'd':
- prec = 4;
- break;
-
- default:
- *sizeP = 0;
- return _("bad call to md_atof");
- }
-
- t = atof_ieee (input_line_pointer, type, words);
- if (t)
- input_line_pointer = t;
-
- *sizeP = prec * 2;
-
- if (! target_big_endian)
- {
- for (i = prec - 1; i >= 0; i--)
- {
- md_number_to_chars (litP, (valueT) words[i], 2);
- litP += 2;
- }
- }
- else
- {
- for (i = 0; i < prec; i++)
- {
- md_number_to_chars (litP, (valueT) words[i], 2);
- litP += 2;
- }
- }
-
- return NULL;
+ return ieee_md_atof (type, litP, sizeP, target_big_endian);
}
/* Handle the .uses pseudo-op. This pseudo-op is used just before a
demand_empty_rest_of_line ();
}
\f
+enum options
+{
+ OPTION_RELAX = OPTION_MD_BASE,
+ OPTION_BIG,
+ OPTION_LITTLE,
+ OPTION_SMALL,
+ OPTION_DSP,
+ OPTION_ISA,
+ OPTION_RENESAS,
+ OPTION_ALLOW_REG_PREFIX,
+#ifdef HAVE_SH64
+ OPTION_ABI,
+ OPTION_NO_MIX,
+ OPTION_SHCOMPACT_CONST_CRANGE,
+ OPTION_NO_EXPAND,
+ OPTION_PT32,
+#endif
+ OPTION_H_TICK_HEX,
+ OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */
+};
+
const char *md_shortopts = "";
struct option md_longopts[] =
{
-#define OPTION_RELAX (OPTION_MD_BASE)
-#define OPTION_BIG (OPTION_MD_BASE + 1)
-#define OPTION_LITTLE (OPTION_BIG + 1)
-#define OPTION_SMALL (OPTION_LITTLE + 1)
-#define OPTION_DSP (OPTION_SMALL + 1)
-#define OPTION_ISA (OPTION_DSP + 1)
-#define OPTION_RENESAS (OPTION_ISA + 1)
-
{"relax", no_argument, NULL, OPTION_RELAX},
{"big", no_argument, NULL, OPTION_BIG},
{"little", no_argument, NULL, OPTION_LITTLE},
+ /* The next two switches are here because the
+ generic parts of the linker testsuite uses them. */
+ {"EB", no_argument, NULL, OPTION_BIG},
+ {"EL", no_argument, NULL, OPTION_LITTLE},
{"small", no_argument, NULL, OPTION_SMALL},
{"dsp", no_argument, NULL, OPTION_DSP},
- {"isa", required_argument, NULL, OPTION_ISA},
+ {"isa", required_argument, NULL, OPTION_ISA},
{"renesas", no_argument, NULL, OPTION_RENESAS},
+ {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX},
#ifdef HAVE_SH64
-#define OPTION_ABI (OPTION_RENESAS + 1)
-#define OPTION_NO_MIX (OPTION_ABI + 1)
-#define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
-#define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
-#define OPTION_PT32 (OPTION_NO_EXPAND + 1)
{"abi", required_argument, NULL, OPTION_ABI},
{"no-mix", no_argument, NULL, OPTION_NO_MIX},
{"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE},
{"no-expand", no_argument, NULL, OPTION_NO_EXPAND},
{"expand-pt32", no_argument, NULL, OPTION_PT32},
#endif /* HAVE_SH64 */
+ { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX },
{NULL, no_argument, NULL, 0}
};
dont_adjust_reloc_32 = 1;
break;
+ case OPTION_ALLOW_REG_PREFIX:
+ allow_dollar_register_prefix = 1;
+ break;
+
case OPTION_ISA:
if (strcasecmp (arg, "dsp") == 0)
preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
{
extern const bfd_arch_info_type bfd_sh_arch;
bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
+
preset_target_arch = 0;
for (; bfd_arch; bfd_arch=bfd_arch->next)
{
}
if (!preset_target_arch)
- as_bad ("Invalid argument to --isa option: %s", arg);
+ as_bad (_("Invalid argument to --isa option: %s"), arg);
}
break;
sh64_abi = sh64_abi_64;
}
else
- as_bad ("Invalid argument to --abi option: %s", arg);
+ as_bad (_("Invalid argument to --abi option: %s"), arg);
break;
case OPTION_NO_MIX:
break;
#endif /* HAVE_SH64 */
+ case OPTION_H_TICK_HEX:
+ enable_h_tick_hex = 1;
+ break;
+
default:
return 0;
}
{
fprintf (stream, _("\
SH options:\n\
--little generate little endian code\n\
--big generate big endian code\n\
--relax alter jump instructions for long displacements\n\
--renesas disable optimization with section symbol for\n\
+--little generate little endian code\n\
+--big generate big endian code\n\
+--relax alter jump instructions for long displacements\n\
+--renesas disable optimization with section symbol for\n\
compatibility with Renesas assembler.\n\
--small align sections to 4 byte boundaries, not 16\n\
--dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
--isa=[any use most appropriate isa\n\
+--small align sections to 4 byte boundaries, not 16\n\
+--dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
+--allow-reg-prefix allow '$' as a register name prefix.\n\
+--isa=[any use most appropriate isa\n\
| dsp same as '-dsp'\n\
| fp"));
{
extern const bfd_arch_info_type bfd_sh_arch;
bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
+
for (; bfd_arch; bfd_arch=bfd_arch->next)
if (bfd_arch->mach != bfd_mach_sh5)
{
fprintf (stream, "]\n");
#ifdef HAVE_SH64
fprintf (stream, _("\
--isa=[shmedia set as the default instruction set for SH64\n\
+--isa=[shmedia set as the default instruction set for SH64\n\
| SHmedia\n\
| shcompact\n\
| SHcompact]\n"));
fprintf (stream, _("\
--abi=[32|64] set size of expanded SHmedia operands and object\n\
+--abi=[32|64] set size of expanded SHmedia operands and object\n\
file type\n\
--shcompact-const-crange emit code-range descriptors for constants in\n\
+--shcompact-const-crange emit code-range descriptors for constants in\n\
SHcompact code sections\n\
--no-mix disallow SHmedia code in the same section as\n\
+--no-mix disallow SHmedia code in the same section as\n\
constants and SHcompact code\n\
--no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
--expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
+--no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
+--expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
to 32 bits only\n"));
#endif /* HAVE_SH64 */
}
if (seginfo == NULL)
return;
+ for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
+ {
+ symbolS *sym;
+
+ sym = fix->fx_addsy;
+ /* Check for a local_symbol. */
+ if (sym && sym->bsym == NULL)
+ {
+ struct local_symbol *ls = (struct local_symbol *)sym;
+ /* See if it's been converted. If so, canonicalize. */
+ if (local_symbol_converted_p (ls))
+ fix->fx_addsy = local_symbol_get_real_symbol (ls);
+ }
+ }
+
for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
{
symbolS *sym;
else if (frag->fr_type == rs_align_test)
{
if (bytes != 0)
- as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data"));
+ as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data"));
}
if (sh_relax
}
#endif
+/* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
+ assembly-time value. If we're generating a reloc for FIXP,
+ see whether the addend should be stored in-place or whether
+ it should be in an ELF r_addend field. */
+
+static void
+apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size)
+{
+ reloc_howto_type *howto;
+
+ if (fixP->fx_addsy != NULL || fixP->fx_pcrel)
+ {
+ howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
+ if (howto && !howto->partial_inplace)
+ {
+ fixP->fx_addnumber = val;
+ return;
+ }
+ }
+ md_number_to_chars (buf, val, size);
+}
+
/* Apply a fixup to the object file. */
void
break;
case BFD_RELOC_SH_PCRELIMM8BY4:
+ /* If we are dealing with a known destination ... */
+ if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
+ && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy)))
+ {
+ /* Don't silently move the destination due to misalignment.
+ The absolute address is the fragment base plus the offset into
+ the fragment plus the pc relative offset to the label. */
+ if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("offset to unaligned destination"));
+
+ /* The displacement cannot be zero or backward even if aligned.
+ Allow -2 because val has already been adjusted somewhere. */
+ if (val < -2)
+ as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset"));
+ }
+
/* The lower two bits of the PC are cleared before the
displacement is added in. We can assume that the destination
is on a 4 byte boundary. If this instruction is also on a 4
case BFD_RELOC_32:
case BFD_RELOC_32_PCREL:
- md_number_to_chars (buf, val, 4);
+ apply_full_field_fix (fixP, buf, val, 4);
break;
case BFD_RELOC_16:
- md_number_to_chars (buf, val, 2);
+ apply_full_field_fix (fixP, buf, val, 2);
break;
case BFD_RELOC_SH_USES:
val = fixP->fx_offset;
if (fixP->fx_subsy)
val -= S_GET_VALUE (fixP->fx_subsy);
- fixP->fx_addnumber = val;
- md_number_to_chars (buf, val, 4);
+ apply_full_field_fix (fixP, buf, val, 4);
break;
case BFD_RELOC_SH_GOTPC:
was used to store the correction, but since the expression is
not pcrel, I felt it would be confusing to do it this way. */
* valP -= 1;
- md_number_to_chars (buf, val, 4);
+ apply_full_field_fix (fixP, buf, val, 4);
break;
case BFD_RELOC_SH_TLS_GD_32:
case BFD_RELOC_32_GOT_PCREL:
case BFD_RELOC_SH_GOTPLT32:
* valP = 0; /* Fully resolved at runtime. No addend. */
- md_number_to_chars (buf, 0, 4);
+ apply_full_field_fix (fixP, buf, 0, 4);
break;
case BFD_RELOC_SH_TLS_LDO_32:
S_SET_THREAD_LOCAL (fixP->fx_addsy);
/* Fallthrough */
case BFD_RELOC_32_GOTOFF:
- md_number_to_chars (buf, val, 4);
+ apply_full_field_fix (fixP, buf, val, 4);
break;
#endif
val = ((val >> shift)
| ((long) -1 & ~ ((long) -1 >> shift)));
}
+
+ /* Extend sign for 64-bit host. */
+ val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
if (max != 0 && (val < min || val > max))
as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
+ else if (max != 0)
+ /* Stop the generic code from trying to overlow check the value as well.
+ It may not have the correct value anyway, as we do not store val back
+ into *valP. */
+ fixP->fx_no_overflow = 1;
if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
fixP->fx_done = 1;
else if (shmedia_init_reloc (rel, fixp))
;
#endif
- else if (fixp->fx_pcrel)
- rel->addend = fixp->fx_addnumber;
- else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF)
- rel->addend = fixp->fx_addnumber;
else
- rel->addend = 0;
+ rel->addend = fixp->fx_addnumber;
rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
bfd_get_reloc_code_name (r_type));
/* Set howto to a garbage value so that we can keep going. */
rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
- assert (rel->howto != NULL);
+ gas_assert (rel->howto != NULL);
}
#ifdef OBJ_ELF
else if (rel->howto->type == R_SH_IND12W)
}
int
-sh_parse_name (char const *name, expressionS *exprP, char *nextcharP)
+sh_parse_name (char const *name,
+ expressionS *exprP,
+ enum expr_mode mode,
+ char *nextcharP)
{
char *next = input_line_pointer;
char *next_end;
exprP->X_add_symbol = GOT_symbol;
no_suffix:
/* If we have an absolute symbol or a reg, then we know its
- value now. */
+ value now. */
segment = S_GET_SEGMENT (exprP->X_add_symbol);
- if (segment == absolute_section)
+ if (mode != expr_defer && segment == absolute_section)
{
exprP->X_op = O_constant;
exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
exprP->X_add_symbol = NULL;
}
- else if (segment == reg_section)
+ else if (mode != expr_defer && segment == reg_section)
{
exprP->X_op = O_register;
exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
}
int
-sh_regname_to_dw2regnum (const char *regname)
+sh_regname_to_dw2regnum (char *regname)
{
unsigned int regnum = -1;
unsigned int i;
projects / deliverable / binutils-gdb.git / blobdiff