#include "as.h"
#include "subsegs.h"
-/* careful, this file includes data *declarations* */
#include "opcode/sparc.h"
+static struct sparc_arch *lookup_arch PARAMS ((char *));
+static void init_default_arch PARAMS ((void));
static void sparc_ip PARAMS ((char *, const struct sparc_opcode **));
+static int in_signed_range PARAMS ((bfd_signed_vma, bfd_signed_vma));
+static int in_unsigned_range PARAMS ((bfd_vma, bfd_vma));
+static int in_bitfield_range PARAMS ((bfd_signed_vma, bfd_signed_vma));
+static int sparc_ffs PARAMS ((unsigned int));
+static bfd_vma BSR PARAMS ((bfd_vma, int));
+static int cmp_reg_entry PARAMS ((const PTR, const PTR));
+static int parse_keyword_arg PARAMS ((int (*) (const char *), char **, int *));
+static int parse_const_expr_arg PARAMS ((char **, int *));
+static int get_expression PARAMS ((char *str));
+
+/* Default architecture. */
+/* ??? The default value should be V8, but sparclite support was added
+ by making it the default. GCC now passes -Asparclite, so maybe sometime in
+ the future we can set this to V8. */
+#ifndef DEFAULT_ARCH
+#define DEFAULT_ARCH "sparclite"
+#endif
+static char *default_arch = DEFAULT_ARCH;
+
+/* Non-zero if the initial values of `max_architecture' and `sparc_arch_size'
+ have been set. */
+static int default_init_p;
/* Current architecture. We don't bump up unless necessary. */
static enum sparc_opcode_arch_val current_architecture = SPARC_OPCODE_ARCH_V6;
In a 32 bit environment, don't allow bumping up to v9 by default.
The native assembler works this way. The user is required to pass
an explicit argument before we'll create v9 object files. However, if
- we don't see any v9 insns, a v9 object file is not created. */
-#ifdef SPARC_ARCH64
-static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_V9;
-#else
-/* ??? This should be V8, but sparclite support was added by making it the
- default. GCC now passes -Asparclite, so maybe sometime in the future
- we can set this to V8. */
-static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_SPARCLITE;
-#endif
+ we don't see any v9 insns, a v8plus object file is not created. */
+static enum sparc_opcode_arch_val max_architecture;
+
+/* Either 32 or 64, selects file format. */
+static int sparc_arch_size;
static int architecture_requested;
static int warn_on_bump;
struct sparc_it the_insn, set_insn;
-/* Return non-zero if VAL is in the range -(MAX+1) to MAX. */
-
-static INLINE int
-in_signed_range (val, max)
- bfd_signed_vma val, max;
-{
- if (max <= 0)
- abort ();
- if (val > max)
- return 0;
- if (val < ~max)
- return 0;
- return 1;
-}
+static void output_insn
+ PARAMS ((const struct sparc_opcode *, struct sparc_it *));
+\f
+/* Table of arguments to -A.
+ The sparc_opcode_arch table in sparc-opc.c is insufficient and incorrect
+ for this use. That table is for opcodes only. This table is for opcodes
+ and file formats. */
-/* Return non-zero if VAL is in the range -(MAX/2+1) to MAX.
- (e.g. -15 to +31). */
+static struct sparc_arch {
+ char *name;
+ char *opcode_arch;
+ int arch_size;
+} sparc_arch_table[] = {
+ { "v6", "v6", 32 },
+ { "v7", "v7", 32 },
+ { "v8", "v8", 32 },
+ { "sparclet", "sparclet", 32 },
+ { "sparclite", "sparclite", 32 },
+ { "v8plus", "v9", 32 },
+ { "v8plusa", "v9a", 32 },
+#ifdef BFD64
+ { "v9", "v9", 64 },
+ { "v9a", "v9a", 64 },
+#endif
+ { NULL, NULL, 0 }
+};
-static INLINE int
-in_bitfield_range (val, max)
- bfd_signed_vma val, max;
+static struct sparc_arch *
+lookup_arch (name)
+ char *name;
{
- if (max <= 0)
- abort ();
- if (val > max)
- return 0;
- if (val < ~(max >> 1))
- return 0;
- return 1;
+ struct sparc_arch *sa;
+
+ for (sa = &sparc_arch_table[0]; sa->name != NULL; sa++)
+ if (strcmp (sa->name, name) == 0)
+ break;
+ if (sa->name == NULL)
+ return NULL;
+ return sa;
}
-static int
-sparc_ffs (mask)
- unsigned int mask;
+/* Initialize the default opcode arch and word size from the default
+ architecture name. */
+
+static void
+init_default_arch ()
{
- int i;
+ struct sparc_arch *sa = lookup_arch (default_arch);
- if (mask == 0)
- return -1;
+ if (sa == NULL)
+ as_fatal ("Invalid default architecture, broken assembler.");
- for (i = 0; (mask & 1) == 0; ++i)
- mask >>= 1;
- return i;
+ max_architecture = sparc_opcode_lookup_arch (sa->opcode_arch);
+ if (max_architecture == SPARC_OPCODE_ARCH_BAD)
+ as_fatal ("Bad opcode table, broken assembler.");
+ sparc_arch_size = sa->arch_size;
+ default_init_p = 1;
}
-/* Implement big shift right. */
-static bfd_vma
-BSR (val, amount)
- bfd_vma val;
- int amount;
+/* Called by TARGET_FORMAT. */
+
+const char *
+sparc_target_format ()
{
- if (sizeof (bfd_vma) <= 4 && amount >= 32)
- as_fatal ("Support for 64-bit arithmetic not compiled in.");
- return val >> amount;
-}
+ /* We don't get a chance to initialize anything before we're called,
+ so handle that now. */
+ if (! default_init_p)
+ init_default_arch ();
-#if 0
-static void print_insn PARAMS ((struct sparc_it *insn));
+#ifdef OBJ_AOUT
+#ifdef TE_NetBSD
+ return "a.out-sparc-netbsd";
+#else
+#ifdef TE_SPARCAOUT
+ return target_big_endian ? "a.out-sunos-big" : "a.out-sparc-little";
+#else
+ return "a.out-sunos-big";
+#endif
+#endif
#endif
-static int getExpression PARAMS ((char *str));
-
-static char *expr_end;
-static int special_case;
-/*
- * Instructions that require wierd handling because they're longer than
- * 4 bytes.
- */
-#define SPECIAL_CASE_SET 1
-#define SPECIAL_CASE_SETSW 2
-#define SPECIAL_CASE_SETX 3
-/* FIXME: sparc-opc.c doesn't have necessary "S" trigger to enable this. */
-#define SPECIAL_CASE_FDIV 4
+#ifdef OBJ_BOUT
+ return "b.out.big";
+#endif
-/* Bit masks of various insns. */
-#define NOP_INSN 0x01000000
-#define OR_INSN 0x80100000
-#define FMOVS_INSN 0x81A00020
-#define SETHI_INSN 0x01000000
-#define SLLX_INSN 0x81281000
-#define SRA_INSN 0x81380000
+#ifdef OBJ_COFF
+#ifdef TE_LYNX
+ return "coff-sparc-lynx";
+#else
+ return "coff-sparc";
+#endif
+#endif
-/* The last instruction to be assembled. */
-static const struct sparc_opcode *last_insn;
+#ifdef OBJ_ELF
+ return sparc_arch_size == 64 ? "elf64-sparc" : "elf32-sparc";
+#endif
+ abort ();
+}
+\f
/*
- * sort of like s_lcomm
+ * md_parse_option
+ * Invocation line includes a switch not recognized by the base assembler.
+ * See if it's a processor-specific option. These are:
+ *
+ * -bump
+ * Warn on architecture bumps. See also -A.
+ *
+ * -Av6, -Av7, -Av8, -Asparclite, -Asparclet
+ * Standard 32 bit architectures.
+ * -Av8plus, -Av8plusa
+ * Sparc64 in a 32 bit world.
+ * -Av9, -Av9a
+ * Sparc64 in a 64 bit world.
+ * -xarch=v8plus, -xarch=v8plusa
+ * Same as -Av8plus{,a}, for compatibility with Sun's assembler.
+ *
+ * Select the architecture and possibly the file format.
+ * Instructions or features not supported by the selected
+ * architecture cause fatal errors.
+ *
+ * The default is to start at v6, and bump the architecture up
+ * whenever an instruction is seen at a higher level. In 32 bit
+ * environments, v9 is not bumped up to, the user must pass
+ * -Av8plus{,a}.
+ *
+ * If -bump is specified, a warning is printing when bumping to
+ * higher levels.
+ *
+ * If an architecture is specified, all instructions must match
+ * that architecture. Any higher level instructions are flagged
+ * as errors. Note that in the 32 bit environment specifying
+ * -Av8plus does not automatically create a v8plus object file, a
+ * v9 insn must be seen.
+ *
+ * If both an architecture and -bump are specified, the
+ * architecture starts at the specified level, but bumps are
+ * warnings. Note that we can't set `current_architecture' to
+ * the requested level in this case: in the 32 bit environment,
+ * we still must avoid creating v8plus object files unless v9
+ * insns are seen.
*
+ * Note:
+ * Bumping between incompatible architectures is always an
+ * error. For example, from sparclite to v9.
*/
-#ifndef OBJ_ELF
-static int max_alignment = 15;
+
+#ifdef OBJ_ELF
+CONST char *md_shortopts = "A:K:VQ:sq";
+#else
+#ifdef OBJ_AOUT
+CONST char *md_shortopts = "A:k";
+#else
+CONST char *md_shortopts = "A:";
#endif
+#endif
+struct option md_longopts[] = {
+#define OPTION_BUMP (OPTION_MD_BASE)
+ {"bump", no_argument, NULL, OPTION_BUMP},
+#define OPTION_SPARC (OPTION_MD_BASE + 1)
+ {"sparc", no_argument, NULL, OPTION_SPARC},
+#define OPTION_XARCH (OPTION_MD_BASE + 2)
+ {"xarch", required_argument, NULL, OPTION_XARCH},
+#ifdef SPARC_BIENDIAN
+#define OPTION_LITTLE_ENDIAN (OPTION_MD_BASE + 3)
+ {"EL", no_argument, NULL, OPTION_LITTLE_ENDIAN},
+#define OPTION_BIG_ENDIAN (OPTION_MD_BASE + 4)
+ {"EB", no_argument, NULL, OPTION_BIG_ENDIAN},
+#endif
+#define OPTION_ENFORCE_ALIGNED_DATA (OPTION_MD_BASE + 5)
+ {"enforce-aligned-data", no_argument, NULL, OPTION_ENFORCE_ALIGNED_DATA},
+ {NULL, no_argument, NULL, 0}
+};
+size_t md_longopts_size = sizeof(md_longopts);
-static void
-s_reserve (ignore)
- int ignore;
+int
+md_parse_option (c, arg)
+ int c;
+ char *arg;
{
- char *name;
- char *p;
- char c;
- int align;
- int size;
- int temp;
- symbolS *symbolP;
-
- name = input_line_pointer;
- c = get_symbol_end ();
- p = input_line_pointer;
- *p = c;
- SKIP_WHITESPACE ();
+ /* We don't get a chance to initialize anything before we're called,
+ so handle that now. */
+ if (! default_init_p)
+ init_default_arch ();
- if (*input_line_pointer != ',')
+ switch (c)
{
- as_bad ("Expected comma after name");
- ignore_rest_of_line ();
- return;
- }
+ case OPTION_BUMP:
+ warn_on_bump = 1;
+ warn_after_architecture = SPARC_OPCODE_ARCH_V6;
+ break;
- ++input_line_pointer;
+ case OPTION_XARCH:
+ /* This is for compatibility with Sun's assembler. */
+ if (strcmp (arg, "v8plus") != 0
+ && strcmp (arg, "v8plusa") != 0)
+ {
+ as_bad ("invalid architecture -xarch=%s", arg);
+ return 0;
+ }
- if ((size = get_absolute_expression ()) < 0)
- {
- as_bad ("BSS length (%d.) <0! Ignored.", size);
- ignore_rest_of_line ();
- return;
- } /* bad length */
+ /* fall through */
- *p = 0;
- symbolP = symbol_find_or_make (name);
- *p = c;
+ case 'A':
+ {
+ struct sparc_arch *sa;
+ enum sparc_opcode_arch_val opcode_arch;
- if (strncmp (input_line_pointer, ",\"bss\"", 6) != 0
- && strncmp (input_line_pointer, ",\".bss\"", 7) != 0)
- {
- as_bad ("bad .reserve segment -- expected BSS segment");
- return;
- }
+ sa = lookup_arch (arg);
+ if (sa == NULL)
+ {
+ as_bad ("invalid architecture -A%s", arg);
+ return 0;
+ }
- if (input_line_pointer[2] == '.')
- input_line_pointer += 7;
- else
- input_line_pointer += 6;
- SKIP_WHITESPACE ();
+ opcode_arch = sparc_opcode_lookup_arch (sa->opcode_arch);
+ if (opcode_arch == SPARC_OPCODE_ARCH_BAD)
+ as_fatal ("Bad opcode table, broken assembler.");
- if (*input_line_pointer == ',')
- {
- ++input_line_pointer;
+ max_architecture = opcode_arch;
+ sparc_arch_size = sa->arch_size;
+ architecture_requested = 1;
+ }
+ break;
- SKIP_WHITESPACE ();
- if (*input_line_pointer == '\n')
- {
- as_bad ("Missing alignment");
- return;
- }
+ case OPTION_SPARC:
+ /* Ignore -sparc, used by SunOS make default .s.o rule. */
+ break;
- align = get_absolute_expression ();
-#ifndef OBJ_ELF
- if (align > max_alignment)
- {
- align = max_alignment;
- as_warn ("Alignment too large: %d. assumed.", align);
- }
-#endif
- if (align < 0)
- {
- align = 0;
- as_warn ("Alignment negative. 0 assumed.");
- }
+ case OPTION_ENFORCE_ALIGNED_DATA:
+ enforce_aligned_data = 1;
+ break;
- record_alignment (bss_section, align);
+#ifdef SPARC_BIENDIAN
+ case OPTION_LITTLE_ENDIAN:
+ target_big_endian = 0;
+ break;
+ case OPTION_BIG_ENDIAN:
+ target_big_endian = 1;
+ break;
+#endif
- /* convert to a power of 2 alignment */
- for (temp = 0; (align & 1) == 0; align >>= 1, ++temp);;
+#ifdef OBJ_AOUT
+ case 'k':
+ sparc_pic_code = 1;
+ break;
+#endif
- if (align != 1)
- {
- as_bad ("Alignment not a power of 2");
- ignore_rest_of_line ();
- return;
- } /* not a power of two */
+#ifdef OBJ_ELF
+ case 'V':
+ print_version_id ();
+ break;
- align = temp;
- } /* if has optional alignment */
- else
- align = 0;
+ case 'Q':
+ /* Qy - do emit .comment
+ Qn - do not emit .comment */
+ break;
- if (!S_IS_DEFINED (symbolP)
-#ifdef OBJ_AOUT
- && S_GET_OTHER (symbolP) == 0
- && S_GET_DESC (symbolP) == 0
-#endif
- )
- {
- if (! need_pass_2)
- {
- char *pfrag;
- segT current_seg = now_seg;
- subsegT current_subseg = now_subseg;
+ case 's':
+ /* use .stab instead of .stab.excl */
+ break;
- subseg_set (bss_section, 1); /* switch to bss */
+ case 'q':
+ /* quick -- native assembler does fewer checks */
+ break;
- if (align)
- frag_align (align, 0, 0); /* do alignment */
+ case 'K':
+ if (strcmp (arg, "PIC") != 0)
+ as_warn ("Unrecognized option following -K");
+ else
+ sparc_pic_code = 1;
+ break;
+#endif
- /* detach from old frag */
- if (S_GET_SEGMENT(symbolP) == bss_section)
- symbolP->sy_frag->fr_symbol = NULL;
+ default:
+ return 0;
+ }
- symbolP->sy_frag = frag_now;
- pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP,
- size, (char *)0);
- *pfrag = 0;
+ return 1;
+}
- S_SET_SEGMENT (symbolP, bss_section);
+void
+md_show_usage (stream)
+ FILE *stream;
+{
+ const struct sparc_arch *arch;
- subseg_set (current_seg, current_subseg);
- }
- }
- else
+ fprintf(stream, "SPARC options:\n");
+ for (arch = &sparc_arch_table[0]; arch->name; arch++)
{
- as_warn("Ignoring attempt to re-define symbol %s",
- S_GET_NAME (symbolP));
- } /* if not redefining */
+ if (arch != &sparc_arch_table[0])
+ fprintf (stream, " | ");
+ fprintf (stream, "-A%s", arch->name);
+ }
+ fprintf (stream, "\n-xarch=v8plus | -xarch=v8plusa\n");
+ fprintf (stream, "\
+ specify variant of SPARC architecture\n\
+-bump warn when assembler switches architectures\n\
+-sparc ignored\n\
+--enforce-aligned-data force .long, etc., to be aligned correctly\n");
+#ifdef OBJ_AOUT
+ fprintf (stream, "\
+-k generate PIC\n");
+#endif
+#ifdef OBJ_ELF
+ fprintf (stream, "\
+-KPIC generate PIC\n\
+-V print assembler version number\n\
+-q ignored\n\
+-Qy, -Qn ignored\n\
+-s ignored\n");
+#endif
+#ifdef SPARC_BIENDIAN
+ fprintf (stream, "\
+-EL generate code for a little endian machine\n\
+-EB generate code for a big endian machine\n");
+#endif
+}
+\f
+/* sparc64 priviledged registers */
- demand_empty_rest_of_line ();
+struct priv_reg_entry
+ {
+ char *name;
+ int regnum;
+ };
+
+struct priv_reg_entry priv_reg_table[] =
+{
+ {"tpc", 0},
+ {"tnpc", 1},
+ {"tstate", 2},
+ {"tt", 3},
+ {"tick", 4},
+ {"tba", 5},
+ {"pstate", 6},
+ {"tl", 7},
+ {"pil", 8},
+ {"cwp", 9},
+ {"cansave", 10},
+ {"canrestore", 11},
+ {"cleanwin", 12},
+ {"otherwin", 13},
+ {"wstate", 14},
+ {"fq", 15},
+ {"ver", 31},
+ {"", -1}, /* end marker */
+};
+
+static int
+cmp_reg_entry (parg, qarg)
+ const PTR parg;
+ const PTR qarg;
+{
+ const struct priv_reg_entry *p = (const struct priv_reg_entry *) parg;
+ const struct priv_reg_entry *q = (const struct priv_reg_entry *) qarg;
+
+ return strcmp (q->name, p->name);
}
+\f
+/* This function is called once, at assembler startup time. It should
+ set up all the tables, etc. that the MD part of the assembler will need. */
-static void
-s_common (ignore)
- int ignore;
+void
+md_begin ()
{
- char *name;
- char c;
- char *p;
- int temp, size;
- symbolS *symbolP;
+ register const char *retval = NULL;
+ int lose = 0;
+ register unsigned int i = 0;
- name = input_line_pointer;
- c = get_symbol_end ();
- /* just after name is now '\0' */
- p = input_line_pointer;
- *p = c;
- SKIP_WHITESPACE ();
- if (*input_line_pointer != ',')
+ /* We don't get a chance to initialize anything before md_parse_option
+ is called, and it may not be called, so handle default initialization
+ now if not already done. */
+ if (! default_init_p)
+ init_default_arch ();
+
+ op_hash = hash_new ();
+
+ while (i < sparc_num_opcodes)
{
- as_bad ("Expected comma after symbol-name");
- ignore_rest_of_line ();
- return;
+ const char *name = sparc_opcodes[i].name;
+ retval = hash_insert (op_hash, name, (PTR) &sparc_opcodes[i]);
+ if (retval != NULL)
+ {
+ fprintf (stderr, "internal error: can't hash `%s': %s\n",
+ sparc_opcodes[i].name, retval);
+ lose = 1;
+ }
+ do
+ {
+ if (sparc_opcodes[i].match & sparc_opcodes[i].lose)
+ {
+ fprintf (stderr, "internal error: losing opcode: `%s' \"%s\"\n",
+ sparc_opcodes[i].name, sparc_opcodes[i].args);
+ lose = 1;
+ }
+ ++i;
+ }
+ while (i < sparc_num_opcodes
+ && !strcmp (sparc_opcodes[i].name, name));
}
- input_line_pointer++; /* skip ',' */
- if ((temp = get_absolute_expression ()) < 0)
+
+ if (lose)
+ as_fatal ("Broken assembler. No assembly attempted.");
+
+ for (i = '0'; i < '8'; ++i)
+ octal[i] = 1;
+ for (i = '0'; i <= '9'; ++i)
+ toHex[i] = i - '0';
+ for (i = 'a'; i <= 'f'; ++i)
+ toHex[i] = i + 10 - 'a';
+ for (i = 'A'; i <= 'F'; ++i)
+ toHex[i] = i + 10 - 'A';
+
+ qsort (priv_reg_table, sizeof (priv_reg_table) / sizeof (priv_reg_table[0]),
+ sizeof (priv_reg_table[0]), cmp_reg_entry);
+
+ /* If -bump, record the architecture level at which we start issuing
+ warnings. The behaviour is different depending upon whether an
+ architecture was explicitly specified. If it wasn't, we issue warnings
+ for all upwards bumps. If it was, we don't start issuing warnings until
+ we need to bump beyond the requested architecture or when we bump between
+ conflicting architectures. */
+
+ if (warn_on_bump
+ && architecture_requested)
{
- as_bad (".COMMon length (%d.) <0! Ignored.", temp);
- ignore_rest_of_line ();
- return;
+ /* `max_architecture' records the requested architecture.
+ Issue warnings if we go above it. */
+ warn_after_architecture = max_architecture;
+
+ /* Find the highest architecture level that doesn't conflict with
+ the requested one. */
+ for (max_architecture = SPARC_OPCODE_ARCH_MAX;
+ max_architecture > warn_after_architecture;
+ --max_architecture)
+ if (! SPARC_OPCODE_CONFLICT_P (max_architecture,
+ warn_after_architecture))
+ break;
}
- size = temp;
- *p = 0;
- symbolP = symbol_find_or_make (name);
- *p = c;
- if (S_IS_DEFINED (symbolP))
+}
+
+/* Called after all assembly has been done. */
+
+void
+sparc_md_end ()
+{
+ if (sparc_arch_size == 64)
{
- as_bad ("Ignoring attempt to re-define symbol");
- ignore_rest_of_line ();
- return;
+ if (current_architecture == SPARC_OPCODE_ARCH_V9A)
+ bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9a);
+ else
+ bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9);
}
- if (S_GET_VALUE (symbolP) != 0)
+ else
{
- if (S_GET_VALUE (symbolP) != size)
+ if (current_architecture == SPARC_OPCODE_ARCH_V9)
+ bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plus);
+ else if (current_architecture == SPARC_OPCODE_ARCH_V9A)
+ bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plusa);
+ else if (current_architecture == SPARC_OPCODE_ARCH_SPARCLET)
+ bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclet);
+ else
{
- as_warn ("Length of .comm \"%s\" is already %ld. Not changed to %d.",
- S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
+ /* The sparclite is treated like a normal sparc. Perhaps it shouldn't
+ be but for now it is (since that's the way it's always been
+ treated). */
+ bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc);
}
}
- else
- {
-#ifndef OBJ_ELF
- S_SET_VALUE (symbolP, (valueT) size);
- S_SET_EXTERNAL (symbolP);
-#endif
- }
- know (symbolP->sy_frag == &zero_address_frag);
- if (*input_line_pointer != ',')
- {
- as_bad ("Expected comma after common length");
- ignore_rest_of_line ();
- return;
- }
- input_line_pointer++;
- SKIP_WHITESPACE ();
- if (*input_line_pointer != '"')
- {
- temp = get_absolute_expression ();
-#ifndef OBJ_ELF
- if (temp > max_alignment)
- {
- temp = max_alignment;
- as_warn ("Common alignment too large: %d. assumed", temp);
- }
-#endif
- if (temp < 0)
- {
- temp = 0;
- as_warn ("Common alignment negative; 0 assumed");
- }
-#ifdef OBJ_ELF
- if (symbolP->local)
- {
- segT old_sec;
- int old_subsec;
- char *p;
- int align;
-
- old_sec = now_seg;
- old_subsec = now_subseg;
- align = temp;
- record_alignment (bss_section, align);
- subseg_set (bss_section, 0);
- if (align)
- frag_align (align, 0, 0);
- if (S_GET_SEGMENT (symbolP) == bss_section)
- symbolP->sy_frag->fr_symbol = 0;
- symbolP->sy_frag = frag_now;
- p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
- (char *) 0);
- *p = 0;
- S_SET_SEGMENT (symbolP, bss_section);
- S_CLEAR_EXTERNAL (symbolP);
- subseg_set (old_sec, old_subsec);
- }
- else
-#endif
- {
- allocate_common:
- S_SET_VALUE (symbolP, (valueT) size);
-#ifdef OBJ_ELF
- S_SET_ALIGN (symbolP, temp);
-#endif
- S_SET_EXTERNAL (symbolP);
- /* should be common, but this is how gas does it for now */
- S_SET_SEGMENT (symbolP, bfd_und_section_ptr);
- }
- }
- else
- {
- input_line_pointer++;
- /* @@ Some use the dot, some don't. Can we get some consistency?? */
- if (*input_line_pointer == '.')
- input_line_pointer++;
- /* @@ Some say data, some say bss. */
- if (strncmp (input_line_pointer, "bss\"", 4)
- && strncmp (input_line_pointer, "data\"", 5))
- {
- while (*--input_line_pointer != '"')
- ;
- input_line_pointer--;
- goto bad_common_segment;
- }
- while (*input_line_pointer++ != '"')
- ;
- goto allocate_common;
- }
+}
+\f
+/* Return non-zero if VAL is in the range -(MAX+1) to MAX. */
-#ifdef BFD_ASSEMBLER
- symbolP->bsym->flags |= BSF_OBJECT;
-#endif
+static INLINE int
+in_signed_range (val, max)
+ bfd_signed_vma val, max;
+{
+ if (max <= 0)
+ abort ();
+ if (val > max)
+ return 0;
+ if (val < ~max)
+ return 0;
+ return 1;
+}
- demand_empty_rest_of_line ();
- return;
+/* Return non-zero if VAL is in the range 0 to MAX. */
- {
- bad_common_segment:
- p = input_line_pointer;
- while (*p && *p != '\n')
- p++;
- c = *p;
- *p = '\0';
- as_bad ("bad .common segment %s", input_line_pointer + 1);
- *p = c;
- input_line_pointer = p;
- ignore_rest_of_line ();
- return;
- }
+static INLINE int
+in_unsigned_range (val, max)
+ bfd_vma val, max;
+{
+ if (val > max)
+ return 0;
+ return 1;
}
-/* Handle the .empty pseudo-op. This supresses the warnings about
- invalid delay slot usage. */
+/* Return non-zero if VAL is in the range -(MAX/2+1) to MAX.
+ (e.g. -15 to +31). */
-static void
-s_empty (ignore)
- int ignore;
+static INLINE int
+in_bitfield_range (val, max)
+ bfd_signed_vma val, max;
{
- /* The easy way to implement is to just forget about the last
- instruction. */
- last_insn = NULL;
+ if (max <= 0)
+ abort ();
+ if (val > max)
+ return 0;
+ if (val < ~(max >> 1))
+ return 0;
+ return 1;
}
-static void
-s_seg (ignore)
- int ignore;
+static int
+sparc_ffs (mask)
+ unsigned int mask;
{
+ int i;
- if (strncmp (input_line_pointer, "\"text\"", 6) == 0)
- {
- input_line_pointer += 6;
- s_text (0);
- return;
- }
- if (strncmp (input_line_pointer, "\"data\"", 6) == 0)
- {
- input_line_pointer += 6;
- s_data (0);
- return;
- }
- if (strncmp (input_line_pointer, "\"data1\"", 7) == 0)
- {
- input_line_pointer += 7;
- s_data1 ();
- return;
- }
- if (strncmp (input_line_pointer, "\"bss\"", 5) == 0)
- {
- input_line_pointer += 5;
- /* We only support 2 segments -- text and data -- for now, so
- things in the "bss segment" will have to go into data for now.
- You can still allocate SEG_BSS stuff with .lcomm or .reserve. */
- subseg_set (data_section, 255); /* FIXME-SOMEDAY */
- return;
- }
- as_bad ("Unknown segment type");
- demand_empty_rest_of_line ();
-}
+ if (mask == 0)
+ return -1;
-static void
-s_data1 ()
-{
- subseg_set (data_section, 1);
- demand_empty_rest_of_line ();
+ for (i = 0; (mask & 1) == 0; ++i)
+ mask >>= 1;
+ return i;
}
-static void
-s_proc (ignore)
- int ignore;
+/* Implement big shift right. */
+static bfd_vma
+BSR (val, amount)
+ bfd_vma val;
+ int amount;
{
- while (!is_end_of_line[(unsigned char) *input_line_pointer])
- {
- ++input_line_pointer;
- }
- ++input_line_pointer;
+ if (sizeof (bfd_vma) <= 4 && amount >= 32)
+ as_fatal ("Support for 64-bit arithmetic not compiled in.");
+ return val >> amount;
}
+\f
+/* For communication between sparc_ip and get_expression. */
+static char *expr_end;
-/* This static variable is set by s_uacons to tell sparc_cons_align
- that the expession does not need to be aligned. */
-
-static int sparc_no_align_cons = 0;
-
-/* This handles the unaligned space allocation pseudo-ops, such as
- .uaword. .uaword is just like .word, but the value does not need
- to be aligned. */
+/* For communication between md_assemble and sparc_ip. */
+static int special_case;
-static void
-s_uacons (bytes)
- int bytes;
-{
- /* Tell sparc_cons_align not to align this value. */
- sparc_no_align_cons = 1;
- cons (bytes);
-}
+/* Values for `special_case'.
+ Instructions that require wierd handling because they're longer than
+ 4 bytes. */
+#define SPECIAL_CASE_NONE 0
+#define SPECIAL_CASE_SET 1
+#define SPECIAL_CASE_SETSW 2
+#define SPECIAL_CASE_SETX 3
+/* FIXME: sparc-opc.c doesn't have necessary "S" trigger to enable this. */
+#define SPECIAL_CASE_FDIV 4
-/* If the --enforce-aligned-data option is used, we require .word,
- et. al., to be aligned correctly. We do it by setting up an
- rs_align_code frag, and checking in HANDLE_ALIGN to make sure that
- no unexpected alignment was introduced.
+/* Bit masks of various insns. */
+#define NOP_INSN 0x01000000
+#define OR_INSN 0x80100000
+#define FMOVS_INSN 0x81A00020
+#define SETHI_INSN 0x01000000
+#define SLLX_INSN 0x81281000
+#define SRA_INSN 0x81380000
- The SunOS and Solaris native assemblers enforce aligned data by
- default. We don't want to do that, because gcc can deliberately
- generate misaligned data if the packed attribute is used. Instead,
- we permit misaligned data by default, and permit the user to set an
- option to check for it. */
+/* The last instruction to be assembled. */
+static const struct sparc_opcode *last_insn;
+/* The assembled opcode of `last_insn'. */
+static unsigned long last_opcode;
+\f
+/* Main entry point to assemble one instruction. */
void
-sparc_cons_align (nbytes)
- int nbytes;
+md_assemble (str)
+ char *str;
{
- int nalign;
- char *p;
-
- /* Only do this if we are enforcing aligned data. */
- if (! enforce_aligned_data)
- return;
+ const struct sparc_opcode *insn;
- if (sparc_no_align_cons)
- {
- /* This is an unaligned pseudo-op. */
- sparc_no_align_cons = 0;
- return;
- }
+ know (str);
+ special_case = SPECIAL_CASE_NONE;
+ sparc_ip (str, &insn);
- nalign = 0;
- while ((nbytes & 1) == 0)
- {
- ++nalign;
- nbytes >>= 1;
- }
-
- if (nalign == 0)
- return;
-
- if (now_seg == absolute_section)
- {
- if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
- as_bad ("misaligned data");
- return;
- }
-
- p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0,
- (symbolS *) NULL, (long) nalign, (char *) NULL);
-
- record_alignment (now_seg, nalign);
-}
-
-/* This is where we do the unexpected alignment check. */
-
-void
-sparc_handle_align (fragp)
- fragS *fragp;
-{
- if (fragp->fr_type == rs_align_code
- && fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix != 0)
- as_bad_where (fragp->fr_file, fragp->fr_line, "misaligned data");
-}
-
-/* sparc64 priviledged registers */
-
-struct priv_reg_entry
- {
- char *name;
- int regnum;
- };
-
-struct priv_reg_entry priv_reg_table[] =
-{
- {"tpc", 0},
- {"tnpc", 1},
- {"tstate", 2},
- {"tt", 3},
- {"tick", 4},
- {"tba", 5},
- {"pstate", 6},
- {"tl", 7},
- {"pil", 8},
- {"cwp", 9},
- {"cansave", 10},
- {"canrestore", 11},
- {"cleanwin", 12},
- {"otherwin", 13},
- {"wstate", 14},
- {"fq", 15},
- {"ver", 31},
- {"", -1}, /* end marker */
-};
-
-static int
-cmp_reg_entry (p, q)
- struct priv_reg_entry *p, *q;
-{
- return strcmp (q->name, p->name);
-}
-
-/* This function is called once, at assembler startup time. It should
- set up all the tables, etc. that the MD part of the assembler will need. */
-
-void
-md_begin ()
-{
- register const char *retval = NULL;
- int lose = 0;
- register unsigned int i = 0;
-
- op_hash = hash_new ();
-
- while (i < sparc_num_opcodes)
- {
- const char *name = sparc_opcodes[i].name;
- retval = hash_insert (op_hash, name, &sparc_opcodes[i]);
- if (retval != NULL)
- {
- fprintf (stderr, "internal error: can't hash `%s': %s\n",
- sparc_opcodes[i].name, retval);
- lose = 1;
- }
- do
- {
- if (sparc_opcodes[i].match & sparc_opcodes[i].lose)
- {
- fprintf (stderr, "internal error: losing opcode: `%s' \"%s\"\n",
- sparc_opcodes[i].name, sparc_opcodes[i].args);
- lose = 1;
- }
- ++i;
- }
- while (i < sparc_num_opcodes
- && !strcmp (sparc_opcodes[i].name, name));
- }
-
- if (lose)
- as_fatal ("Broken assembler. No assembly attempted.");
-
- for (i = '0'; i < '8'; ++i)
- octal[i] = 1;
- for (i = '0'; i <= '9'; ++i)
- toHex[i] = i - '0';
- for (i = 'a'; i <= 'f'; ++i)
- toHex[i] = i + 10 - 'a';
- for (i = 'A'; i <= 'F'; ++i)
- toHex[i] = i + 10 - 'A';
-
- qsort (priv_reg_table, sizeof (priv_reg_table) / sizeof (priv_reg_table[0]),
- sizeof (priv_reg_table[0]), cmp_reg_entry);
-
- /* If -bump, record the architecture level at which we start issuing
- warnings. The behaviour is different depending upon whether an
- architecture was explicitly specified. If it wasn't, we issue warnings
- for all upwards bumps. If it was, we don't start issuing warnings until
- we need to bump beyond the requested architecture or when we bump between
- conflicting architectures. */
-
- if (warn_on_bump
- && architecture_requested)
- {
- /* `max_architecture' records the requested architecture.
- Issue warnings if we go above it. */
- warn_after_architecture = max_architecture;
-
- /* Find the highest architecture level that doesn't conflict with
- the requested one. */
- for (max_architecture = SPARC_OPCODE_ARCH_MAX;
- max_architecture > warn_after_architecture;
- --max_architecture)
- if (! SPARC_OPCODE_CONFLICT_P (max_architecture,
- warn_after_architecture))
- break;
- }
-}
-
-/* Called after all assembly has been done. */
-
-void
-sparc_md_end ()
-{
-#ifdef SPARC_ARCH64
- if (current_architecture == SPARC_OPCODE_ARCH_V9A)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9a);
- else
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9);
-#else
- if (current_architecture == SPARC_OPCODE_ARCH_V9)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plus);
- else if (current_architecture == SPARC_OPCODE_ARCH_V9A)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plusa);
- else if (current_architecture == SPARC_OPCODE_ARCH_SPARCLET)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclet);
- else
- {
- /* The sparclite is treated like a normal sparc. Perhaps it shouldn't
- be but for now it is (since that's the way it's always been
- treated). */
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc);
- }
-#endif
-}
-
-/* Utility to output one insn. */
-
-static void
-output_insn (insn, the_insn)
- const struct sparc_opcode *insn;
- struct sparc_it *the_insn;
-{
- char *toP = frag_more (4);
-
- /* put out the opcode */
- if (INSN_BIG_ENDIAN)
- number_to_chars_bigendian (toP, (valueT) the_insn->opcode, 4);
- else
- number_to_chars_littleendian (toP, (valueT) the_insn->opcode, 4);
-
- /* put out the symbol-dependent stuff */
- if (the_insn->reloc != BFD_RELOC_NONE)
- {
- fix_new_exp (frag_now, /* which frag */
- (toP - frag_now->fr_literal), /* where */
- 4, /* size */
- &the_insn->exp,
- the_insn->pcrel,
- the_insn->reloc);
- }
-
- last_insn = insn;
-}
-
-void
-md_assemble (str)
- char *str;
-{
- const struct sparc_opcode *insn;
-
- know (str);
- special_case = 0;
- sparc_ip (str, &insn);
-
- /* We warn about attempts to put a floating point branch in a delay slot. */
+ /* We warn about attempts to put a floating point branch in a delay slot,
+ unless the delay slot has been annulled. */
if (insn != NULL
&& last_insn != NULL
&& (insn->flags & F_FBR) != 0
- && (last_insn->flags & F_DELAYED) != 0)
+ && (last_insn->flags & F_DELAYED) != 0
+ /* ??? This test isn't completely accurate. We assume anything with
+ F_{UNBR,CONDBR,FBR} set is annullable. */
+ && ((last_insn->flags & (F_UNBR | F_CONDBR | F_FBR)) == 0
+ || (last_opcode & ANNUL) == 0))
as_warn ("FP branch in delay slot");
/* SPARC before v9 requires a nop instruction between a floating
switch (special_case)
{
- case 0:
+ case SPECIAL_CASE_NONE:
/* normal insn */
output_insn (insn, &the_insn);
break;
}
}
-/* Parse an argument that can be expressed as a keyword.
- (eg: #StoreStore or %ccfr).
- The result is a boolean indicating success.
- If successful, INPUT_POINTER is updated. */
-
-static int
-parse_keyword_arg (lookup_fn, input_pointerP, valueP)
- int (*lookup_fn) ();
- char **input_pointerP;
- int *valueP;
-{
- int value;
- char c, *p, *q;
-
- p = *input_pointerP;
- for (q = p + (*p == '#' || *p == '%'); isalpha (*q) || *q == '_'; ++q)
- continue;
- c = *q;
- *q = 0;
- value = (*lookup_fn) (p);
- *q = c;
- if (value == -1)
- return 0;
- *valueP = value;
- *input_pointerP = q;
- return 1;
-}
-
-/* Parse an argument that is a constant expression.
- The result is a boolean indicating success. */
-
-static int
-parse_const_expr_arg (input_pointerP, valueP)
- char **input_pointerP;
- int *valueP;
-{
- char *save = input_line_pointer;
- expressionS exp;
-
- input_line_pointer = *input_pointerP;
- /* The next expression may be something other than a constant
- (say if we're not processing the right variant of the insn).
- Don't call expression unless we're sure it will succeed as it will
- signal an error (which we want to defer until later). */
- /* FIXME: It might be better to define md_operand and have it recognize
- things like %asi, etc. but continuing that route through to the end
- is a lot of work. */
- if (*input_line_pointer == '%')
- {
- input_line_pointer = save;
- return 0;
- }
- expression (&exp);
- *input_pointerP = input_line_pointer;
- input_line_pointer = save;
- if (exp.X_op != O_constant)
- return 0;
- *valueP = exp.X_add_number;
- return 1;
-}
+/* Subroutine of md_assemble to do the actual parsing. */
static void
sparc_ip (str, pinsn)
unsigned int mask = 0;
int match = 0;
int comma = 0;
- long immediate_max = 0;
int v9_arg_p;
for (s = str; islower (*s) || (*s >= '0' && *s <= '3'); ++s)
case 'I':
the_insn.reloc = BFD_RELOC_SPARC_11;
- immediate_max = 0x03FF;
goto immediate;
case 'j':
the_insn.reloc = BFD_RELOC_SPARC_10;
- immediate_max = 0x01FF;
goto immediate;
case 'X':
the_insn.reloc = BFD_RELOC_SPARC13;
/* These fields are unsigned, but for upward compatibility,
allow negative values as well. */
- immediate_max = 0x1f;
goto immediate;
case 'Y':
the_insn.reloc = BFD_RELOC_SPARC13;
/* These fields are unsigned, but for upward compatibility,
allow negative values as well. */
- immediate_max = 0x3f;
goto immediate;
case 'k':
case 'i': /* 13 bit immediate */
the_insn.reloc = BFD_RELOC_SPARC13;
- immediate_max = 0x0FFF;
- /*FALLTHROUGH */
+ /* fallthrough */
immediate:
if (*s == ' ')
s++;
+
+ /* Check for %hi, etc. */
if (*s == '%')
{
- if ((c = s[1]) == 'h' && s[2] == 'i')
- {
- the_insn.reloc = BFD_RELOC_HI22;
- s += 3;
- }
- else if (c == 'l' && s[2] == 'o')
- {
- the_insn.reloc = BFD_RELOC_LO10;
- s += 3;
- }
- else if (c == 'u'
- && s[2] == 'h'
- && s[3] == 'i')
- {
- the_insn.reloc = BFD_RELOC_SPARC_HH22;
- s += 4;
- v9_arg_p = 1;
- }
- else if (c == 'u'
- && s[2] == 'l'
- && s[3] == 'o')
- {
- the_insn.reloc = BFD_RELOC_SPARC_HM10;
- s += 4;
- v9_arg_p = 1;
- }
- else
+ static struct ops {
+ /* The name as it appears in assembler. */
+ char *name;
+ /* strlen (name), precomputed for speed */
+ int len;
+ /* The reloc this pseudo-op translates to. */
+ int reloc;
+ /* Non-zero if for v9 only. */
+ int v9_p;
+ /* Non-zero if can be used in pc-relative contexts. */
+ int pcrel_p;/*FIXME:wip*/
+ } ops[] = {
+ /* hix/lox must appear before hi/lo so %hix won't be
+ mistaken for %hi. */
+ { "hix", 3, BFD_RELOC_SPARC_HIX22, 1, 0 },
+ { "lox", 3, BFD_RELOC_SPARC_LOX10, 1, 0 },
+ { "hi", 2, BFD_RELOC_HI22, 0, 1 },
+ { "lo", 2, BFD_RELOC_LO10, 0, 1 },
+ { "hh", 2, BFD_RELOC_SPARC_HH22, 1, 1 },
+ { "hm", 2, BFD_RELOC_SPARC_HM10, 1, 1 },
+ { "lm", 2, BFD_RELOC_SPARC_LM22, 1, 1 },
+ { "h44", 3, BFD_RELOC_SPARC_H44, 1, 0 },
+ { "m44", 3, BFD_RELOC_SPARC_M44, 1, 0 },
+ { "l44", 3, BFD_RELOC_SPARC_L44, 1, 0 },
+ { "uhi", 3, BFD_RELOC_SPARC_HH22, 1, 0 },
+ { "ulo", 3, BFD_RELOC_SPARC_HM10, 1, 0 },
+ { NULL }
+ };
+ struct ops *o;
+
+ for (o = ops; o->name; o++)
+ if (strncmp (s + 1, o->name, o->len) == 0)
+ break;
+ if (o->name == NULL)
break;
+
+ the_insn.reloc = o->reloc;
+ s += o->len + 1;
+ v9_arg_p = o->v9_p;
}
- /* Note that if the getExpression() fails, we will still
+
+ /* Note that if the get_expression() fails, we will still
have created U entries in the symbol table for the
'symbols' in the input string. Try not to create U
symbols for registers, etc. */
{
s1 -= 3;
*s1 = '\0';
- (void) getExpression (s);
+ (void) get_expression (s);
*s1 = '+';
s = s1;
continue;
{
s1 -= 4;
*s1 = '\0';
- (void) getExpression (s);
+ (void) get_expression (s);
*s1 = '+';
s = s1;
continue;
}
}
}
- (void) getExpression (s);
+ (void) get_expression (s);
s = expr_end;
+ /* Check for constants that don't require emitting a reloc. */
if (the_insn.exp.X_op == O_constant
&& the_insn.exp.X_add_symbol == 0
&& the_insn.exp.X_op_symbol == 0)
{
- /* Handle %uhi/%ulo by moving the upper word to the lower
- one and pretending it's %hi/%lo. We also need to watch
- for %hi/%lo: the top word needs to be zeroed otherwise
- fixup_segment will complain the value is too big. */
- switch (the_insn.reloc)
- {
- case BFD_RELOC_SPARC_HH22:
- the_insn.reloc = BFD_RELOC_HI22;
- the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32);
- break;
- case BFD_RELOC_SPARC_HM10:
- the_insn.reloc = BFD_RELOC_LO10;
- the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32);
- break;
- case BFD_RELOC_HI22:
- case BFD_RELOC_LO10:
- the_insn.exp.X_add_number &= 0xffffffff;
- break;
- default:
- break;
- }
-
/* For pc-relative call instructions, we reject
constants to get better code. */
if (the_insn.pcrel
&& the_insn.reloc == BFD_RELOC_32_PCREL_S2
- && in_signed_range (the_insn.exp.X_add_number, 0x3fff)
- )
+ && in_signed_range (the_insn.exp.X_add_number, 0x3fff))
{
error_message = ": PC-relative operand can't be a constant";
goto error;
}
- /* Check for invalid constant values. Don't warn if
- constant was inside %hi or %lo, since these
- truncate the constant to fit. */
- if (immediate_max != 0
- && the_insn.reloc != BFD_RELOC_LO10
- && the_insn.reloc != BFD_RELOC_HI22
- && !in_signed_range (the_insn.exp.X_add_number,
- immediate_max)
- )
- {
- if (the_insn.pcrel)
- /* Who knows? After relocation, we may be within
- range. Let the linker figure it out. */
- {
- the_insn.exp.X_op = O_symbol;
- the_insn.exp.X_add_symbol = section_symbol (absolute_section);
- }
- else
- /* Immediate value is non-pcrel, and out of
- range. */
- as_bad ("constant value %ld out of range (%ld .. %ld)",
- the_insn.exp.X_add_number,
- ~immediate_max, immediate_max);
- }
- }
- /* Reset to prevent extraneous range check. */
- immediate_max = 0;
+ /* Constants that won't fit are checked in md_apply_fix3
+ and bfd_install_relocation.
+ ??? It would be preferable to install the constants
+ into the insn here and save having to create a fixS
+ for each one. There already exists code to handle
+ all the various cases (e.g. in md_apply_fix3 and
+ bfd_install_relocation) so duplicating all that code
+ here isn't right. */
+ }
continue;
the_insn.opcode = opcode;
}
+/* Parse an argument that can be expressed as a keyword.
+ (eg: #StoreStore or %ccfr).
+ The result is a boolean indicating success.
+ If successful, INPUT_POINTER is updated. */
+
+static int
+parse_keyword_arg (lookup_fn, input_pointerP, valueP)
+ int (*lookup_fn) PARAMS ((const char *));
+ char **input_pointerP;
+ int *valueP;
+{
+ int value;
+ char c, *p, *q;
+
+ p = *input_pointerP;
+ for (q = p + (*p == '#' || *p == '%'); isalnum (*q) || *q == '_'; ++q)
+ continue;
+ c = *q;
+ *q = 0;
+ value = (*lookup_fn) (p);
+ *q = c;
+ if (value == -1)
+ return 0;
+ *valueP = value;
+ *input_pointerP = q;
+ return 1;
+}
+
+/* Parse an argument that is a constant expression.
+ The result is a boolean indicating success. */
+
+static int
+parse_const_expr_arg (input_pointerP, valueP)
+ char **input_pointerP;
+ int *valueP;
+{
+ char *save = input_line_pointer;
+ expressionS exp;
+
+ input_line_pointer = *input_pointerP;
+ /* The next expression may be something other than a constant
+ (say if we're not processing the right variant of the insn).
+ Don't call expression unless we're sure it will succeed as it will
+ signal an error (which we want to defer until later). */
+ /* FIXME: It might be better to define md_operand and have it recognize
+ things like %asi, etc. but continuing that route through to the end
+ is a lot of work. */
+ if (*input_line_pointer == '%')
+ {
+ input_line_pointer = save;
+ return 0;
+ }
+ expression (&exp);
+ *input_pointerP = input_line_pointer;
+ input_line_pointer = save;
+ if (exp.X_op != O_constant)
+ return 0;
+ *valueP = exp.X_add_number;
+ return 1;
+}
+
+/* Subroutine of sparc_ip to parse an expression. */
+
static int
-getExpression (str)
+get_expression (str)
char *str;
{
char *save_in;
expr_end = input_line_pointer;
input_line_pointer = save_in;
return 0;
-} /* getExpression() */
+}
+
+/* Subroutine of md_assemble to output one insn. */
+
+static void
+output_insn (insn, the_insn)
+ const struct sparc_opcode *insn;
+ struct sparc_it *the_insn;
+{
+ char *toP = frag_more (4);
+
+ /* put out the opcode */
+ if (INSN_BIG_ENDIAN)
+ number_to_chars_bigendian (toP, (valueT) the_insn->opcode, 4);
+ else
+ number_to_chars_littleendian (toP, (valueT) the_insn->opcode, 4);
+ /* put out the symbol-dependent stuff */
+ if (the_insn->reloc != BFD_RELOC_NONE)
+ {
+ fixS *fixP = fix_new_exp (frag_now, /* which frag */
+ (toP - frag_now->fr_literal), /* where */
+ 4, /* size */
+ &the_insn->exp,
+ the_insn->pcrel,
+ the_insn->reloc);
+ /* Turn off overflow checking in fixup_segment. We'll do our
+ own overflow checking in md_apply_fix3. This is necessary because
+ the insn size is 4 and fixup_segment will signal an overflow for
+ large 8 byte quantities. */
+ fixP->fx_no_overflow = 1;
+ }
+ last_insn = insn;
+ last_opcode = the_insn->opcode;
+}
+\f
/*
This is identical to the md_atof in m68k.c. I think this is right,
but I'm not sure.
int i,prec;
LITTLENUM_TYPE words[MAX_LITTLENUMS];
char *t;
- char *atof_ieee ();
switch (type)
{
else
number_to_chars_littleendian (buf, val, n);
}
-
+\f
/* Apply a fixS to the frags, now that we know the value it ought to
hold. */
case BFD_RELOC_SPARC_11:
if (! in_signed_range (val, 0x7ff))
- as_bad ("relocation overflow.");
+ as_bad_where (fixP->fx_file, fixP->fx_line, "relocation overflow");
insn |= val & 0x7ff;
break;
case BFD_RELOC_SPARC_10:
if (! in_signed_range (val, 0x3ff))
- as_bad ("relocation overflow.");
+ as_bad_where (fixP->fx_file, fixP->fx_line, "relocation overflow");
insn |= val & 0x3ff;
break;
+ case BFD_RELOC_SPARC_7:
+ if (! in_bitfield_range (val, 0x7f))
+ as_bad_where (fixP->fx_file, fixP->fx_line, "relocation overflow");
+ insn |= val & 0x7f;
+ break;
+
case BFD_RELOC_SPARC_6:
if (! in_bitfield_range (val, 0x3f))
- as_bad ("relocation overflow.");
+ as_bad_where (fixP->fx_file, fixP->fx_line, "relocation overflow");
insn |= val & 0x3f;
break;
case BFD_RELOC_SPARC_5:
if (! in_bitfield_range (val, 0x1f))
- as_bad ("relocation overflow.");
+ as_bad_where (fixP->fx_file, fixP->fx_line, "relocation overflow");
insn |= val & 0x1f;
break;
/* FIXME: simplify */
if (((val > 0) && (val & ~0x3fffc))
|| ((val < 0) && (~(val - 1) & ~0x3fffc)))
- as_bad ("relocation overflow.");
+ as_bad_where (fixP->fx_file, fixP->fx_line, "relocation overflow");
/* FIXME: The +1 deserves a comment. */
val = (val >> 2) + 1;
insn |= ((val & 0xc000) << 6) | (val & 0x3fff);
/* FIXME: simplify */
if (((val > 0) && (val & ~0x1ffffc))
|| ((val < 0) && (~(val - 1) & ~0x1ffffc)))
- as_bad ("relocation overflow.");
+ as_bad_where (fixP->fx_file, fixP->fx_line, "relocation overflow");
/* FIXME: The +1 deserves a comment. */
val = (val >> 2) + 1;
insn |= val & 0x7ffff;
case BFD_RELOC_SPARC_LM22:
case BFD_RELOC_HI22:
+ /* FIXME: HI22 should signal overflow for 64 bit ABI. */
if (!fixP->fx_addsy)
{
insn |= (val >> 10) & 0x3fffff;
case BFD_RELOC_SPARC22:
if (val & ~0x003fffff)
- as_bad ("relocation overflow");
+ as_bad_where (fixP->fx_file, fixP->fx_line, "relocation overflow");
insn |= (val & 0x3fffff);
break;
case BFD_RELOC_SPARC13:
if (! in_signed_range (val, 0x1fff))
- as_bad ("relocation overflow");
+ as_bad_where (fixP->fx_file, fixP->fx_line, "relocation overflow");
insn |= val & 0x1fff;
break;
insn |= val & 0x3fffff;
break;
+ case BFD_RELOC_SPARC_H44:
+ if (!fixP->fx_addsy)
+ {
+ bfd_vma tval = val;
+ tval >>= 22;
+ if (! in_unsigned_range (tval, 0x3fffff))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "relocation overflow");
+ insn |= tval & 0x3fffff;
+ }
+ break;
+
+ case BFD_RELOC_SPARC_M44:
+ if (!fixP->fx_addsy)
+ insn |= (val >> 12) & 0x3ff;
+ break;
+
+ case BFD_RELOC_SPARC_L44:
+ if (!fixP->fx_addsy)
+ insn |= val & 0xfff;
+ break;
+
+ case BFD_RELOC_SPARC_HIX22:
+ if (!fixP->fx_addsy)
+ {
+ val ^= ~ (offsetT) 0;
+ if ((val & ~ (offsetT) 0xffffffff) != 0)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "relocation overflow");
+ insn |= (val >> 10) & 0x3fffff;
+ }
+ break;
+
+ case BFD_RELOC_SPARC_LOX10:
+ if (!fixP->fx_addsy)
+ insn |= 0x1c00 | (val & 0x3ff);
+ break;
+
case BFD_RELOC_NONE:
default:
- as_bad ("bad or unhandled relocation type: 0x%02x", fixP->fx_r_type);
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "bad or unhandled relocation type: 0x%02x",
+ fixP->fx_r_type);
break;
}
case BFD_RELOC_64:
case BFD_RELOC_SPARC_5:
case BFD_RELOC_SPARC_6:
+ case BFD_RELOC_SPARC_7:
case BFD_RELOC_SPARC_10:
case BFD_RELOC_SPARC_11:
case BFD_RELOC_SPARC_HH22:
case BFD_RELOC_SPARC_PC_HH22:
case BFD_RELOC_SPARC_PC_HM10:
case BFD_RELOC_SPARC_PC_LM22:
+ case BFD_RELOC_SPARC_H44:
+ case BFD_RELOC_SPARC_M44:
+ case BFD_RELOC_SPARC_L44:
+ case BFD_RELOC_SPARC_HIX22:
+ case BFD_RELOC_SPARC_LOX10:
code = fixp->fx_r_type;
break;
default:
{
case BFD_RELOC_32_PCREL_S2:
if (! S_IS_DEFINED (fixp->fx_addsy)
+ || S_IS_COMMON (fixp->fx_addsy)
|| S_IS_EXTERNAL (fixp->fx_addsy)
|| S_IS_WEAK (fixp->fx_addsy))
code = BFD_RELOC_SPARC_WPLT30;
return reloc;
}
+\f
+/* We have no need to default values of symbols. */
+
+/* ARGSUSED */
+symbolS *
+md_undefined_symbol (name)
+ char *name;
+{
+ return 0;
+} /* md_undefined_symbol() */
+/* Round up a section size to the appropriate boundary. */
+valueT
+md_section_align (segment, size)
+ segT segment;
+ valueT size;
+{
+#ifndef OBJ_ELF
+ /* This is not right for ELF; a.out wants it, and COFF will force
+ the alignment anyways. */
+ valueT align = ((valueT) 1
+ << (valueT) bfd_get_section_alignment (stdoutput, segment));
+ valueT newsize;
+ /* turn alignment value into a mask */
+ align--;
+ newsize = (size + align) & ~align;
+ return newsize;
+#else
+ return size;
+#endif
+}
-#if 0
-/* for debugging only */
-static void
-print_insn (insn)
- struct sparc_it *insn;
+/* Exactly what point is a PC-relative offset relative TO?
+ On the sparc, they're relative to the address of the offset, plus
+ its size. This gets us to the following instruction.
+ (??? Is this right? FIXME-SOON) */
+long
+md_pcrel_from (fixP)
+ fixS *fixP;
{
- const char *const Reloc[] = {
- "RELOC_8",
- "RELOC_16",
- "RELOC_32",
- "RELOC_DISP8",
- "RELOC_DISP16",
- "RELOC_DISP32",
- "RELOC_WDISP30",
- "RELOC_WDISP22",
- "RELOC_HI22",
- "RELOC_22",
- "RELOC_13",
- "RELOC_LO10",
- "RELOC_SFA_BASE",
- "RELOC_SFA_OFF13",
- "RELOC_BASE10",
- "RELOC_BASE13",
- "RELOC_BASE22",
- "RELOC_PC10",
- "RELOC_PC22",
- "RELOC_JMP_TBL",
- "RELOC_SEGOFF16",
- "RELOC_GLOB_DAT",
- "RELOC_JMP_SLOT",
- "RELOC_RELATIVE",
- "NO_RELOC"
- };
+ long ret;
- if (insn->error)
- fprintf (stderr, "ERROR: %s\n");
- fprintf (stderr, "opcode=0x%08x\n", insn->opcode);
- fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]);
- fprintf (stderr, "exp = {\n");
- fprintf (stderr, "\t\tX_add_symbol = %s\n",
- ((insn->exp.X_add_symbol != NULL)
- ? ((S_GET_NAME (insn->exp.X_add_symbol) != NULL)
- ? S_GET_NAME (insn->exp.X_add_symbol)
- : "???")
- : "0"));
- fprintf (stderr, "\t\tX_sub_symbol = %s\n",
- ((insn->exp.X_op_symbol != NULL)
- ? (S_GET_NAME (insn->exp.X_op_symbol)
- ? S_GET_NAME (insn->exp.X_op_symbol)
- : "???")
- : "0"));
- fprintf (stderr, "\t\tX_add_number = %d\n",
- insn->exp.X_add_number);
- fprintf (stderr, "}\n");
+ ret = fixP->fx_where + fixP->fx_frag->fr_address;
+ if (! sparc_pic_code
+ || fixP->fx_addsy == NULL
+ || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0)
+ ret += fixP->fx_size;
+ return ret;
}
-#endif
\f
/*
- * md_parse_option
- * Invocation line includes a switch not recognized by the base assembler.
- * See if it's a processor-specific option. These are:
- *
- * -bump
- * Warn on architecture bumps. See also -A.
- *
- * -Av6, -Av7, -Av8, -Av9, -Av9a, -Asparclite
- * -xarch=v8plus, -xarch=v8plusa
- * Select the architecture. Instructions or features not
- * supported by the selected architecture cause fatal errors.
- *
- * The default is to start at v6, and bump the architecture up
- * whenever an instruction is seen at a higher level. If 32 bit
- * environments, v9 is not bumped up to, the user must pass -Av9.
- *
- * -xarch=v8plus{,a} is for compatibility with the Sun assembler.
- *
- * If -bump is specified, a warning is printing when bumping to
- * higher levels.
- *
- * If an architecture is specified, all instructions must match
- * that architecture. Any higher level instructions are flagged
- * as errors. Note that in the 32 bit environment specifying
- * -Av9 does not automatically create a v9 object file, a v9
- * insn must be seen.
- *
- * If both an architecture and -bump are specified, the
- * architecture starts at the specified level, but bumps are
- * warnings. Note that we can't set `current_architecture' to
- * the requested level in this case: in the 32 bit environment,
- * we still must avoid creating v9 object files unless v9 insns
- * are seen.
- *
- * Note:
- * Bumping between incompatible architectures is always an
- * error. For example, from sparclite to v9.
+ * sort of like s_lcomm
*/
-#ifdef OBJ_ELF
-CONST char *md_shortopts = "A:K:VQ:sq";
-#else
-#ifdef OBJ_AOUT
-CONST char *md_shortopts = "A:k";
-#else
-CONST char *md_shortopts = "A:";
+#ifndef OBJ_ELF
+static int max_alignment = 15;
#endif
+
+static void
+s_reserve (ignore)
+ int ignore;
+{
+ char *name;
+ char *p;
+ char c;
+ int align;
+ int size;
+ int temp;
+ symbolS *symbolP;
+
+ name = input_line_pointer;
+ c = get_symbol_end ();
+ p = input_line_pointer;
+ *p = c;
+ SKIP_WHITESPACE ();
+
+ if (*input_line_pointer != ',')
+ {
+ as_bad ("Expected comma after name");
+ ignore_rest_of_line ();
+ return;
+ }
+
+ ++input_line_pointer;
+
+ if ((size = get_absolute_expression ()) < 0)
+ {
+ as_bad ("BSS length (%d.) <0! Ignored.", size);
+ ignore_rest_of_line ();
+ return;
+ } /* bad length */
+
+ *p = 0;
+ symbolP = symbol_find_or_make (name);
+ *p = c;
+
+ if (strncmp (input_line_pointer, ",\"bss\"", 6) != 0
+ && strncmp (input_line_pointer, ",\".bss\"", 7) != 0)
+ {
+ as_bad ("bad .reserve segment -- expected BSS segment");
+ return;
+ }
+
+ if (input_line_pointer[2] == '.')
+ input_line_pointer += 7;
+ else
+ input_line_pointer += 6;
+ SKIP_WHITESPACE ();
+
+ if (*input_line_pointer == ',')
+ {
+ ++input_line_pointer;
+
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer == '\n')
+ {
+ as_bad ("Missing alignment");
+ return;
+ }
+
+ align = get_absolute_expression ();
+#ifndef OBJ_ELF
+ if (align > max_alignment)
+ {
+ align = max_alignment;
+ as_warn ("Alignment too large: %d. assumed.", align);
+ }
#endif
-struct option md_longopts[] = {
-#define OPTION_BUMP (OPTION_MD_BASE)
- {"bump", no_argument, NULL, OPTION_BUMP},
-#define OPTION_SPARC (OPTION_MD_BASE + 1)
- {"sparc", no_argument, NULL, OPTION_SPARC},
-#define OPTION_XARCH (OPTION_MD_BASE + 2)
- {"xarch", required_argument, NULL, OPTION_XARCH},
-#ifdef SPARC_BIENDIAN
-#define OPTION_LITTLE_ENDIAN (OPTION_MD_BASE + 3)
- {"EL", no_argument, NULL, OPTION_LITTLE_ENDIAN},
-#define OPTION_BIG_ENDIAN (OPTION_MD_BASE + 4)
- {"EB", no_argument, NULL, OPTION_BIG_ENDIAN},
+ if (align < 0)
+ {
+ align = 0;
+ as_warn ("Alignment negative. 0 assumed.");
+ }
+
+ record_alignment (bss_section, align);
+
+ /* convert to a power of 2 alignment */
+ for (temp = 0; (align & 1) == 0; align >>= 1, ++temp);;
+
+ if (align != 1)
+ {
+ as_bad ("Alignment not a power of 2");
+ ignore_rest_of_line ();
+ return;
+ } /* not a power of two */
+
+ align = temp;
+ } /* if has optional alignment */
+ else
+ align = 0;
+
+ if (!S_IS_DEFINED (symbolP)
+#ifdef OBJ_AOUT
+ && S_GET_OTHER (symbolP) == 0
+ && S_GET_DESC (symbolP) == 0
#endif
-#define OPTION_ENFORCE_ALIGNED_DATA (OPTION_MD_BASE + 5)
- {"enforce-aligned-data", no_argument, NULL, OPTION_ENFORCE_ALIGNED_DATA},
- {NULL, no_argument, NULL, 0}
-};
-size_t md_longopts_size = sizeof(md_longopts);
+ )
+ {
+ if (! need_pass_2)
+ {
+ char *pfrag;
+ segT current_seg = now_seg;
+ subsegT current_subseg = now_subseg;
-int
-md_parse_option (c, arg)
- int c;
- char *arg;
+ subseg_set (bss_section, 1); /* switch to bss */
+
+ if (align)
+ frag_align (align, 0, 0); /* do alignment */
+
+ /* detach from old frag */
+ if (S_GET_SEGMENT(symbolP) == bss_section)
+ symbolP->sy_frag->fr_symbol = NULL;
+
+ symbolP->sy_frag = frag_now;
+ pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP,
+ (offsetT) size, (char *)0);
+ *pfrag = 0;
+
+ S_SET_SEGMENT (symbolP, bss_section);
+
+ subseg_set (current_seg, current_subseg);
+ }
+ }
+ else
+ {
+ as_warn("Ignoring attempt to re-define symbol %s",
+ S_GET_NAME (symbolP));
+ } /* if not redefining */
+
+ demand_empty_rest_of_line ();
+}
+
+static void
+s_common (ignore)
+ int ignore;
{
- switch (c)
+ char *name;
+ char c;
+ char *p;
+ int temp, size;
+ symbolS *symbolP;
+
+ name = input_line_pointer;
+ c = get_symbol_end ();
+ /* just after name is now '\0' */
+ p = input_line_pointer;
+ *p = c;
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer != ',')
{
- case OPTION_BUMP:
- warn_on_bump = 1;
- warn_after_architecture = SPARC_OPCODE_ARCH_V6;
- break;
+ as_bad ("Expected comma after symbol-name");
+ ignore_rest_of_line ();
+ return;
+ }
+ input_line_pointer++; /* skip ',' */
+ if ((temp = get_absolute_expression ()) < 0)
+ {
+ as_bad (".COMMon length (%d.) <0! Ignored.", temp);
+ ignore_rest_of_line ();
+ return;
+ }
+ size = temp;
+ *p = 0;
+ symbolP = symbol_find_or_make (name);
+ *p = c;
+ if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
+ {
+ as_bad ("Ignoring attempt to re-define symbol");
+ ignore_rest_of_line ();
+ return;
+ }
+ if (S_GET_VALUE (symbolP) != 0)
+ {
+ if (S_GET_VALUE (symbolP) != size)
+ {
+ as_warn ("Length of .comm \"%s\" is already %ld. Not changed to %d.",
+ S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
+ }
+ }
+ else
+ {
+#ifndef OBJ_ELF
+ S_SET_VALUE (symbolP, (valueT) size);
+ S_SET_EXTERNAL (symbolP);
+#endif
+ }
+ know (symbolP->sy_frag == &zero_address_frag);
+ if (*input_line_pointer != ',')
+ {
+ as_bad ("Expected comma after common length");
+ ignore_rest_of_line ();
+ return;
+ }
+ input_line_pointer++;
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer != '"')
+ {
+ temp = get_absolute_expression ();
+#ifndef OBJ_ELF
+ if (temp > max_alignment)
+ {
+ temp = max_alignment;
+ as_warn ("Common alignment too large: %d. assumed", temp);
+ }
+#endif
+ if (temp < 0)
+ {
+ temp = 0;
+ as_warn ("Common alignment negative; 0 assumed");
+ }
+#ifdef OBJ_ELF
+ if (symbolP->local)
+ {
+ segT old_sec;
+ int old_subsec;
+ char *p;
+ int align;
+
+ old_sec = now_seg;
+ old_subsec = now_subseg;
+ align = temp;
+ record_alignment (bss_section, align);
+ subseg_set (bss_section, 0);
+ if (align)
+ frag_align (align, 0, 0);
+ if (S_GET_SEGMENT (symbolP) == bss_section)
+ symbolP->sy_frag->fr_symbol = 0;
+ symbolP->sy_frag = frag_now;
+ p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
+ (offsetT) size, (char *) 0);
+ *p = 0;
+ S_SET_SEGMENT (symbolP, bss_section);
+ S_CLEAR_EXTERNAL (symbolP);
+ subseg_set (old_sec, old_subsec);
+ }
+ else
+#endif
+ {
+ allocate_common:
+ S_SET_VALUE (symbolP, (valueT) size);
+#ifdef OBJ_ELF
+ S_SET_ALIGN (symbolP, temp);
+#endif
+ S_SET_EXTERNAL (symbolP);
+ S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
+ }
+ }
+ else
+ {
+ input_line_pointer++;
+ /* @@ Some use the dot, some don't. Can we get some consistency?? */
+ if (*input_line_pointer == '.')
+ input_line_pointer++;
+ /* @@ Some say data, some say bss. */
+ if (strncmp (input_line_pointer, "bss\"", 4)
+ && strncmp (input_line_pointer, "data\"", 5))
+ {
+ while (*--input_line_pointer != '"')
+ ;
+ input_line_pointer--;
+ goto bad_common_segment;
+ }
+ while (*input_line_pointer++ != '"')
+ ;
+ goto allocate_common;
+ }
+
+#ifdef BFD_ASSEMBLER
+ symbolP->bsym->flags |= BSF_OBJECT;
+#endif
+
+ demand_empty_rest_of_line ();
+ return;
+
+ {
+ bad_common_segment:
+ p = input_line_pointer;
+ while (*p && *p != '\n')
+ p++;
+ c = *p;
+ *p = '\0';
+ as_bad ("bad .common segment %s", input_line_pointer + 1);
+ *p = c;
+ input_line_pointer = p;
+ ignore_rest_of_line ();
+ return;
+ }
+}
- case OPTION_XARCH:
- /* ??? We could add v8plus and v8plusa to sparc_opcode_archs.
- But we might want v8plus to mean something different than v9
- someday, and we'd recognize more -xarch options than Sun's
- assembler does (which may lead to a conflict someday). */
- if (strcmp (arg, "v8plus") == 0)
- arg = "v9";
- else if (strcmp (arg, "v8plusa") == 0)
- arg = "v9a";
- else
- {
- as_bad ("invalid architecture -xarch=%s", arg);
- return 0;
- }
+/* Handle the .empty pseudo-op. This supresses the warnings about
+ invalid delay slot usage. */
- /* fall through */
+static void
+s_empty (ignore)
+ int ignore;
+{
+ /* The easy way to implement is to just forget about the last
+ instruction. */
+ last_insn = NULL;
+}
- case 'A':
- {
- enum sparc_opcode_arch_val new_arch = sparc_opcode_lookup_arch (arg);
+static void
+s_seg (ignore)
+ int ignore;
+{
- if (new_arch == SPARC_OPCODE_ARCH_BAD)
- {
- as_bad ("invalid architecture -A%s", arg);
- return 0;
- }
- else
- {
- max_architecture = new_arch;
- architecture_requested = 1;
- }
- }
- break;
+ if (strncmp (input_line_pointer, "\"text\"", 6) == 0)
+ {
+ input_line_pointer += 6;
+ s_text (0);
+ return;
+ }
+ if (strncmp (input_line_pointer, "\"data\"", 6) == 0)
+ {
+ input_line_pointer += 6;
+ s_data (0);
+ return;
+ }
+ if (strncmp (input_line_pointer, "\"data1\"", 7) == 0)
+ {
+ input_line_pointer += 7;
+ s_data1 ();
+ return;
+ }
+ if (strncmp (input_line_pointer, "\"bss\"", 5) == 0)
+ {
+ input_line_pointer += 5;
+ /* We only support 2 segments -- text and data -- for now, so
+ things in the "bss segment" will have to go into data for now.
+ You can still allocate SEG_BSS stuff with .lcomm or .reserve. */
+ subseg_set (data_section, 255); /* FIXME-SOMEDAY */
+ return;
+ }
+ as_bad ("Unknown segment type");
+ demand_empty_rest_of_line ();
+}
- case OPTION_SPARC:
- /* Ignore -sparc, used by SunOS make default .s.o rule. */
- break;
+static void
+s_data1 ()
+{
+ subseg_set (data_section, 1);
+ demand_empty_rest_of_line ();
+}
- case OPTION_ENFORCE_ALIGNED_DATA:
- enforce_aligned_data = 1;
- break;
+static void
+s_proc (ignore)
+ int ignore;
+{
+ while (!is_end_of_line[(unsigned char) *input_line_pointer])
+ {
+ ++input_line_pointer;
+ }
+ ++input_line_pointer;
+}
-#ifdef SPARC_BIENDIAN
- case OPTION_LITTLE_ENDIAN:
- target_big_endian = 0;
- break;
- case OPTION_BIG_ENDIAN:
- target_big_endian = 1;
- break;
-#endif
+/* This static variable is set by s_uacons to tell sparc_cons_align
+ that the expession does not need to be aligned. */
-#ifdef OBJ_AOUT
- case 'k':
- sparc_pic_code = 1;
- break;
-#endif
+static int sparc_no_align_cons = 0;
-#ifdef OBJ_ELF
- case 'V':
- print_version_id ();
- break;
+/* This handles the unaligned space allocation pseudo-ops, such as
+ .uaword. .uaword is just like .word, but the value does not need
+ to be aligned. */
- case 'Q':
- /* Qy - do emit .comment
- Qn - do not emit .comment */
- break;
+static void
+s_uacons (bytes)
+ int bytes;
+{
+ /* Tell sparc_cons_align not to align this value. */
+ sparc_no_align_cons = 1;
+ cons (bytes);
+}
- case 's':
- /* use .stab instead of .stab.excl */
- break;
+/* If the --enforce-aligned-data option is used, we require .word,
+ et. al., to be aligned correctly. We do it by setting up an
+ rs_align_code frag, and checking in HANDLE_ALIGN to make sure that
+ no unexpected alignment was introduced.
- case 'q':
- /* quick -- native assembler does fewer checks */
- break;
+ The SunOS and Solaris native assemblers enforce aligned data by
+ default. We don't want to do that, because gcc can deliberately
+ generate misaligned data if the packed attribute is used. Instead,
+ we permit misaligned data by default, and permit the user to set an
+ option to check for it. */
- case 'K':
- if (strcmp (arg, "PIC") != 0)
- as_warn ("Unrecognized option following -K");
- else
- sparc_pic_code = 1;
- break;
-#endif
+void
+sparc_cons_align (nbytes)
+ int nbytes;
+{
+ int nalign;
+ char *p;
- default:
- return 0;
+ /* Only do this if we are enforcing aligned data. */
+ if (! enforce_aligned_data)
+ return;
+
+ if (sparc_no_align_cons)
+ {
+ /* This is an unaligned pseudo-op. */
+ sparc_no_align_cons = 0;
+ return;
}
- return 1;
-}
+ nalign = 0;
+ while ((nbytes & 1) == 0)
+ {
+ ++nalign;
+ nbytes >>= 1;
+ }
-void
-md_show_usage (stream)
- FILE *stream;
-{
- const struct sparc_opcode_arch *arch;
+ if (nalign == 0)
+ return;
- fprintf(stream, "SPARC options:\n");
- for (arch = &sparc_opcode_archs[0]; arch->name; arch++)
+ if (now_seg == absolute_section)
{
- if (arch != &sparc_opcode_archs[0])
- fprintf (stream, " | ");
- fprintf (stream, "-A%s", arch->name);
+ if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
+ as_bad ("misaligned data");
+ return;
}
- fprintf (stream, "\n-xarch=v8plus | -xarch=v8plusa\n");
- fprintf (stream, "\
- specify variant of SPARC architecture\n\
--bump warn when assembler switches architectures\n\
--sparc ignored\n\
---enforce-aligned-data force .long, etc., to be aligned correctly\n");
-#ifdef OBJ_AOUT
- fprintf (stream, "\
--k generate PIC\n");
-#endif
-#ifdef OBJ_ELF
- fprintf (stream, "\
--KPIC generate PIC\n\
--V print assembler version number\n\
--q ignored\n\
--Qy, -Qn ignored\n\
--s ignored\n");
-#endif
-#ifdef SPARC_BIENDIAN
- fprintf (stream, "\
--EL generate code for a little endian machine\n\
--EB generate code for a big endian machine\n");
-#endif
-}
-\f
-/* We have no need to default values of symbols. */
-/* ARGSUSED */
-symbolS *
-md_undefined_symbol (name)
- char *name;
-{
- return 0;
-} /* md_undefined_symbol() */
+ p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0,
+ (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
-/* Round up a section size to the appropriate boundary. */
-valueT
-md_section_align (segment, size)
- segT segment;
- valueT size;
-{
-#ifndef OBJ_ELF
- /* This is not right for ELF; a.out wants it, and COFF will force
- the alignment anyways. */
- valueT align = ((valueT) 1
- << (valueT) bfd_get_section_alignment (stdoutput, segment));
- valueT newsize;
- /* turn alignment value into a mask */
- align--;
- newsize = (size + align) & ~align;
- return newsize;
-#else
- return size;
-#endif
+ record_alignment (now_seg, nalign);
}
-/* Exactly what point is a PC-relative offset relative TO?
- On the sparc, they're relative to the address of the offset, plus
- its size. This gets us to the following instruction.
- (??? Is this right? FIXME-SOON) */
-long
-md_pcrel_from (fixP)
- fixS *fixP;
-{
- long ret;
+/* This is where we do the unexpected alignment check.
+ This is called from HANDLE_ALIGN in tc-sparc.h. */
- ret = fixP->fx_where + fixP->fx_frag->fr_address;
- if (! sparc_pic_code
- || fixP->fx_addsy == NULL
- || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0)
- ret += fixP->fx_size;
- return ret;
+void
+sparc_handle_align (fragp)
+ fragS *fragp;
+{
+ if (fragp->fr_type == rs_align_code
+ && fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix != 0)
+ as_bad_where (fragp->fr_file, fragp->fr_line, "misaligned data");
}
-
-/* end of tc-sparc.c */
projects / deliverable / binutils-gdb.git / blobdiff