/* tc-tic4x.c -- Assemble for the Texas Instruments TMS320C[34]x.
- Copyright (C) 1997-2017 Free Software Foundation, Inc.
+ Copyright (C) 1997-2020 Free Software Foundation, Inc.
Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
#define TIC4X_ALT_SYNTAX
-/* Equal to MAX_PRECISION in atof-ieee.c. */
-#define MAX_LITTLENUMS 6 /* (12 bytes) */
-
/* Handle of the inst mnemonic hash table. */
-static struct hash_control *tic4x_op_hash = NULL;
+static htab_t tic4x_op_hash = NULL;
/* Handle asg pseudo. */
-static struct hash_control *tic4x_asg_hash = NULL;
+static htab_t tic4x_asg_hash = NULL;
static unsigned int tic4x_cpu = 0; /* Default to TMS320C40. */
static unsigned int tic4x_revision = 0; /* CPU revision */
extern FLONUM_TYPE generic_floating_point_number;
/* Precision in LittleNums. */
-#define MAX_PRECISION (4) /* Its a bit overkill for us, but the code
+#define MAX_PRECISION (4) /* It's a bit overkill for us, but the code
requires it... */
#define S_PRECISION (1) /* Short float constants 16-bit. */
#define F_PRECISION (2) /* Float and double types 32-bit. */
char buf[32];
int i;
- symbol_table_insert (symbol_new (regname, reg_section, (valueT) regnum,
- &zero_address_frag));
+ symbol_table_insert (symbol_new (regname, reg_section,
+ &zero_address_frag, regnum));
for (i = 0; regname[i]; i++)
buf[i] = ISLOWER (regname[i]) ? TOUPPER (regname[i]) : regname[i];
buf[i] = '\0';
- symbol_table_insert (symbol_new (buf, reg_section, (valueT) regnum,
- &zero_address_frag));
+ symbol_table_insert (symbol_new (buf, reg_section,
+ &zero_address_frag, regnum));
}
static void
symbolS *symbolP;
symbolP = symbol_new (symname, absolute_section,
- (valueT) value, &zero_address_frag);
+ &zero_address_frag, value);
SF_SET_LOCAL (symbolP);
symbol_table_insert (symbolP);
}
c = get_symbol_name (&name); /* Get terminator. */
str = xstrdup (str);
name = xstrdup (name);
- if (hash_find (tic4x_asg_hash, name))
- hash_replace (tic4x_asg_hash, name, (void *) str);
- else
- hash_insert (tic4x_asg_hash, name, (void *) str);
+ str_hash_insert (tic4x_asg_hash, name, str);
(void) restore_line_pointer (c);
demand_empty_rest_of_line ();
}
as_bad (_("Non-constant symbols not allowed\n"));
return;
}
- exp.X_add_number &= 255; /* Limit numeber to 8-bit */
+ exp.X_add_number &= 255; /* Limit number to 8-bit */
emit_expr (&exp, 1);
bytes++;
}
symbol_set_frag (line_label, frag_now);
}
- if (bfd_get_section_flags (stdoutput, seg) == SEC_NO_FLAGS)
+ if (bfd_section_flags (seg) == SEC_NO_FLAGS)
{
- if (!bfd_set_section_flags (stdoutput, seg, SEC_DATA))
+ if (!bfd_set_section_flags (seg, SEC_DATA))
as_warn (_("Error setting flags for \"%s\": %s"), name,
bfd_errmsg (bfd_get_error ()));
}
S_SET_VALUE (line_label, frag_now_fix ());
}
seg_info (seg)->bss = 1; /* Uninitialised data. */
- if (!bfd_set_section_flags (stdoutput, seg, SEC_ALLOC))
+ if (!bfd_set_section_flags (seg, SEC_ALLOC))
as_warn (_("Error setting flags for \"%s\": %s"), name,
bfd_errmsg (bfd_get_error ()));
tic4x_seg_alloc (name, seg, size, line_label);
}
/* Insert a new instruction template into hash table. */
-static int
+static void
tic4x_inst_insert (const tic4x_inst_t *inst)
{
static char prev_name[16];
- const char *retval = NULL;
/* Only insert the first name if have several similar entries. */
if (!strcmp (inst->name, prev_name) || inst->name[0] == '\0')
- return 1;
+ return;
- retval = hash_insert (tic4x_op_hash, inst->name, (void *) inst);
- if (retval != NULL)
- fprintf (stderr, "internal error: can't hash `%s': %s\n",
- inst->name, retval);
- else
- strcpy (prev_name, inst->name);
- return retval == NULL;
+ str_hash_insert (tic4x_op_hash, inst->name, (void *) inst);
+ strcpy (prev_name, inst->name);
}
/* Make a new instruction template. */
}
/* Add instruction template, creating dynamic templates as required. */
-static int
+static void
tic4x_inst_add (const tic4x_inst_t *insts)
{
const char *s = insts->name;
char *d;
unsigned int i;
- int ok = 1;
char name[16];
d = name;
/* We do not care about INSNs that is not a part of our
oplevel setting. */
if ((insts->oplevel & tic4x_oplevel) == 0)
- return ok;
+ return;
while (1)
{
*e = '\0';
/* If instruction found then have already processed it. */
- if (hash_find (tic4x_op_hash, name))
- return 1;
+ if (str_hash_find (tic4x_op_hash, name))
+ return;
do
{
(*s == 'B' ? 16 : 23)),
insts[k].args);
if (k == 0) /* Save strcmp() with following func. */
- ok &= tic4x_inst_insert (inst);
+ tic4x_inst_insert (inst);
k++;
}
while (!strcmp (insts->name,
insts[k].name));
}
- return ok;
- break;
+ return;
case '\0':
- return tic4x_inst_insert (insts);
- break;
+ tic4x_inst_insert (insts);
+ return;
default:
*d++ = *s++;
void
md_begin (void)
{
- int ok = 1;
unsigned int i;
/* Setup the proper opcode level according to the
tic4x_oplevel |= OP_IDLE2;
/* Create hash table for mnemonics. */
- tic4x_op_hash = hash_new ();
+ tic4x_op_hash = str_htab_create ();
/* Create hash table for asg pseudo. */
- tic4x_asg_hash = hash_new ();
+ tic4x_asg_hash = str_htab_create ();
/* Add mnemonics to hash table, expanding conditional mnemonics on fly. */
for (i = 0; i < tic4x_num_insts; i++)
- ok &= tic4x_inst_add (tic4x_insts + i);
+ tic4x_inst_add (tic4x_insts + i);
/* Create dummy inst to avoid errors accessing end of table. */
tic4x_inst_make ("", 0, "");
- if (!ok)
- as_fatal ("Broken assembler. No assembly attempted.");
-
/* Add registers to symbol table. */
tic4x_init_regtable ();
c = get_symbol_name (&str); /* Get terminator. */
new_pointer = input_line_pointer;
- if (strlen (str) && (entry = hash_find (tic4x_asg_hash, str)) != NULL)
+ if (strlen (str) && (entry = str_hash_find (tic4x_asg_hash, str)) != NULL)
{
(void) restore_line_pointer (c);
input_line_pointer = (char *) entry;
}
else if (exp->X_add_number < 32 && IS_CPU_TIC3X (tic4x_cpu))
{
- INSERTU (opcode, exp->X_add_number | 0x20, 4, 0);
+ INSERTU (opcode, exp->X_add_number | 0x20, 5, 0);
continue;
}
else
if (tinsn->operands[1].mode == M_REGISTER
&& tinsn->operands[tinsn->num_operands-1].mode == M_REGISTER
&& tinsn->operands[1].expr.X_add_number == tinsn->operands[tinsn->num_operands-1].expr.X_add_number )
- as_warn (_("Equal parallell destination registers, one result will be discarded"));
+ as_warn (_("Equal parallel destination registers, one result will be discarded"));
}
}
/* Skip past instruction mnemonic. */
while (*s && *s != ' ')
s++;
- if (*s) /* Null terminate for hash_find. */
+ if (*s) /* Null terminate for str_hash_find. */
*s++ = '\0'; /* and skip past null. */
len = strlen (insn->name);
snprintf (insn->name + len, TIC4X_NAME_MAX - len, "_%s", str);
if (insn->in_use)
{
if ((insn->inst = (struct tic4x_inst *)
- hash_find (tic4x_op_hash, insn->name)) == NULL)
+ str_hash_find (tic4x_op_hash, insn->name)) == NULL)
{
as_bad (_("Unknown opcode `%s'."), insn->name);
insn->parallel = 0;
first_inst = inst;
ok = 0;
}
- } while (!ok && !strcmp (inst->name, inst[1].name) && inst++);
+ }
+ while (!ok && !strcmp (inst->name, inst[1].name) && inst++);
if (ok > 0)
{
s = str;
while (*s && *s != ' ') /* Skip past instruction mnemonic. */
s++;
- if (*s) /* Null terminate for hash_find. */
+ if (*s) /* Null terminate for str_hash_find. */
*s++ = '\0'; /* and skip past null. */
strncpy (insn->name, str, TIC4X_NAME_MAX - 1);
insn->name[TIC4X_NAME_MAX - 1] = '\0';
unsigned int op;
buf = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
- op = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0];
+ op = ((unsigned) buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0];
return ((fixP->fx_where + fixP->fx_frag->fr_address) >> 2) +
tic4x_pc_offset (op);
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