/* tc-xtensa.c -- Assemble Xtensa instructions.
- Copyright 2003, 2004, 2005 Free Software Foundation, Inc.
+ Copyright 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston,
- MA 02111-1307, USA. */
+ the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
#include <string.h>
#include <limits.h>
static vliw_insn cur_vinsn;
-size_t xtensa_fetch_width = XCHAL_INST_FETCH_WIDTH;
+unsigned xtensa_fetch_width = XCHAL_INST_FETCH_WIDTH;
static enum debug_info_type xt_saved_debug_type = DEBUG_NONE;
/* Some functions are only valid in the front end. This variable
- allows us to assert that we haven't crossed over into the
+ allows us to assert that we haven't crossed over into the
back end. */
static bfd_boolean past_xtensa_end = FALSE;
int num_formats;
/* A number describing how restrictive the issue is for this
opcode. For example, an opcode that fits lots of different
- formats has a high freedom, as does an opcode that fits
+ formats has a high freedom, as does an opcode that fits
only one format but many slots in that format. The most
- restrictive is the opcode that fits only one slot in one
+ restrictive is the opcode that fits only one slot in one
format. */
int issuef;
- /* The single format (i.e., if the op can live in a bundle by itself),
- narrowest format, and widest format the op can be bundled in
- and their sizes: */
- xtensa_format single;
xtensa_format narrowest;
- xtensa_format widest;
char narrowest_size;
- char widest_size;
- char single_size;
+ char narrowest_slot;
/* formats is a bitfield with the Nth bit set
if the opcode fits in the Nth xtensa_format. */
static void xtensa_begin_directive (int);
static void xtensa_end_directive (int);
-static void xtensa_dwarf2_directive_loc (int);
static void xtensa_literal_prefix (char const *, int);
static void xtensa_literal_position (int);
static void xtensa_literal_pseudo (int);
/* Various Other Internal Functions. */
+extern bfd_boolean xg_is_single_relaxable_insn (TInsn *, TInsn *, bfd_boolean);
+static bfd_boolean xg_build_to_insn (TInsn *, TInsn *, BuildInstr *);
static void xtensa_mark_literal_pool_location (void);
static addressT get_expanded_loop_offset (xtensa_opcode);
static fragS *get_literal_pool_location (segT);
/* Alignment Functions. */
-static size_t get_text_align_power (int);
-static addressT get_text_align_max_fill_size (int, bfd_boolean, bfd_boolean);
+static int get_text_align_power (unsigned);
+static int get_text_align_max_fill_size (int, bfd_boolean, bfd_boolean);
+static int branch_align_power (segT);
/* Helpers for xtensa_relax_frag(). */
extern bfd_boolean opcode_fits_format_slot (xtensa_opcode, xtensa_format, int);
static int xg_get_single_size (xtensa_opcode);
static xtensa_format xg_get_single_format (xtensa_opcode);
+static int xg_get_single_slot (xtensa_opcode);
/* TInsn and IStack functions. */
bfd_boolean expr_is_register (const expressionS *);
offsetT get_expr_register (const expressionS *);
void set_expr_symbol_offset (expressionS *, symbolS *, offsetT);
-static void set_expr_symbol_offset_diff
- (expressionS *, symbolS *, symbolS *, offsetT);
bfd_boolean expr_is_equal (expressionS *, expressionS *);
static void copy_expr (expressionS *, const expressionS *);
/* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
should be emitted or not. FIXME: Not implemented. */
return 1;
-
+
case option_prefer_l32r:
if (prefer_const16)
as_fatal (_("prefer-l32r conflicts with prefer-const16"));
prefer_const16 = 1;
return 1;
- case option_target_hardware:
+ case option_target_hardware:
{
int earliest, latest = 0;
if (*arg == 0 || *arg == '-')
}
-/* The "loops_ok" argument is provided to allow ignoring labels that
- define loop ends. This fixes a bug where the NOPs to align a
+/* The "loops_ok" argument is provided to allow ignoring labels that
+ define loop ends. This fixes a bug where the NOPs to align a
loop opcode were included in a previous zero-cost loop:
loop a0, loopend
{ "short", xtensa_elf_cons, 2 },
{ "begin", xtensa_begin_directive, 0 },
{ "end", xtensa_end_directive, 0 },
- { "loc", xtensa_dwarf2_directive_loc, 0 },
{ "literal", xtensa_literal_pseudo, 0 },
{ "frequency", xtensa_frequency_pseudo, 0 },
{ NULL, 0, 0 },
static bfd_boolean
do_align_targets (void)
{
- /* After md_end, you should be checking frag by frag, rather
- than state directives. */
+ /* Do not use this function after md_end; just look at align_targets
+ instead. There is no target-align directive, so alignment is either
+ enabled for all frags or not done at all. */
assert (!past_xtensa_end);
return align_targets && use_transform ();
}
/* This code is a hack to make .begin [no-][generics|relax] exactly
equivalent to .begin [no-]transform. We should remove it when
we stop accepting those options. */
-
+
if (strncmp (input_line_pointer, "generics", strlen ("generics")) == 0)
{
as_warn (_("[no-]generics is deprecated; use [no-]transform instead"));
{
as_warn (_("[no-]relax is deprecated; use [no-]transform instead"));
directive_string = "transform";
- }
+ }
else
directive_string = input_line_pointer;
break;
case directive_literal_prefix:
- /* Have to flush pending output because a movi relaxed to an l32r
+ /* Have to flush pending output because a movi relaxed to an l32r
might produce a literal. */
md_flush_pending_output ();
/* Check to see if the current fragment is a literal
s = (lit_state *) state;
assert (s);
- if (use_literal_section)
- default_lit_sections = *s;
+ default_lit_sections = *s;
/* free the state storage */
free (s);
}
-/* Wrap dwarf2 functions so that we correctly support the .loc directive. */
-
-static bfd_boolean xtensa_loc_directive_seen = FALSE;
-
-static void
-xtensa_dwarf2_directive_loc (int x)
-{
- xtensa_loc_directive_seen = TRUE;
- dwarf2_directive_loc (x);
-}
-
-
-static void
-xtensa_dwarf2_emit_insn (int size, struct dwarf2_line_info *loc)
-{
- if (debug_type != DEBUG_DWARF2 && ! xtensa_loc_directive_seen)
- return;
- xtensa_loc_directive_seen = FALSE;
- dwarf2_gen_line_info (frag_now_fix () - size, loc);
-}
-
-
/* Place an aligned literal fragment at the current location. */
static void
input_line_pointer = arg_end;
num_args += 1;
- saw_comma = FALSE;
+ saw_comma = FALSE;
saw_colon = FALSE;
- saw_arg = TRUE;
+ saw_arg = TRUE;
break;
}
}
else if (saw_colon)
as_bad (_("extra colon"));
else if (!saw_arg)
- as_bad (_("missing argument"));
+ as_bad (_("missing argument"));
else
as_bad (_("missing comma or colon"));
input_line_pointer = old_input_line_pointer;
goto err;
insn->ntok = tok - insn->tok;
- had_error = FALSE;
+ had_error = FALSE;
err:
input_line_pointer = old_input_line_pointer;
if (sr == XTENSA_UNDEFINED)
{
as_bad (_("invalid register number (%ld) for '%s' instruction"),
- val, opname);
+ (long) val, opname);
return -1;
}
}
if (sr == XTENSA_UNDEFINED)
{
as_bad (_("invalid register number (%ld) for '%s'"),
- val, opname);
+ (long) val, opname);
return -1;
}
}
slotbuf = xtensa_insnbuf_alloc (isa);
}
- xtensa_insnbuf_from_chars (isa, insnbuf, buf, 0);
+ xtensa_insnbuf_from_chars (isa, insnbuf, (const unsigned char *) buf, 0);
fmt = xtensa_format_decode (isa, insnbuf);
if (fmt == XTENSA_UNDEFINED)
return XTENSA_UNDEFINED;
if (xtensa_operand_is_PCrelative (xtensa_default_isa, opcode, operand)
== 1)
as_bad_where ((char *) file, line,
- _("operand %u is out of range for '%s'"), value,
- xtensa_opcode_name (xtensa_default_isa, opcode));
+ _("operand %d of '%s' has out of range value '%u'"),
+ operand + 1,
+ xtensa_opcode_name (xtensa_default_isa, opcode),
+ value);
else
as_bad_where ((char *) file, line,
- _("operand %u is invalid for '%s'"), value,
- xtensa_opcode_name (xtensa_default_isa, opcode));
+ _("operand %d of '%s' has invalid value '%u'"),
+ operand + 1,
+ xtensa_opcode_name (xtensa_default_isa, opcode),
+ value);
return;
}
}
-static int
-xg_get_build_instr_size (BuildInstr *insn)
-{
- assert (insn->typ == INSTR_INSTR);
- return xg_get_single_size (insn->opcode);
-}
+/* Check if there is exactly one relaxation for INSN that converts it to
+ another instruction of equal or larger size. If so, and if TARG is
+ non-null, go ahead and generate the relaxed instruction into TARG. If
+ NARROW_ONLY is true, then only consider relaxations that widen a narrow
+ instruction, i.e., ignore relaxations that convert to an instruction of
+ equal size. In some contexts where this function is used, only
+ a single widening is allowed and the NARROW_ONLY argument is used to
+ exclude cases like ADDI being "widened" to an ADDMI, which may
+ later be relaxed to an ADDMI/ADDI pair. */
-
-static bfd_boolean
-xg_is_narrow_insn (TInsn *insn)
+bfd_boolean
+xg_is_single_relaxable_insn (TInsn *insn, TInsn *targ, bfd_boolean narrow_only)
{
TransitionTable *table = xg_build_widen_table (&transition_rule_cmp);
TransitionList *l;
- int num_match = 0;
- assert (insn->insn_type == ITYPE_INSN);
- assert (insn->opcode < table->num_opcodes);
+ TransitionRule *match = 0;
- for (l = table->table[insn->opcode]; l != NULL; l = l->next)
- {
- TransitionRule *rule = l->rule;
-
- if (xg_instruction_matches_rule (insn, rule)
- && is_unique_insn_expansion (rule))
- {
- /* It only generates one instruction... */
- assert (insn->insn_type == ITYPE_INSN);
- /* ...and it is a larger instruction. */
- if (xg_get_single_size (insn->opcode)
- < xg_get_build_instr_size (rule->to_instr))
- {
- num_match++;
- if (num_match > 1)
- return FALSE;
- }
- }
- }
- return (num_match == 1);
-}
-
-
-static bfd_boolean
-xg_is_single_relaxable_insn (TInsn *insn)
-{
- TransitionTable *table = xg_build_widen_table (&transition_rule_cmp);
- TransitionList *l;
- int num_match = 0;
assert (insn->insn_type == ITYPE_INSN);
assert (insn->opcode < table->num_opcodes);
TransitionRule *rule = l->rule;
if (xg_instruction_matches_rule (insn, rule)
- && is_unique_insn_expansion (rule))
+ && is_unique_insn_expansion (rule)
+ && (xg_get_single_size (insn->opcode) + (narrow_only ? 1 : 0)
+ <= xg_get_single_size (rule->to_instr->opcode)))
{
- /* It only generates one instruction... */
- assert (insn->insn_type == ITYPE_INSN);
- /* ... and it is a larger instruction. */
- if (xg_get_single_size (insn->opcode)
- <= xg_get_build_instr_size (rule->to_instr))
- {
- num_match++;
- if (num_match > 1)
- return FALSE;
- }
+ if (match)
+ return FALSE;
+ match = rule;
}
}
- return (num_match == 1);
+ if (!match)
+ return FALSE;
+
+ if (targ)
+ xg_build_to_insn (targ, insn, match->to_instr);
+ return TRUE;
}
{
target += stretch;
}
-
+
new_offset = target;
xtensa_operand_do_reloc (isa, insn->opcode, i, &new_offset, pc);
if (xg_check_operand (new_offset, insn->opcode, i))
symbolS *sym;
memset (targ, 0, sizeof (TInsn));
- targ->loc = insn->loc;
+ targ->linenum = insn->linenum;
switch (bi->typ)
{
case INSTR_INSTR:
return FALSE;
}
-
-static bfd_boolean
-xg_expand_narrow (TInsn *targ, TInsn *insn)
-{
- TransitionTable *table = xg_build_widen_table (&transition_rule_cmp);
- TransitionList *l;
-
- assert (insn->insn_type == ITYPE_INSN);
- assert (insn->opcode < table->num_opcodes);
-
- for (l = table->table[insn->opcode]; l != NULL; l = l->next)
- {
- TransitionRule *rule = l->rule;
- if (xg_instruction_matches_rule (insn, rule)
- && is_unique_insn_expansion (rule))
- {
- /* Is it a larger instruction? */
- if (xg_get_single_size (insn->opcode)
- <= xg_get_build_instr_size (rule->to_instr))
- {
- xg_build_to_insn (targ, insn, rule->to_instr);
- return FALSE;
- }
- }
- }
- return TRUE;
-}
-
\f
/* Relax the assembly instruction at least "min_steps".
Return the number of steps taken. */
current_insn = *insn;
/* Walk through all of the single instruction expansions. */
- while (xg_is_single_relaxable_insn (¤t_insn))
+ while (xg_is_single_relaxable_insn (¤t_insn, &single_target, FALSE))
{
- int error_val = xg_expand_narrow (&single_target, ¤t_insn);
-
- assert (!error_val);
-
+ steps_taken++;
if (xg_symbolic_immeds_fit (&single_target, pc_seg, pc_frag, pc_offset,
stretch))
{
- steps_taken++;
if (steps_taken >= min_steps)
{
istack_push (istack, &single_target);
if (target_frag == NULL)
return FALSE;
- if (is_next_frag_target (fragP->fr_next, target_frag)
+ if (is_next_frag_target (fragP->fr_next, target_frag)
&& S_GET_VALUE (sym) == target_frag->fr_address)
return TRUE;
new_insn->insn_type = ITYPE_INSN;
new_insn->opcode = instr_spec->opcode;
new_insn->is_specific_opcode = FALSE;
- new_insn->loc = old_insn->loc;
+ new_insn->linenum = old_insn->linenum;
break;
case INSTR_LITERAL_DEF:
new_insn->insn_type = ITYPE_LITERAL;
new_insn->opcode = XTENSA_UNDEFINED;
new_insn->is_specific_opcode = FALSE;
- new_insn->loc = old_insn->loc;
+ new_insn->linenum = old_insn->linenum;
break;
case INSTR_LABEL_DEF:
as_bad (_("INSTR_LABEL_DEF not supported yet"));
if (size > litsize)
{
/* This happens when someone writes a "movi a2, big_number". */
- as_bad_where (frag_now->fr_file, frag_now->fr_line,
+ as_bad_where (frag_now->fr_file, frag_now->fr_line,
_("invalid immediate"));
xtensa_restore_emit_state (&state);
return NULL;
if (opnum != get_relaxable_immed (opcode))
{
as_bad (_("invalid relocation for operand %i of '%s'"),
- opnum, xtensa_opcode_name (xtensa_default_isa, opcode));
+ opnum + 1, xtensa_opcode_name (xtensa_default_isa, opcode));
return FALSE;
}
if (expr->X_op == O_lo16 || expr->X_op == O_hi16)
{
as_bad (_("invalid expression for operand %i of '%s'"),
- opnum, xtensa_opcode_name (xtensa_default_isa, opcode));
+ opnum + 1, xtensa_opcode_name (xtensa_default_isa, opcode));
return FALSE;
}
the_fix->tc_fix_data.X_add_symbol = expr->X_add_symbol;
the_fix->tc_fix_data.X_add_number = expr->X_add_number;
the_fix->tc_fix_data.slot = slot;
-
+
return TRUE;
}
static bfd_boolean
xg_emit_insn_to_buf (TInsn *tinsn,
- xtensa_format fmt,
char *buf,
fragS *fragP,
offsetT offset,
static xtensa_insnbuf insnbuf = NULL;
bfd_boolean has_symbolic_immed = FALSE;
bfd_boolean ok = TRUE;
+
if (!insnbuf)
insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
if (has_symbolic_immed && build_fix)
{
/* Add a fixup. */
+ xtensa_format fmt = xg_get_single_format (tinsn->opcode);
+ int slot = xg_get_single_slot (tinsn->opcode);
int opnum = get_relaxable_immed (tinsn->opcode);
expressionS *exp = &tinsn->tok[opnum];
- if (!xg_add_opcode_fix (tinsn, opnum, fmt, 0, exp, fragP, offset))
+ if (!xg_add_opcode_fix (tinsn, opnum, fmt, slot, exp, fragP, offset))
ok = FALSE;
}
fragP->tc_frag_data.is_insn = TRUE;
- xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf, 0);
+ xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf,
+ (unsigned char *) buf, 0);
return ok;
}
|| opcode == xtensa_waiti_opcode
|| opcode == xtensa_rsr_lcount_opcode)
return TRUE;
-
+
return FALSE;
}
{
fragS *next_fragP = fragP->fr_next;
- /* Sometimes an empty will end up here due storage allocation issues.
+ /* Sometimes an empty will end up here due storage allocation issues.
So we have to skip until we find something legit. */
while (next_fragP && next_fragP->fr_fix == 0)
next_fragP = next_fragP->fr_next;
static xtensa_insnbuf insnbuf = NULL;
xtensa_isa isa = xtensa_default_isa;
xtensa_format fmt;
- int fmt_size;
+ int fmt_size;
if (!insnbuf)
insnbuf = xtensa_insnbuf_alloc (isa);
if (fragP == NULL)
return XTENSA_UNDEFINED;
- xtensa_insnbuf_from_chars (isa, insnbuf, fragP->fr_literal, 0);
+ xtensa_insnbuf_from_chars (isa, insnbuf,
+ (unsigned char *) fragP->fr_literal, 0);
fmt = xtensa_format_decode (isa, insnbuf);
if (fmt == XTENSA_UNDEFINED)
if (fragP->fr_opcode != fragP->fr_literal)
return fmt_size;
- /* If during relaxation we have to pull an instruction out of a
+ /* If during relaxation we have to pull an instruction out of a
multi-slot instruction, we will return the more conservative
number. This works because alignment on bigger instructions
is more restrictive than alignment on smaller instructions.
if (fragP->tc_frag_data.slot_subtypes[0] == RELAX_IMMED_STEP1
|| fragP->tc_frag_data.slot_subtypes[0] == RELAX_IMMED_STEP2)
return 3;
-
+
if (fragP->tc_frag_data.slot_subtypes[0] == RELAX_NARROW)
return 2 + fragP->tc_frag_data.text_expansion[0];
fragS *next_fragP = fragP->fr_next;
fragS *new_target = NULL;
- if (align_targets)
+ if (align_targets)
{
/* We are guaranteed there will be one of these... */
while (!(next_fragP->fr_type == rs_machine_dependent
static bfd_boolean
next_frag_is_loop_target (const fragS *fragP)
{
- /* Sometimes an empty will end up here due storage allocation issues.
+ /* Sometimes an empty will end up here due storage allocation issues.
So we have to skip until we find something legit. */
for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
{
frag_align (2, 0, 0);
record_alignment (now_seg, 2);
- /* We stash info in the fr_var of these frags
- so we can later move the literal's fixes into this
- frchain's fix list. We can use fr_var because fr_var's
- interpretation depends solely on the fr_type and subtype. */
+ /* We stash info in these frags so we can later move the literal's
+ fixes into this frchain's fix list. */
pool_location = frag_now;
- frag_variant (rs_machine_dependent, 0, (int) frchain_now,
+ frag_now->tc_frag_data.lit_frchain = frchain_now;
+ frag_variant (rs_machine_dependent, 0, 0,
RELAX_LITERAL_POOL_BEGIN, NULL, 0, NULL);
xtensa_set_frag_assembly_state (frag_now);
- frag_variant (rs_machine_dependent, 0, (int) now_seg,
+ frag_now->tc_frag_data.lit_seg = now_seg;
+ frag_variant (rs_machine_dependent, 0, 0,
RELAX_LITERAL_POOL_END, NULL, 0, NULL);
xtensa_set_frag_assembly_state (frag_now);
allocated "buf" with at least "size" bytes. */
static void
-assemble_nop (size_t size, char *buf)
+assemble_nop (int size, char *buf)
{
static xtensa_insnbuf insnbuf = NULL;
TInsn tinsn;
insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
tinsn_to_insnbuf (&tinsn, insnbuf);
- xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf, 0);
+ xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf,
+ (unsigned char *) buf, 0);
}
fragP->tc_frag_data.is_no_density = TRUE;
/* This function is called from subsegs_finish, which is called
- after xtensa_end, so we can't use "use_transform" or
+ after xtensa_end, so we can't use "use_transform" or
"use_schedule" here. */
if (!directive_state[directive_transform])
fragP->tc_frag_data.is_no_transform = TRUE;
flagword flags = bfd_get_section_flags (abfd, sec);
segment_info_type *seginfo = seg_info (sec);
fragS *frag = seginfo->frchainP->frch_root;
-
+
if (flags & SEC_CODE)
- {
+ {
xtensa_isa isa = xtensa_default_isa;
xtensa_insnbuf insnbuf = xtensa_insnbuf_alloc (isa);
while (frag != NULL)
if (frag->tc_frag_data.is_branch_target)
{
int op_size;
- int frag_addr;
+ addressT branch_align, frag_addr;
xtensa_format fmt;
- xtensa_insnbuf_from_chars (isa, insnbuf, frag->fr_literal, 0);
+ xtensa_insnbuf_from_chars
+ (isa, insnbuf, (unsigned char *) frag->fr_literal, 0);
fmt = xtensa_format_decode (isa, insnbuf);
op_size = xtensa_format_length (isa, fmt);
- frag_addr = frag->fr_address % xtensa_fetch_width;
- if (frag_addr + op_size > (int) xtensa_fetch_width)
+ branch_align = 1 << branch_align_power (sec);
+ frag_addr = frag->fr_address % branch_align;
+ if (frag_addr + op_size > branch_align)
as_warn_where (frag->fr_file, frag->fr_line,
_("unaligned branch target: %d bytes at 0x%lx"),
- op_size, frag->fr_address);
+ op_size, (long) frag->fr_address);
}
frag = frag->fr_next;
}
segment_info_type *seginfo = seg_info (sec);
fragS *frag = seginfo->frchainP->frch_root;
xtensa_isa isa = xtensa_default_isa;
-
+
if (flags & SEC_CODE)
- {
+ {
xtensa_insnbuf insnbuf = xtensa_insnbuf_alloc (isa);
while (frag != NULL)
{
if (frag->tc_frag_data.is_first_loop_insn)
{
int op_size;
- int frag_addr;
+ addressT frag_addr;
xtensa_format fmt;
- xtensa_insnbuf_from_chars (isa, insnbuf, frag->fr_literal, 0);
+ xtensa_insnbuf_from_chars
+ (isa, insnbuf, (unsigned char *) frag->fr_literal, 0);
fmt = xtensa_format_decode (isa, insnbuf);
op_size = xtensa_format_length (isa, fmt);
frag_addr = frag->fr_address % xtensa_fetch_width;
- if (frag_addr + op_size > (signed) xtensa_fetch_width)
+ if (frag_addr + op_size > xtensa_fetch_width)
as_warn_where (frag->fr_file, frag->fr_line,
_("unaligned loop: %d bytes at 0x%lx"),
- op_size, frag->fr_address);
+ op_size, (long) frag->fr_address);
}
frag = frag->fr_next;
}
slotbuf = xtensa_insnbuf_alloc (isa);
}
- xtensa_insnbuf_from_chars (isa, insnbuf, fixpos, 0);
+ xtensa_insnbuf_from_chars (isa, insnbuf, (unsigned char *) fixpos, 0);
fmt = xtensa_format_decode (isa, insnbuf);
if (fmt == XTENSA_UNDEFINED)
as_fatal (_("undecodable fix"));
fixP->fx_file, fixP->fx_line);
xtensa_format_set_slot (isa, fmt, slot, insnbuf, slotbuf);
- xtensa_insnbuf_to_chars (isa, insnbuf, fixpos, 0);
+ xtensa_insnbuf_to_chars (isa, insnbuf, (unsigned char *) fixpos, 0);
return 1;
}
void
xtensa_frob_label (symbolS *sym)
{
+ float freq;
+
+ if (cur_vinsn.inside_bundle)
+ {
+ as_bad (_("labels are not valid inside bundles"));
+ return;
+ }
+
+ freq = get_subseg_target_freq (now_seg, now_subseg);
+
/* Since the label was already attached to a frag associated with the
previous basic block, it now needs to be reset to the current frag. */
symbol_set_frag (sym, frag_now);
else
xtensa_add_insn_label (sym);
- if (symbol_get_tc (sym)->is_loop_target
- && (get_last_insn_flags (now_seg, now_subseg)
+ if (symbol_get_tc (sym)->is_loop_target)
+ {
+ if ((get_last_insn_flags (now_seg, now_subseg)
& FLAG_IS_BAD_LOOPEND) != 0)
- as_bad (_("invalid last instruction for a zero-overhead loop"));
+ as_bad (_("invalid last instruction for a zero-overhead loop"));
+
+ xtensa_set_frag_assembly_state (frag_now);
+ frag_var (rs_machine_dependent, 4, 4, RELAX_LOOP_END,
+ frag_now->fr_symbol, frag_now->fr_offset, NULL);
+
+ xtensa_set_frag_assembly_state (frag_now);
+ xtensa_move_labels (frag_now, 0, TRUE);
+ }
/* No target aligning in the absolute section. */
if (now_seg != absolute_section
&& !is_unaligned_label (sym)
&& !generating_literals)
{
- float freq = get_subseg_target_freq (now_seg, now_subseg);
xtensa_set_frag_assembly_state (frag_now);
- /* The only time this type of frag grows is when there is a
- negatable branch that needs to be relaxed as the last
- instruction in a zero-overhead loop. Because alignment frags
- are so common, marking them all as possibly growing four
- bytes makes any worst-case analysis appear much worse than it
- is. So, we make fr_var not actually reflect the amount of
- memory allocated at the end of this frag, but rather the
- amount of memory this frag might grow. The "4, 0" below
- allocates four bytes at the end of the frag for room to grow
- if we need to relax a loop end with a NOP. Frags prior to
- this one might grow to align this one, but the frag itself
- won't grow unless it meets the condition above. */
-
-#define RELAX_LOOP_END_BYTES 4
-
frag_var (rs_machine_dependent,
- RELAX_LOOP_END_BYTES, (int) freq,
+ 0, (int) freq,
RELAX_DESIRE_ALIGN_IF_TARGET,
frag_now->fr_symbol, frag_now->fr_offset, NULL);
xtensa_set_frag_assembly_state (frag_now);
/* Loops only go forward, so they can be identified here. */
if (symbol_get_tc (sym)->is_loop_target)
symbol_get_frag (sym)->tc_frag_data.is_loop_target = TRUE;
+
+ dwarf2_emit_label (sym);
}
md_assemble (char *str)
{
xtensa_isa isa = xtensa_default_isa;
- char *opname;
+ char *opname, *file_name;
unsigned opnamelen;
bfd_boolean has_underbar = FALSE;
char *arg_strings[MAX_INSN_ARGS];
return;
}
- dwarf2_where (&orig_insn.loc);
-
+ /* A FLIX bundle may be spread across multiple input lines. We want to
+ report the first such line in the debug information. Record the line
+ number for each TInsn (assume the file name doesn't change), so the
+ first line can be found later. */
+ as_where (&file_name, &orig_insn.linenum);
+
xg_add_branch_and_loop_targets (&orig_insn);
- /* Special-case for "entry" instruction. */
- if (orig_insn.opcode == xtensa_entry_opcode)
+ /* Check that immediate value for ENTRY is >= 16. */
+ if (orig_insn.opcode == xtensa_entry_opcode && orig_insn.ntok >= 3)
{
- /* Check that the third opcode (#2) is >= 16. */
- if (orig_insn.ntok >= 3)
- {
- expressionS *exp = &orig_insn.tok[2];
- switch (exp->X_op)
- {
- case O_constant:
- if (exp->X_add_number < 16)
- as_warn (_("entry instruction with stack decrement < 16"));
- break;
-
- default:
- as_warn (_("entry instruction with non-constant decrement"));
- }
- }
+ expressionS *exp = &orig_insn.tok[2];
+ if (exp->X_op == O_constant && exp->X_add_number < 16)
+ as_warn (_("entry instruction with stack decrement < 16"));
}
/* Finish it off:
int count;
count = fragP->fr_next->fr_address - fragP->fr_address - fragP->fr_fix;
if (count != 0)
- as_bad_where (fragP->fr_file, fragP->fr_line,
+ as_bad_where (fragP->fr_file, fragP->fr_line,
_("unaligned entry instruction"));
}
}
}
insn_p = &fixP->fx_frag->fr_literal[fixP->fx_where];
- xtensa_insnbuf_from_chars (isa, insnbuf, insn_p, 0);
+ xtensa_insnbuf_from_chars (isa, insnbuf, (unsigned char *) insn_p, 0);
fmt = xtensa_format_decode (isa, insnbuf);
if (fmt == XTENSA_UNDEFINED)
void
-md_apply_fix3 (fixS *fixP, valueT *valP, segT seg)
+md_apply_fix (fixS *fixP, valueT *valP, segT seg)
{
char *const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
- valueT val;
+ valueT val = 0;
+
+ /* Subtracted symbols are only allowed for a few relocation types, and
+ unless linkrelax is enabled, they should not make it to this point. */
+ if (fixP->fx_subsy && !(linkrelax && (fixP->fx_r_type == BFD_RELOC_32
+ || fixP->fx_r_type == BFD_RELOC_16
+ || fixP->fx_r_type == BFD_RELOC_8)))
+ as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
switch (fixP->fx_r_type)
{
case BFD_RELOC_32:
case BFD_RELOC_16:
case BFD_RELOC_8:
- if (linkrelax && fixP->fx_subsy)
+ if (fixP->fx_subsy)
{
switch (fixP->fx_r_type)
{
val = *valP;
fixP->fx_done = 1;
}
- else
- break;
+ /* fall through */
+
+ case BFD_RELOC_XTENSA_PLT:
md_number_to_chars (fixpos, val, fixP->fx_size);
fixP->fx_no_overflow = 0; /* Use the standard overflow check. */
break;
}
break;
- case BFD_RELOC_XTENSA_PLT:
case BFD_RELOC_XTENSA_ASM_EXPAND:
case BFD_RELOC_XTENSA_SLOT0_ALT:
case BFD_RELOC_XTENSA_SLOT1_ALT:
\f
/* Checks for resource conflicts between instructions. */
-/* The func unit stuff could be implemented as bit-vectors rather
- than the iterative approach here. If it ends up being too
+/* The func unit stuff could be implemented as bit-vectors rather
+ than the iterative approach here. If it ends up being too
slow, we will switch it. */
-resource_table *
+resource_table *
new_resource_table (void *data,
int cycles,
int nu,
rt->opcode_unit_use = ouuf;
rt->opcode_unit_stage = ousf;
- rt->units = (char **) xcalloc (cycles, sizeof (char *));
+ rt->units = (unsigned char **) xcalloc (cycles, sizeof (unsigned char *));
for (i = 0; i < cycles; i++)
- rt->units[i] = (char *) xcalloc (nu, sizeof (char));
+ rt->units[i] = (unsigned char *) xcalloc (nu, sizeof (unsigned char));
return rt;
}
-void
+void
clear_resource_table (resource_table *rt)
{
int i, j;
/* We never shrink it, just fake it into thinking so. */
-void
+void
resize_resource_table (resource_table *rt, int cycles)
{
int i, old_cycles;
old_cycles = rt->allocated_cycles;
rt->allocated_cycles = cycles;
- rt->units = xrealloc (rt->units, sizeof (char *) * rt->allocated_cycles);
+ rt->units = xrealloc (rt->units,
+ rt->allocated_cycles * sizeof (unsigned char *));
for (i = 0; i < old_cycles; i++)
- rt->units[i] = xrealloc (rt->units[i], sizeof (char) * rt->num_units);
+ rt->units[i] = xrealloc (rt->units[i],
+ rt->num_units * sizeof (unsigned char));
for (i = old_cycles; i < cycles; i++)
- rt->units[i] = xcalloc (rt->num_units, sizeof (char));
+ rt->units[i] = xcalloc (rt->num_units, sizeof (unsigned char));
}
-bfd_boolean
+bfd_boolean
resources_available (resource_table *rt, xtensa_opcode opcode, int cycle)
{
int i;
int uses = (rt->opcode_num_units) (rt->data, opcode);
- for (i = 0; i < uses; i++)
+ for (i = 0; i < uses; i++)
{
xtensa_funcUnit unit = (rt->opcode_unit_use) (rt->data, opcode, i);
int stage = (rt->opcode_unit_stage) (rt->data, opcode, i);
}
return TRUE;
}
-
-void
+
+void
reserve_resources (resource_table *rt, xtensa_opcode opcode, int cycle)
{
int i;
int uses = (rt->opcode_num_units) (rt->data, opcode);
- for (i = 0; i < uses; i++)
+ for (i = 0; i < uses; i++)
{
xtensa_funcUnit unit = (rt->opcode_unit_use) (rt->data, opcode, i);
int stage = (rt->opcode_unit_stage) (rt->data, opcode, i);
- /* Note that this allows resources to be oversubscribed. That's
- essential to the way the optional scheduler works.
+ /* Note that this allows resources to be oversubscribed. That's
+ essential to the way the optional scheduler works.
resources_available reports when a resource is over-subscribed,
so it's easy to tell. */
rt->units[stage + cycle][unit]++;
}
-void
+void
release_resources (resource_table *rt, xtensa_opcode opcode, int cycle)
{
int i;
int uses = (rt->opcode_num_units) (rt->data, opcode);
- for (i = 0; i < uses; i++)
+ for (i = 0; i < uses; i++)
{
xtensa_funcUnit unit = (rt->opcode_unit_use) (rt->data, opcode, i);
int stage = (rt->opcode_unit_stage) (rt->data, opcode, i);
+ assert (rt->units[stage + cycle][unit] > 0);
rt->units[stage + cycle][unit]--;
- assert (rt->units[stage + cycle][unit] >= 0);
}
}
-
+
/* Wrapper functions make parameterized resource reservation
more convenient. */
-int
+int
opcode_funcUnit_use_unit (void *data, xtensa_opcode opcode, int idx)
{
xtensa_funcUnit_use *use = xtensa_opcode_funcUnit_use (data, opcode, idx);
- return use->unit;
+ return use->unit;
}
-int
+int
opcode_funcUnit_use_stage (void *data, xtensa_opcode opcode, int idx)
{
xtensa_funcUnit_use *use = xtensa_opcode_funcUnit_use (data, opcode, idx);
/* Note that this function does not check issue constraints, but
solely whether the hardware is available to execute the given
- instructions together. It also doesn't check if the tinsns
+ instructions together. It also doesn't check if the tinsns
write the same state, or access the same tieports. That is
checked by check_t1_t2_reads_and_writes. */
if (vinsn->num_slots == 1)
return FALSE;
- if (rt == NULL)
+ if (rt == NULL)
{
xtensa_isa isa = xtensa_default_isa;
rt = new_resource_table
static bfd_boolean find_vinsn_conflicts (vliw_insn *);
static xtensa_format xg_find_narrowest_format (vliw_insn *);
-static void bundle_single_op (TInsn *);
static void xg_assemble_vliw_tokens (vliw_insn *);
IStack slotstack;
int i;
char *file_name;
- int line;
+ unsigned line;
if (find_vinsn_conflicts (vinsn))
{
return;
}
- if (resources_conflict (vinsn))
+ if (resources_conflict (vinsn))
{
as_where (&file_name, &line);
as_bad_where (file_name, line, _("illegal resource usage in bundle"));
}
else
{
- bundle_single_op (&slotstack.insn[slotstack.ninsn - 1]);
+ emit_single_op (&slotstack.insn[slotstack.ninsn - 1]);
if (vinsn->format == XTENSA_UNDEFINED)
vinsn->slots[i].opcode = xtensa_nop_opcode;
else
- vinsn->slots[i].opcode
+ vinsn->slots[i].opcode
= xtensa_format_slot_nop_opcode (xtensa_default_isa,
vinsn->format, i);
}
/* Now check resource conflicts on the modified bundle. */
- if (resources_conflict (vinsn))
+ if (resources_conflict (vinsn))
{
as_where (&file_name, &line);
as_bad_where (file_name, line, _("illegal resource usage in bundle"));
xtensa_opcode_name (isa, op2->opcode), j);
return TRUE;
case 'e':
- as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same queue"),
+ as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same port"),
xtensa_opcode_name (isa, op1->opcode), i,
xtensa_opcode_name (isa, op2->opcode), j);
return TRUE;
case 'f':
- as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) both have volatile queue accesses"),
+ as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accesses"),
xtensa_opcode_name (isa, op1->opcode), i,
xtensa_opcode_name (isa, op2->opcode), j);
return TRUE;
case A: t1 reads a register t2 writes (an antidependency within a bundle)
case B: no relationship between what is read and written (both could
read the same reg though)
- case C: t1 writes a register t2 writes (a register conflict within a
+ case C: t1 writes a register t2 writes (a register conflict within a
bundle)
case D: t1 writes a state that t2 also writes
case E: t1 writes a tie queue that t2 also writes
{
xtensa_state t1_so = xtensa_stateOperand_state (isa, t1->opcode, i);
t1_inout = xtensa_stateOperand_inout (isa, t1->opcode, i);
- if (t1_so != t2_so)
+ if (t1_so != t2_so)
continue;
if (t2_inout == 'i' && (t1_inout == 'm' || t1_inout == 'o'))
conflict = 'a';
continue;
}
-
+
if (t1_inout == 'i' && (t2_inout == 'm' || t2_inout == 'o'))
{
conflict = 'a';
continue;
}
-
+
if (t1_inout != 'i' && t2_inout != 'i')
return 'd';
- }
+ }
}
/* Check tieports. */
t1_interfaces = xtensa_opcode_num_interfaceOperands (isa, t1->opcode);
t2_interfaces = xtensa_opcode_num_interfaceOperands (isa, t2->opcode);
- for (j = 0; j < t2_interfaces; j++)
+ for (j = 0; j < t2_interfaces; j++)
{
xtensa_interface t2_int
= xtensa_interfaceOperand_interface (isa, t2->opcode, j);
int t2_class = xtensa_interface_class_id (isa, t2_int);
- t2_inout = xtensa_interface_inout (isa, j);
+ t2_inout = xtensa_interface_inout (isa, t2_int);
if (xtensa_interface_has_side_effect (isa, t2_int) == 1)
t2_volatile = TRUE;
{
xtensa_interface t1_int
= xtensa_interfaceOperand_interface (isa, t1->opcode, j);
- int t1_class = xtensa_interface_class_id (isa, t2_int);
+ int t1_class = xtensa_interface_class_id (isa, t1_int);
- t1_inout = xtensa_interface_inout (isa, i);
+ t1_inout = xtensa_interface_inout (isa, t1_int);
if (xtensa_interface_has_side_effect (isa, t1_int) == 1)
t1_volatile = TRUE;
if (t1_volatile && t2_volatile && (t1_class == t2_class))
return 'f';
-
+
if (t1_int != t2_int)
continue;
-
+
if (t2_inout == 'i' && t1_inout == 'o')
{
conflict = 'a';
continue;
}
-
+
if (t1_inout == 'i' && t2_inout == 'o')
{
conflict = 'a';
continue;
}
-
+
if (t1_inout != 'i' && t2_inout != 'i')
return 'e';
}
}
-
+
return conflict;
}
vliw_insn v_copy = *vinsn;
xtensa_opcode nop_opcode = xtensa_nop_opcode;
+ if (vinsn->num_slots == 1)
+ return xg_get_single_format (vinsn->slots[0].opcode);
+
for (format = 0; format < xtensa_isa_num_formats (isa); format++)
{
v_copy = *vinsn;
/* Try the widened version. */
if (!v_copy.slots[slot].keep_wide
&& !v_copy.slots[slot].is_specific_opcode
- && xg_is_narrow_insn (&v_copy.slots[slot])
- && !xg_expand_narrow (&widened, &v_copy.slots[slot])
+ && xg_is_single_relaxable_insn (&v_copy.slots[slot],
+ &widened, TRUE)
&& opcode_fits_format_slot (widened.opcode,
format, slot))
{
- /* The xg_is_narrow clause requires some explanation:
-
- addi can be "widened" to an addmi, which is then
- expanded to an addmi/addi pair if the immediate
- requires it, but here we must have a single widen
- only.
-
- xg_is_narrow tells us that addi isn't really
- narrow. The widen_spec_list says that there are
- other cases. */
-
v_copy.slots[slot] = widened;
fit++;
}
each tinsn in the vinsn. */
static int
-relaxation_requirements (vliw_insn *vinsn)
+relaxation_requirements (vliw_insn *vinsn, bfd_boolean *pfinish_frag)
{
+ bfd_boolean finish_frag = FALSE;
int extra_space = 0;
int slot;
{
/* A narrow instruction could be widened later to help
alignment issues. */
- if (xg_is_narrow_insn (tinsn)
+ if (xg_is_single_relaxable_insn (tinsn, 0, TRUE)
&& !tinsn->is_specific_opcode
&& vinsn->num_slots == 1)
{
/* Difference in bytes between narrow and wide insns... */
extra_space += 1;
tinsn->subtype = RELAX_NARROW;
- tinsn->record_fix = TRUE;
- break;
- }
- else
- {
- tinsn->record_fix = FALSE;
- /* No extra_space needed. */
}
}
else
extra_space += 3; /* for the nop size */
tinsn->subtype = RELAX_ADD_NOP_IF_PRE_LOOP_END;
}
-
+
/* Need to assemble it with space for the relocation. */
if (xg_is_relaxable_insn (tinsn, 0)
&& !tinsn->is_specific_opcode)
int max_size = xg_get_max_insn_widen_size (tinsn->opcode);
int max_literal_size =
xg_get_max_insn_widen_literal_size (tinsn->opcode);
-
+
tinsn->literal_space = max_literal_size;
-
+
tinsn->subtype = RELAX_IMMED;
- tinsn->record_fix = FALSE;
extra_space += max_size;
}
else
{
- tinsn->record_fix = TRUE;
- /* No extra space needed. */
+ /* A fix record will be added for this instruction prior
+ to relaxation, so make it end the frag. */
+ finish_frag = TRUE;
}
}
}
+ *pfinish_frag = finish_frag;
return extra_space;
}
static void
-bundle_single_op (TInsn *orig_insn)
+bundle_tinsn (TInsn *tinsn, vliw_insn *vinsn)
{
xtensa_isa isa = xtensa_default_isa;
- vliw_insn v;
- int slot;
+ int slot, chosen_slot;
- xg_init_vinsn (&v);
- v.format = op_placement_table[orig_insn->opcode].narrowest;
- assert (v.format != XTENSA_UNDEFINED);
- v.num_slots = xtensa_format_num_slots (isa, v.format);
+ vinsn->format = xg_get_single_format (tinsn->opcode);
+ assert (vinsn->format != XTENSA_UNDEFINED);
+ vinsn->num_slots = xtensa_format_num_slots (isa, vinsn->format);
- for (slot = 0;
- !opcode_fits_format_slot (orig_insn->opcode, v.format, slot);
- slot++)
- {
- v.slots[slot].opcode =
- xtensa_format_slot_nop_opcode (isa, v.format, slot);
- v.slots[slot].ntok = 0;
- v.slots[slot].insn_type = ITYPE_INSN;
- }
-
- v.slots[slot] = *orig_insn;
- slot++;
-
- for ( ; slot < v.num_slots; slot++)
+ chosen_slot = xg_get_single_slot (tinsn->opcode);
+ for (slot = 0; slot < vinsn->num_slots; slot++)
{
- v.slots[slot].opcode =
- xtensa_format_slot_nop_opcode (isa, v.format, slot);
- v.slots[slot].ntok = 0;
- v.slots[slot].insn_type = ITYPE_INSN;
+ if (slot == chosen_slot)
+ vinsn->slots[slot] = *tinsn;
+ else
+ {
+ vinsn->slots[slot].opcode =
+ xtensa_format_slot_nop_opcode (isa, vinsn->format, slot);
+ vinsn->slots[slot].ntok = 0;
+ vinsn->slots[slot].insn_type = ITYPE_INSN;
+ }
}
-
- finish_vinsn (&v);
- xg_free_vinsn (&v);
}
istack_init (&istack);
/* Special-case for "movi aX, foo" which is guaranteed to need relaxing.
- Because the scheduling and bundling characteristics of movi and
- l32r or const16 are so different, we can do much better if we relax
+ Because the scheduling and bundling characteristics of movi and
+ l32r or const16 are so different, we can do much better if we relax
it prior to scheduling and bundling, rather than after. */
- if ((orig_insn->opcode == xtensa_movi_opcode
+ if ((orig_insn->opcode == xtensa_movi_opcode
|| orig_insn->opcode == xtensa_movi_n_opcode)
&& !cur_vinsn.inside_bundle
&& (orig_insn->tok[1].X_op == O_symbol
for (i = 0; i < istack.ninsn; i++)
{
TInsn *insn = &istack.insn[i];
- switch (insn->insn_type)
+ switch (insn->insn_type)
{
case ITYPE_LITERAL:
assert (lit_sym == NULL);
}
break;
case ITYPE_INSN:
- if (lit_sym)
- xg_resolve_literals (insn, lit_sym);
- if (label_sym)
- xg_resolve_labels (insn, label_sym);
- bundle_single_op (insn);
+ {
+ vliw_insn v;
+ if (lit_sym)
+ xg_resolve_literals (insn, lit_sym);
+ if (label_sym)
+ xg_resolve_labels (insn, label_sym);
+ xg_init_vinsn (&v);
+ bundle_tinsn (insn, &v);
+ finish_vinsn (&v);
+ xg_free_vinsn (&v);
+ }
break;
default:
assert (0);
static void
xg_assemble_vliw_tokens (vliw_insn *vinsn)
{
- bfd_boolean finish_frag = FALSE;
+ bfd_boolean finish_frag;
bfd_boolean is_jump = FALSE;
bfd_boolean is_branch = FALSE;
xtensa_isa isa = xtensa_default_isa;
int extra_space;
char *f = NULL;
int slot;
- struct dwarf2_line_info best_loc;
+ unsigned current_line, best_linenum;
+ char *current_file;
- best_loc.line = INT_MAX;
+ best_linenum = UINT_MAX;
if (generating_literals)
{
/* See if the instruction implies an aligned section. */
if (xtensa_opcode_is_loop (isa, vinsn->slots[i].opcode) == 1)
record_alignment (now_seg, 2);
-
+
/* Also determine the best line number for debug info. */
- best_loc = vinsn->slots[i].loc.line < best_loc.line
- ? vinsn->slots[i].loc : best_loc;
+ best_linenum = vinsn->slots[i].linenum < best_linenum
+ ? vinsn->slots[i].linenum : best_linenum;
}
/* Special cases for instructions that force an alignment... */
/* None of these opcodes are bundle-able. */
if (xtensa_opcode_is_loop (isa, vinsn->slots[0].opcode) == 1)
{
- size_t max_fill;
-
+ int max_fill;
+
xtensa_set_frag_assembly_state (frag_now);
frag_now->tc_frag_data.is_insn = TRUE;
-
+
max_fill = get_text_align_max_fill_size
(get_text_align_power (xtensa_fetch_width),
TRUE, frag_now->tc_frag_data.is_no_density);
frag_now->fr_offset,
NULL);
else
- frag_var (rs_machine_dependent, 0, 0,
+ frag_var (rs_machine_dependent, 0, 0,
RELAX_CHECK_ALIGN_NEXT_OPCODE, 0, 0, NULL);
xtensa_set_frag_assembly_state (frag_now);
-
+
xtensa_move_labels (frag_now, 0, FALSE);
}
insn_size = xtensa_format_length (isa, vinsn->format);
- extra_space = relaxation_requirements (vinsn);
+ extra_space = relaxation_requirements (vinsn, &finish_frag);
/* vinsn_to_insnbuf will produce the error. */
if (vinsn->format != XTENSA_UNDEFINED)
{
- f = (char *) frag_more (insn_size + extra_space);
+ f = frag_more (insn_size + extra_space);
xtensa_set_frag_assembly_state (frag_now);
frag_now->tc_frag_data.is_insn = TRUE;
}
- vinsn_to_insnbuf (vinsn, f, frag_now, TRUE);
+ vinsn_to_insnbuf (vinsn, f, frag_now, FALSE);
if (vinsn->format == XTENSA_UNDEFINED)
return;
- xtensa_insnbuf_to_chars (isa, vinsn->insnbuf, f, 0);
-
- xtensa_dwarf2_emit_insn (insn_size - extra_space, &best_loc);
+ xtensa_insnbuf_to_chars (isa, vinsn->insnbuf, (unsigned char *) f, 0);
+
+ /* Temporarily set the logical line number to the one we want to appear
+ in the debug information. */
+ as_where (¤t_file, ¤t_line);
+ new_logical_line (current_file, best_linenum);
+ dwarf2_emit_insn (insn_size + extra_space);
+ new_logical_line (current_file, current_line);
for (slot = 0; slot < vinsn->num_slots; slot++)
{
TInsn *tinsn = &vinsn->slots[slot];
frag_now->tc_frag_data.slot_subtypes[slot] = tinsn->subtype;
frag_now->tc_frag_data.slot_symbols[slot] = tinsn->symbol;
- frag_now->tc_frag_data.slot_sub_symbols[slot] = tinsn->sub_symbol;
frag_now->tc_frag_data.slot_offsets[slot] = tinsn->offset;
frag_now->tc_frag_data.literal_frags[slot] = tinsn->literal_frag;
if (tinsn->literal_space != 0)
if (xtensa_opcode_is_branch (isa, tinsn->opcode) == 1)
is_branch = TRUE;
- if (tinsn->subtype || tinsn->symbol || tinsn->record_fix
- || tinsn->offset || tinsn->literal_frag || is_jump || is_branch)
+ if (tinsn->subtype || tinsn->symbol || tinsn->offset
+ || tinsn->literal_frag || is_jump || is_branch)
finish_frag = TRUE;
}
frag_now->fr_symbol, frag_now->fr_offset, NULL);
xtensa_set_frag_assembly_state (frag_now);
}
- else if (is_branch && align_targets)
+ else if (is_branch && do_align_targets ())
{
assert (finish_frag);
frag_var (rs_machine_dependent,
&& fragP->fr_subtype == RELAX_SLOTS
&& fragP->tc_frag_data.slot_subtypes[0] == RELAX_NARROW)
frag_wane (fragP);
- if (fragP->fr_type == rs_machine_dependent
+ if (fragP->fr_type == rs_machine_dependent
&& fragP->fr_subtype == RELAX_UNREACHABLE)
fragP->tc_frag_data.is_unreachable = TRUE;
}
/* Re-process all of the fragments looking to convert all of the
RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
- If the next fragment starts with a loop target, AND the previous
- fragment can be expanded to negate the branch, convert this to a
- RELAX_LOOP_END. Otherwise, convert to a .fill 0. */
-
-static bfd_boolean frag_can_negate_branch (fragS *);
+ Otherwise, convert to a .fill 0. */
static void
xtensa_fix_target_frags (void)
so we walk over subsections instead of sections. */
for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
{
- bfd_boolean prev_frag_can_negate_branch = FALSE;
fragS *fragP;
/* Walk over all of the fragments in a subsection. */
if (fragP->fr_type == rs_machine_dependent
&& fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)
{
- if (next_frag_is_loop_target (fragP))
- {
- if (prev_frag_can_negate_branch)
- {
- fragP->fr_subtype = RELAX_LOOP_END;
- /* See the comment near the frag_var with a
- RELAX_DESIRE_ALIGN to see why we do this. */
- fragP->fr_var = RELAX_LOOP_END_BYTES;
- }
- else
- {
- if (next_frag_is_branch_target (fragP))
- fragP->fr_subtype = RELAX_DESIRE_ALIGN;
- else
- frag_wane (fragP);
- }
- }
- else if (next_frag_is_branch_target (fragP))
+ if (next_frag_is_branch_target (fragP))
fragP->fr_subtype = RELAX_DESIRE_ALIGN;
else
frag_wane (fragP);
}
- if (fragP->fr_fix != 0)
- prev_frag_can_negate_branch = FALSE;
- if (frag_can_negate_branch (fragP))
- prev_frag_can_negate_branch = TRUE;
}
}
}
-static bfd_boolean
-frag_can_negate_branch (fragS *fragP)
-{
- xtensa_isa isa = xtensa_default_isa;
- vliw_insn vinsn;
- int slot;
-
- if (fragP->fr_type != rs_machine_dependent
- || fragP->fr_subtype != RELAX_SLOTS)
- return FALSE;
-
- vinsn_from_chars (&vinsn, fragP->fr_opcode);
-
- for (slot = 0; slot < xtensa_format_num_slots (isa, vinsn.format); slot++)
- {
- if ((fragP->tc_frag_data.slot_subtypes[slot] == RELAX_IMMED)
- && xtensa_opcode_is_branch (isa, vinsn.slots[slot].opcode) == 1)
- return TRUE;
- }
-
- return FALSE;
-}
-
-
static bfd_boolean is_narrow_branch_guaranteed_in_range (fragS *, TInsn *);
static void
&& fragP->tc_frag_data.slot_subtypes[0] == RELAX_IMMED)
{
vliw_insn vinsn;
- const expressionS *expr;
- symbolS *symbolP;
vinsn_from_chars (&vinsn, fragP->fr_opcode);
tinsn_immed_from_frag (&vinsn.slots[0], fragP, 0);
- expr = &vinsn.slots[0].tok[1];
- symbolP = expr->X_add_symbol;
-
if (vinsn.num_slots == 1
&& xtensa_opcode_is_branch (xtensa_default_isa,
vinsn.slots[0].opcode)
{
fragP->fr_subtype = RELAX_SLOTS;
fragP->tc_frag_data.slot_subtypes[0] = RELAX_NARROW;
+ fragP->tc_frag_data.is_aligning_branch = 1;
}
}
}
maximum offset is (4 - 2) + 63 = 65. */
#define MAX_IMMED6 65
-static size_t unrelaxed_frag_max_size (fragS *);
+static offsetT unrelaxed_frag_max_size (fragS *);
static bfd_boolean
is_narrow_branch_guaranteed_in_range (fragS *fragP, TInsn *tinsn)
{
const expressionS *expr = &tinsn->tok[1];
symbolS *symbolP = expr->X_add_symbol;
- fragS *target_frag = symbol_get_frag (symbolP);
- size_t max_distance = expr->X_add_number;
+ offsetT max_distance = expr->X_add_number;
+ fragS *target_frag;
+
+ if (expr->X_op != O_symbol)
+ return FALSE;
+
+ target_frag = symbol_get_frag (symbolP);
+
max_distance += (S_GET_VALUE (symbolP) - target_frag->fr_address);
if (is_branch_jmp_to_next (tinsn, fragP))
return FALSE;
/* Of course, sometimes (mostly for toy test cases) a
zero-cost loop instruction is the last in a section. */
- if (targ_frag)
- {
- targ_frag->tc_frag_data.is_first_loop_insn = TRUE;
- if (fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE)
- frag_wane (fragP);
- }
+ if (targ_frag)
+ targ_frag->tc_frag_data.is_first_loop_insn = TRUE;
+ if (fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE)
+ frag_wane (fragP);
}
}
}
return FALSE;
/* Check for the conditional branch. */
- xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset], 0);
+ xtensa_insnbuf_from_chars
+ (isa, insnbuf, (unsigned char *) &next_fragP->fr_literal[offset], 0);
fmt = xtensa_format_decode (isa, insnbuf);
if (fmt == XTENSA_UNDEFINED)
return FALSE;
return FALSE;
/* Check for the retw/retw.n. */
- xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset], 0);
+ xtensa_insnbuf_from_chars
+ (isa, insnbuf, (unsigned char *) &next_fragP->fr_literal[offset], 0);
fmt = xtensa_format_decode (isa, insnbuf);
/* Because RETW[.N] is not bundleable, a VLIW bundle here means that we
make it at least 12 bytes away. In any case close it off with a
.fill 0. */
-static size_t min_bytes_to_other_loop_end (fragS *, fragS *, offsetT, size_t);
+static offsetT min_bytes_to_other_loop_end
+ (fragS *, fragS *, offsetT, offsetT);
static void
xtensa_fix_close_loop_end_frags (void)
&& fragP->fr_type == rs_machine_dependent
&& fragP->fr_subtype == RELAX_ADD_NOP_IF_CLOSE_LOOP_END)
{
- size_t min_bytes;
- size_t bytes_added = 0;
+ offsetT min_bytes;
+ int bytes_added = 0;
#define REQUIRED_LOOP_DIVIDING_BYTES 12
/* Max out at 12. */
< REQUIRED_LOOP_DIVIDING_BYTES)
{
int length = 3;
-
+
if (fragP->fr_var < length)
as_fatal (_("fr_var %lu < length %d"),
- fragP->fr_var, length);
+ (long) fragP->fr_var, length);
else
{
assemble_nop (length,
}
-static size_t unrelaxed_frag_min_size (fragS *);
+static offsetT unrelaxed_frag_min_size (fragS *);
-static size_t
+static offsetT
min_bytes_to_other_loop_end (fragS *fragP,
fragS *current_target,
offsetT current_offset,
- size_t max_size)
+ offsetT max_size)
{
- size_t offset = 0;
+ offsetT offset = 0;
fragS *current_fragP;
for (current_fragP = fragP;
}
-static size_t
+static offsetT
unrelaxed_frag_min_size (fragS *fragP)
{
- size_t size = fragP->fr_fix;
+ offsetT size = fragP->fr_fix;
- /* add fill size */
+ /* Add fill size. */
if (fragP->fr_type == rs_fill)
size += fragP->fr_offset;
}
-static size_t
+static offsetT
unrelaxed_frag_max_size (fragS *fragP)
{
- size_t size = fragP->fr_fix;
+ offsetT size = fragP->fr_fix;
switch (fragP->fr_type)
{
case 0:
- /* Empty frags created by the obstack allocation scheme
+ /* Empty frags created by the obstack allocation scheme
end up with type 0. */
break;
case rs_fill:
then convert this frag (and maybe the next one) to generate a NOP.
In any case close it off with a .fill 0. */
-static size_t count_insns_to_loop_end (fragS *, bfd_boolean, size_t);
+static int count_insns_to_loop_end (fragS *, bfd_boolean, int);
static bfd_boolean branch_before_loop_end (fragS *);
static void
if (fragP->fr_type == rs_machine_dependent
&& fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP)
{
- size_t insn_count =
- count_insns_to_loop_end (fragP->fr_next, TRUE, 3);
- if (insn_count < 3
+ if (count_insns_to_loop_end (fragP->fr_next, TRUE, 3) < 3
&& (branch_before_loop_end (fragP->fr_next)
|| (workaround_all_short_loops
&& current_opcode != XTENSA_UNDEFINED
}
-static size_t unrelaxed_frag_min_insn_count (fragS *);
+static int unrelaxed_frag_min_insn_count (fragS *);
-static size_t
+static int
count_insns_to_loop_end (fragS *base_fragP,
bfd_boolean count_relax_add,
- size_t max_count)
+ int max_count)
{
fragS *fragP = NULL;
- size_t insn_count = 0;
+ int insn_count = 0;
fragP = base_fragP;
}
-static size_t
+static int
unrelaxed_frag_min_insn_count (fragS *fragP)
{
xtensa_isa isa = xtensa_default_isa;
static xtensa_insnbuf insnbuf = NULL;
- size_t insn_count = 0;
+ int insn_count = 0;
int offset = 0;
if (!fragP->tc_frag_data.is_insn)
{
xtensa_format fmt;
- xtensa_insnbuf_from_chars (isa, insnbuf, fragP->fr_literal + offset, 0);
+ xtensa_insnbuf_from_chars
+ (isa, insnbuf, (unsigned char *) fragP->fr_literal + offset, 0);
fmt = xtensa_format_decode (isa, insnbuf);
if (fmt == XTENSA_UNDEFINED)
xtensa_format fmt;
int slot;
- xtensa_insnbuf_from_chars (isa, insnbuf, fragP->fr_literal + offset, 0);
+ xtensa_insnbuf_from_chars
+ (isa, insnbuf, (unsigned char *) fragP->fr_literal + offset, 0);
fmt = xtensa_format_decode (isa, insnbuf);
if (fmt == XTENSA_UNDEFINED)
return FALSE;
xtensa_sanity_check (void)
{
char *file_name;
- int line;
+ unsigned line;
frchainS *frchP;
\f
/* Alignment Functions. */
-static size_t
-get_text_align_power (int target_size)
+static int
+get_text_align_power (unsigned target_size)
{
- size_t i = 0;
- for (i = 0; i < sizeof (size_t); i++)
+ int i = 0;
+ unsigned power = 1;
+
+ assert (target_size <= INT_MAX);
+ while (target_size > power)
{
- if (target_size <= (1 << i))
- return i;
+ power <<= 1;
+ i += 1;
}
- assert (0);
- return 0;
+ return i;
}
-static addressT
+static int
get_text_align_max_fill_size (int align_pow,
bfd_boolean use_nops,
bfd_boolean use_no_density)
}
-/* get_text_align_fill_size ()
-
- Desired alignments:
- give the address
- target_size = size of next instruction
- align_pow = get_text_align_power (target_size).
- use_nops = 0
- use_no_density = 0;
- Loop alignments:
- address = current address + loop instruction size;
- target_size = 3 (for 2 or 3 byte target)
- = 4 (for 4 byte target)
- = 8 (for 8 byte target)
- align_pow = get_text_align_power (target_size);
- use_nops = 1
- use_no_density = set appropriately
- Text alignments:
- address = current address + loop instruction size;
- target_size = 0
- align_pow = get_text_align_power (target_size);
- use_nops = 0
- use_no_density = 0. */
+/* Calculate the minimum bytes of fill needed at "address" to align a
+ target instruction of size "target_size" so that it does not cross a
+ power-of-two boundary specified by "align_pow". If "use_nops" is FALSE,
+ the fill can be an arbitrary number of bytes. Otherwise, the space must
+ be filled by NOP instructions. */
-static addressT
+static int
get_text_align_fill_size (addressT address,
int align_pow,
int target_size,
bfd_boolean use_nops,
bfd_boolean use_no_density)
{
- /* Input arguments:
-
- align_pow: log2 (required alignment).
-
- target_size: alignment must allow the new_address and
- new_address+target_size-1.
+ addressT alignment, fill, fill_limit, fill_step;
+ bfd_boolean skip_one = FALSE;
- use_nops: if TRUE, then we can only use 2- or 3-byte nops.
+ alignment = (1 << align_pow);
+ assert (target_size > 0 && alignment >= (addressT) target_size);
- use_no_density: if use_nops and use_no_density, we can only use
- 3-byte nops.
-
- Usually the align_pow is the power of 2 that is greater than
- or equal to the target_size. This handles the 2-byte, 3-byte
- and 8-byte instructions.
-
- Two cases:
-
- (1) aligning an instruction properly, but without using NOPs.
- E.G.: a 3-byte instruction can go on any address where address mod 4
- is zero or one. The aligner uses this case to find the optimal
- number of fill bytes for relax_frag_for_align.
-
- (2) aligning an instruction properly, but where we might need to use
- extra NOPs. E.G.: when the aligner couldn't find enough widenings
- or similar to get the optimal location. */
-
- size_t alignment = (1 << align_pow);
-
- assert (target_size != 0);
-
if (!use_nops)
{
- unsigned fill_bytes;
- for (fill_bytes = 0; fill_bytes < alignment; fill_bytes++)
- {
- addressT end_address = address + target_size - 1 + fill_bytes;
- addressT start_address = address + fill_bytes;
- if ((end_address >> align_pow) == (start_address >> align_pow))
- return fill_bytes;
- }
- assert (0);
+ fill_limit = alignment;
+ fill_step = 1;
}
-
- /* This is the slightly harder case. */
- assert ((int) alignment >= target_size);
- assert (target_size > 0);
- if (!use_no_density)
+ else if (!use_no_density)
{
- size_t i;
- for (i = 0; i < alignment * 2; i++)
- {
- if (i == 1)
- continue;
- if ((address + i) >> align_pow
- == (address + i + target_size - 1) >> align_pow)
- return i;
- }
+ /* Combine 2- and 3-byte NOPs to fill anything larger than one. */
+ fill_limit = alignment * 2;
+ fill_step = 1;
+ skip_one = TRUE;
}
else
{
- size_t i;
+ /* Fill with 3-byte NOPs -- can only fill multiples of 3. */
+ fill_limit = alignment * 3;
+ fill_step = 3;
+ }
- /* Can only fill multiples of 3. */
- for (i = 0; i <= alignment * 3; i += 3)
- {
- if ((address + i) >> align_pow
- == (address + i + target_size - 1) >> align_pow)
- return i;
- }
+ /* Try all fill sizes until finding one that works. */
+ for (fill = 0; fill < fill_limit; fill += fill_step)
+ {
+ if (skip_one && fill == 1)
+ continue;
+ if ((address + fill) >> align_pow
+ == (address + fill + target_size - 1) >> align_pow)
+ return fill;
}
assert (0);
return 0;
}
+static int
+branch_align_power (segT sec)
+{
+ /* If the Xtensa processor has a fetch width of 8 bytes, and the section
+ is aligned to at least an 8-byte boundary, then a branch target need
+ only fit within an 8-byte aligned block of memory to avoid a stall.
+ Otherwise, try to fit branch targets within 4-byte aligned blocks
+ (which may be insufficient, e.g., if the section has no alignment, but
+ it's good enough). */
+ if (xtensa_fetch_width == 8)
+ {
+ if (get_recorded_alignment (sec) >= 3)
+ return 3;
+ }
+ else
+ assert (xtensa_fetch_width == 4);
+
+ return 2;
+}
+
+
/* This will assert if it is not possible. */
-static size_t
-get_text_align_nop_count (size_t fill_size, bfd_boolean use_no_density)
+static int
+get_text_align_nop_count (offsetT fill_size, bfd_boolean use_no_density)
{
- size_t count = 0;
+ int count = 0;
+
if (use_no_density)
{
assert (fill_size % 3 == 0);
while (fill_size > 1)
{
- size_t insn_size = 3;
+ int insn_size = 3;
if (fill_size == 2 || fill_size == 4)
insn_size = 2;
fill_size -= insn_size;
}
-static size_t
-get_text_align_nth_nop_size (size_t fill_size,
- size_t n,
+static int
+get_text_align_nth_nop_size (offsetT fill_size,
+ int n,
bfd_boolean use_no_density)
{
- size_t count = 0;
-
- assert (get_text_align_nop_count (fill_size, use_no_density) > n);
+ int count = 0;
if (use_no_density)
return 3;
+ assert (fill_size != 1); /* Bad argument. */
+
while (fill_size > 1)
{
- size_t insn_size = 3;
+ int insn_size = 3;
if (fill_size == 2 || fill_size == 4)
insn_size = 2;
fill_size -= insn_size;
the smallest number of bytes that need to be added to
ensure that the next fragment's FIRST instruction will fit
in a single word.
-
+
E.G., 2 bytes : 0, 1, 2 mod 4
3 bytes: 0, 1 mod 4
-
+
If the FIRST instruction MIGHT be relaxed,
assume that it will become a 3-byte instruction.
-
+
Note again here that LOOP instructions are not bundleable,
and this relaxation only applies to LOOP opcodes. */
-
- size_t fill_size = 0;
+
+ int fill_size = 0;
int first_insn_size;
int loop_insn_size;
addressT pre_opcode_bytes;
- size_t alignment;
+ int align_power;
fragS *first_insn;
xtensa_opcode opcode;
bfd_boolean is_loop;
first_insn_size = 3; /* ISA specifies this */
/* If it was 8, then we'll need a larger alignment for the section. */
- alignment = get_text_align_power (first_insn_size);
+ align_power = get_text_align_power (first_insn_size);
+ record_alignment (now_seg, align_power);
- /* Is now_seg valid? */
- record_alignment (now_seg, alignment);
-
fill_size = get_text_align_fill_size
- (address + pre_opcode_bytes,
- get_text_align_power (first_insn_size),
- first_insn_size, TRUE, fragP->tc_frag_data.is_no_density);
+ (address + pre_opcode_bytes, align_power, first_insn_size, TRUE,
+ fragP->tc_frag_data.is_no_density);
return address + fill_size;
}
>=5 : 3-byte instruction + fn (n-3)
widening - widen previous instructions. */
-static addressT
-get_aligned_diff (fragS *fragP, addressT address, addressT *max_diff)
+static offsetT
+get_aligned_diff (fragS *fragP, addressT address, offsetT *max_diff)
{
addressT target_address, loop_insn_offset;
int target_size;
xtensa_opcode loop_opcode;
bfd_boolean is_loop;
- int text_align_power;
- addressT opt_diff;
+ int align_power;
+ offsetT opt_diff;
+ offsetT branch_align;
assert (fragP->fr_type == rs_machine_dependent);
switch (fragP->fr_subtype)
target_size = next_frag_format_size (fragP);
if (target_size == XTENSA_UNDEFINED)
target_size = 3;
- text_align_power = get_text_align_power (xtensa_fetch_width);
- opt_diff = get_text_align_fill_size (address, text_align_power,
+ align_power = branch_align_power (now_seg);
+ branch_align = 1 << align_power;
+ /* Don't count on the section alignment being as large as the target. */
+ if (target_size > branch_align)
+ target_size = branch_align;
+ opt_diff = get_text_align_fill_size (address, align_power,
target_size, FALSE, FALSE);
- *max_diff = opt_diff + xtensa_fetch_width
- - (target_size + ((address + opt_diff) % xtensa_fetch_width));
+ *max_diff = (opt_diff + branch_align
+ - (target_size + ((address + opt_diff) % branch_align)));
assert (*max_diff >= opt_diff);
return opt_diff;
will call get_noop_aligned_address. */
target_address =
address + loop_insn_offset + xg_get_single_size (loop_opcode);
- text_align_power = get_text_align_power (target_size),
- opt_diff = get_text_align_fill_size (target_address, text_align_power,
+ align_power = get_text_align_power (target_size),
+ opt_diff = get_text_align_fill_size (target_address, align_power,
target_size, FALSE, FALSE);
*max_diff = xtensa_fetch_width
int unreported = fragP->tc_frag_data.unreported_expansion;
long new_stretch = 0;
char *file_name;
- int line, lit_size;
+ unsigned line;
+ int lit_size;
static xtensa_insnbuf vbuf = NULL;
int slot, num_slots;
xtensa_format fmt;
if (vbuf == NULL)
vbuf = xtensa_insnbuf_alloc (isa);
- xtensa_insnbuf_from_chars (isa, vbuf, fragP->fr_opcode, 0);
+ xtensa_insnbuf_from_chars
+ (isa, vbuf, (unsigned char *) fragP->fr_opcode, 0);
fmt = xtensa_format_decode (isa, vbuf);
num_slots = xtensa_format_num_slots (isa, fmt);
}
/* Tell gas we need another relaxation pass. */
- if (! fragP->tc_frag_data.relax_seen)
+ if (! fragP->tc_frag_data.relax_seen)
{
fragP->tc_frag_data.relax_seen = TRUE;
*stretched_p = 1;
if (fragP->fr_var < length)
{
- as_fatal (_("fr_var (%ld) < length (%d)"), fragP->fr_var, length);
+ as_fatal (_("fr_var (%ld) < length (%d)"), (long) fragP->fr_var, length);
return 0;
}
while (fragP)
{
/* Limit this to a small search. */
- if (*widens > 8)
+ if (*widens >= (int) xtensa_fetch_width)
{
*fragPP = fragP;
return 0;
return 0;
}
}
- else
+ else
{
/* Just punt if we don't know the type. */
*fragPP = fragP;
static long bytes_to_stretch (fragS *, int, int, int, int);
-/* Undefine LOOKAHEAD_ALIGNER to get the older behavior.
- I'll leave this in until I am more confident this works. */
-
-#define LOOKAHEAD_ALIGNER 1
-
static long
future_alignment_required (fragS *fragP, long stretch ATTRIBUTE_UNUSED)
{
address = find_address_of_next_align_frag
(&fragP, &wide_nops, &narrow_nops, &num_widens, &paddable);
- if (address)
+ if (!address)
+ {
+ if (this_frag->tc_frag_data.is_aligning_branch)
+ this_frag->tc_frag_data.slot_subtypes[0] = RELAX_IMMED;
+ else
+ frag_wane (this_frag);
+ }
+ else
{
local_opt_diff = get_aligned_diff (fragP, address, &max_diff);
opt_diff = local_opt_diff;
assert (opt_diff >= 0);
assert (max_diff >= opt_diff);
- if (max_diff == 0)
+ if (max_diff == 0)
return 0;
-#ifdef LOOKAHEAD_ALIGNER
+
if (fragP)
fragP = fragP->fr_next;
while (fragP && opt_diff < max_diff && address)
{
/* We only use these to determine if we can exit early
- because there will be plenty of ways to align future
+ because there will be plenty of ways to align future
align frags. */
- unsigned int glob_widens = 0;
+ int glob_widens = 0;
int dnn = 0;
int dw = 0;
bfd_boolean glob_pad = 0;
address = find_address_of_next_align_frag
(&fragP, &glob_widens, &dnn, &dw, &glob_pad);
/* If there is a padable portion, then skip. */
- if (glob_pad || (glob_widens >= xtensa_fetch_width))
- break;
+ if (glob_pad || glob_widens >= (1 << branch_align_power (now_seg)))
+ address = 0;
- if (address)
+ if (address)
{
offsetT next_m_diff;
offsetT next_o_diff;
fragP = fragP->fr_next;
}
}
-#endif /* LOOKAHEAD_ALIGNER */
+
/* If there are enough wideners in between, do it. */
if (paddable)
{
}
return 0;
}
- local_stretch_amount
+ local_stretch_amount
= bytes_to_stretch (this_frag, wide_nops, narrow_nops,
num_widens, local_opt_diff);
-#ifdef LOOKAHEAD_ALIGNER
- global_stretch_amount
- = bytes_to_stretch (this_frag, wide_nops, narrow_nops,
+ global_stretch_amount
+ = bytes_to_stretch (this_frag, wide_nops, narrow_nops,
num_widens, opt_diff);
- /* If the condition below is true, then the frag couldn't
- stretch the correct amount for the global case, so we just
- optimize locally. We'll rely on the subsequent frags to get
+ /* If the condition below is true, then the frag couldn't
+ stretch the correct amount for the global case, so we just
+ optimize locally. We'll rely on the subsequent frags to get
the correct alignment in the global case. */
if (global_stretch_amount < local_stretch_amount)
stretch_amount = local_stretch_amount;
else
stretch_amount = global_stretch_amount;
-#else /* ! LOOKAHEAD_ALIGNER */
- stretch_amount = local_stretch_amount;
-#endif /* ! LOOKAHEAD_ALIGNER */
+
if (this_frag->fr_subtype == RELAX_SLOTS
&& this_frag->tc_frag_data.slot_subtypes[0] == RELAX_NARROW)
assert (stretch_amount <= 1);
assert (desired_diff >= 0 && desired_diff < 8);
if (desired_diff == 0)
return 0;
-
+
assert (wide_nops > 0 || num_widens > 0);
/* Always prefer widening to NOP-filling. */
to align the target without widening this frag in any way. */
return 0;
}
-
+
if (bytes_short == 0)
{
/* Widen every narrow between here and the align target
else
return 1;
}
-
+
/* From here we will need at least one NOP to get an alignment.
However, we may not be able to align at all, in which case,
don't widen. */
if (!this_frag->tc_frag_data.is_no_density && narrow_nops == 1)
return 2; /* case 2 */
return 0;
- case 3:
+ case 3:
if (wide_nops > 1)
return 0;
else
case 5:
if (num_widens >= 2 && wide_nops == 1)
return 3; /* case 5a */
- /* We will need two nops. Are there enough nops
+ /* We will need two nops. Are there enough nops
between here and the align target? */
if (wide_nops < 2 || narrow_nops == 0)
return 0;
}
else
{
- /* We will need a NOP no matter what, but should we widen
+ /* We will need a NOP no matter what, but should we widen
this instruction to help?
This is a RELAX_FRAG_NARROW frag. */
bfd_boolean estimate_only)
{
TInsn tinsn;
- vliw_insn orig_vinsn;
int old_size;
bfd_boolean negatable_branch = FALSE;
bfd_boolean branch_jmp_to_next = FALSE;
assert (fragP->fr_opcode != NULL);
- xg_init_vinsn (&orig_vinsn);
- vinsn_from_chars (&orig_vinsn, fragP->fr_opcode);
- if (xtensa_format_num_slots (isa, fmt) > 1)
+ xg_clear_vinsn (&cur_vinsn);
+ vinsn_from_chars (&cur_vinsn, fragP->fr_opcode);
+ if (cur_vinsn.num_slots > 1)
wide_insn = TRUE;
- tinsn = orig_vinsn.slots[slot];
+ tinsn = cur_vinsn.slots[slot];
tinsn_immed_from_frag (&tinsn, fragP, slot);
if (estimate_only && xtensa_opcode_is_loop (isa, tinsn.opcode))
int num_slots;
xtensa_format fmt;
char *file_name;
- int line;
+ unsigned line;
as_where (&file_name, &line);
new_logical_line (fragp->fr_file, fragp->fr_line);
if (vbuf == NULL)
vbuf = xtensa_insnbuf_alloc (isa);
- xtensa_insnbuf_from_chars (isa, vbuf, fragp->fr_opcode, 0);
+ xtensa_insnbuf_from_chars
+ (isa, vbuf, (unsigned char *) fragp->fr_opcode, 0);
fmt = xtensa_format_decode (isa, vbuf);
num_slots = xtensa_format_num_slots (isa, fmt);
convert_frag_align_next_opcode (fragS *fragp)
{
char *nop_buf; /* Location for Writing. */
- size_t i;
-
bfd_boolean use_no_density = fragp->tc_frag_data.is_no_density;
addressT aligned_address;
- size_t fill_size, nop_count;
+ offsetT fill_size;
+ int nop, nop_count;
aligned_address = get_noop_aligned_address (fragp, fragp->fr_address +
fragp->fr_fix);
nop_count = get_text_align_nop_count (fill_size, use_no_density);
nop_buf = fragp->fr_literal + fragp->fr_fix;
- for (i = 0; i < nop_count; i++)
+ for (nop = 0; nop < nop_count; nop++)
{
- size_t nop_size;
- nop_size = get_text_align_nth_nop_size (fill_size, i, use_no_density);
+ int nop_size;
+ nop_size = get_text_align_nth_nop_size (fill_size, nop, use_no_density);
assemble_nop (nop_size, nop_buf);
nop_buf += nop_size;
convert_frag_narrow (segT segP, fragS *fragP, xtensa_format fmt, int slot)
{
TInsn tinsn, single_target;
- xtensa_format single_fmt;
- int size, old_size, diff, error_val;
+ int size, old_size, diff;
offsetT frag_offset;
assert (slot == 0);
tinsn_from_chars (&tinsn, fragP->fr_opcode, 0);
- if (xtensa_opcode_is_branch (xtensa_default_isa, tinsn.opcode) == 1)
+ if (fragP->tc_frag_data.is_aligning_branch == 1)
{
assert (fragP->tc_frag_data.text_expansion[0] == 1
|| fragP->tc_frag_data.text_expansion[0] == 0);
tinsn_init (&single_target);
frag_offset = fragP->fr_opcode - fragP->fr_literal;
- error_val = xg_expand_narrow (&single_target, &tinsn);
- if (error_val)
+ if (! xg_is_single_relaxable_insn (&tinsn, &single_target, FALSE))
{
as_bad (_("unable to widen instruction"));
return;
}
size = xg_get_single_size (single_target.opcode);
- single_fmt = xg_get_single_format (single_target.opcode);
-
- xg_emit_insn_to_buf (&single_target, single_fmt, fragP->fr_opcode,
- fragP, frag_offset, TRUE);
+ xg_emit_insn_to_buf (&single_target, fragP->fr_opcode, fragP,
+ frag_offset, TRUE);
diff = size - old_size;
assert (diff >= 0);
bfd_boolean expanded = FALSE;
bfd_boolean branch_jmp_to_next = FALSE;
char *fr_opcode = fragP->fr_opcode;
- vliw_insn orig_vinsn;
xtensa_isa isa = xtensa_default_isa;
bfd_boolean wide_insn = FALSE;
int bytes;
assert (fr_opcode != NULL);
- xg_init_vinsn (&orig_vinsn);
+ xg_clear_vinsn (&cur_vinsn);
- vinsn_from_chars (&orig_vinsn, fr_opcode);
- if (xtensa_format_num_slots (isa, fmt) > 1)
+ vinsn_from_chars (&cur_vinsn, fr_opcode);
+ if (cur_vinsn.num_slots > 1)
wide_insn = TRUE;
- orig_tinsn = orig_vinsn.slots[slot];
+ orig_tinsn = cur_vinsn.slots[slot];
tinsn_immed_from_frag (&orig_tinsn, fragP, slot);
is_loop = xtensa_opcode_is_loop (xtensa_default_isa, orig_tinsn.opcode) == 1;
bytes = xtensa_format_length (isa, fmt);
if (bytes >= 4)
{
- orig_vinsn.slots[slot].opcode =
- xtensa_format_slot_nop_opcode (isa, orig_vinsn.format, slot);
- orig_vinsn.slots[slot].ntok = 0;
+ cur_vinsn.slots[slot].opcode =
+ xtensa_format_slot_nop_opcode (isa, cur_vinsn.format, slot);
+ cur_vinsn.slots[slot].ntok = 0;
}
else
{
bytes += fragP->tc_frag_data.text_expansion[0];
assert (bytes == 2 || bytes == 3);
- build_nop (&orig_vinsn.slots[0], bytes);
+ build_nop (&cur_vinsn.slots[0], bytes);
fragP->fr_fix += fragP->tc_frag_data.text_expansion[0];
}
- vinsn_to_insnbuf (&orig_vinsn, fr_opcode, frag_now, FALSE);
- xtensa_insnbuf_to_chars (isa, orig_vinsn.insnbuf, fr_opcode, 0);
+ vinsn_to_insnbuf (&cur_vinsn, fr_opcode, frag_now, TRUE);
+ xtensa_insnbuf_to_chars
+ (isa, cur_vinsn.insnbuf, (unsigned char *) fr_opcode, 0);
fragP->fr_var = 0;
}
else
first = FALSE;
if (opcode_fits_format_slot (tinsn->opcode, fmt, slot))
{
- tinsn->record_fix = TRUE;
- orig_vinsn.slots[slot] = *tinsn;
+ cur_vinsn.slots[slot] = *tinsn;
}
else
{
- orig_vinsn.slots[slot].opcode =
+ cur_vinsn.slots[slot].opcode =
xtensa_format_slot_nop_opcode (isa, fmt, slot);
- orig_vinsn.slots[slot].ntok = 0;
- orig_vinsn.slots[slot].record_fix = FALSE;
+ cur_vinsn.slots[slot].ntok = 0;
}
- vinsn_to_insnbuf (&orig_vinsn, immed_instr, fragP, TRUE);
- xtensa_insnbuf_to_chars (isa, orig_vinsn.insnbuf,
- immed_instr, 0);
+ vinsn_to_insnbuf (&cur_vinsn, immed_instr, fragP, TRUE);
+ xtensa_insnbuf_to_chars (isa, cur_vinsn.insnbuf,
+ (unsigned char *) immed_instr, 0);
fragP->tc_frag_data.is_insn = TRUE;
size = xtensa_format_length (isa, fmt);
if (!opcode_fits_format_slot (tinsn->opcode, fmt, slot))
{
- xtensa_format single_fmt =
- xg_get_single_format (tinsn->opcode);
-
xg_emit_insn_to_buf
- (tinsn, single_fmt, immed_instr + size, fragP,
+ (tinsn, immed_instr + size, fragP,
immed_instr - fragP->fr_literal + size, TRUE);
size += xg_get_single_size (tinsn->opcode);
}
}
else
{
- xtensa_format single_format;
size = xg_get_single_size (tinsn->opcode);
- single_format = xg_get_single_format (tinsn->opcode);
- xg_emit_insn_to_buf (tinsn, single_format, immed_instr,
- fragP,
+ xg_emit_insn_to_buf (tinsn, immed_instr, fragP,
immed_instr - fragP->fr_literal, TRUE);
}
immed_instr += size;
fragP->fr_fix += diff;
}
- /* Clean it up. */
- xg_free_vinsn (&orig_vinsn);
-
/* Check for undefined immediates in LOOP instructions. */
if (is_loop)
{
addressT addi_offset = 9;
addressT addmi_offset = 12;
fragS *next_fragP;
- size_t target_count;
+ int target_count;
if (!insnbuf)
insnbuf = xtensa_insnbuf_alloc (isa);
tinsn_to_insnbuf (&addi_insn, insnbuf);
fragP->tc_frag_data.is_insn = TRUE;
- xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addi_offset, 0);
+ xtensa_insnbuf_to_chars
+ (isa, insnbuf, (unsigned char *) fragP->fr_opcode + addi_offset, 0);
set_expr_const (&addmi_insn.tok[2], loop_length_hi);
tinsn_to_insnbuf (&addmi_insn, insnbuf);
- xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addmi_offset, 0);
+ xtensa_insnbuf_to_chars
+ (isa, insnbuf, (unsigned char *) fragP->fr_opcode + addmi_offset, 0);
/* Walk through all of the frags from here to the loop end
and mark them as no_transform to keep them from being modified
\f
/* Segment Lists and emit_state Stuff. */
-/* Remove the segment from the global sections list. */
-
-static void
-xtensa_remove_section (segT sec)
-{
- /* Handle brain-dead bfd_section_list_remove macro, which
- expect the address of the prior section's "next" field, not
- just the address of the section to remove. */
-
- segT *ps_next_ptr = &stdoutput->sections;
- while (*ps_next_ptr != sec && *ps_next_ptr != NULL)
- ps_next_ptr = &(*ps_next_ptr)->next;
-
- assert (*ps_next_ptr != NULL);
-
- bfd_section_list_remove (stdoutput, ps_next_ptr);
-}
-
-
-static void
-xtensa_insert_section (segT after_sec, segT sec)
-{
- segT *after_sec_next;
- if (after_sec == NULL)
- after_sec_next = &stdoutput->sections;
- else
- after_sec_next = &after_sec->next;
-
- bfd_section_list_insert (stdoutput, after_sec_next, sec);
-}
-
-
static void
xtensa_move_seg_list_to_beginning (seg_list *head)
{
/* Move the literal section to the front of the section list. */
assert (literal_section);
- xtensa_remove_section (literal_section);
- xtensa_insert_section (NULL, literal_section);
-
+ if (literal_section != stdoutput->sections)
+ {
+ bfd_section_list_remove (stdoutput, literal_section);
+ bfd_section_list_prepend (stdoutput, literal_section);
+ }
head = head->next;
}
}
{
literal_pool = search_frag->tc_frag_data.literal_frag;
assert (literal_pool->fr_subtype == RELAX_LITERAL_POOL_BEGIN);
- /* Note that we set this fr_var to be a fix
- chain when we created the literal pool location
- as RELAX_LITERAL_POOL_BEGIN. */
- frchain_to = (frchainS *) literal_pool->fr_var;
+ frchain_to = literal_pool->tc_frag_data.lit_frchain;
+ assert (frchain_to);
}
insert_after = literal_pool;
while (insert_after->fr_next->fr_subtype != RELAX_LITERAL_POOL_END)
insert_after = insert_after->fr_next;
- dest_seg = (segT) insert_after->fr_next->fr_var;
+ dest_seg = insert_after->fr_next->tc_frag_data.lit_seg;
*frag_splice = next_frag;
search_frag->fr_next = insert_after->fr_next;
{
frchain_from = seg_info (segment->seg)->frchainP;
search_frag = frchain_from->frch_root;
- while (search_frag)
+ while (search_frag)
{
search_frag->tc_frag_data.is_literal = TRUE;
search_frag = search_frag->fr_next;
assert (literal_section);
if (literal_section != after)
{
- xtensa_remove_section (literal_section);
- xtensa_insert_section (after, literal_section);
+ bfd_section_list_remove (stdoutput, literal_section);
+ bfd_section_list_insert_after (stdoutput, after, literal_section);
}
head = head->next;
static bfd_boolean recursive = FALSE;
fragS *pool_location = get_literal_pool_location (now_seg);
- bfd_boolean is_init =
+ bfd_boolean is_init =
(now_seg && !strcmp (segment_name (now_seg), INIT_SECTION_NAME));
- bfd_boolean is_fini =
+ bfd_boolean is_fini =
(now_seg && !strcmp (segment_name (now_seg), FINI_SECTION_NAME));
if (pool_location == NULL
xtensa_block_info *cur_block;
/* This is a section with some data. */
int num_recs = 0;
- size_t rec_size;
+ bfd_size_type rec_size;
for (cur_block = block; cur_block; cur_block = cur_block->next)
num_recs++;
{
/* Allocate a fragment and leak it. */
fragS *fragP;
- size_t frag_size;
+ bfd_size_type frag_size;
fixS *fixes;
frchainS *frchainP;
int i;
flagword flags;
flags = bfd_get_section_flags (stdoutput, sec);
- if (flags & SEC_DEBUGGING)
- continue;
- if (!(flags & SEC_ALLOC))
+ if ((flags & SEC_DEBUGGING)
+ || !(flags & SEC_ALLOC)
+ || (flags & SEC_MERGE))
continue;
if (section_has_xproperty (sec, flag_fn))
xtensa_block_info *cur_block;
/* This is a section with some data. */
int num_recs = 0;
- size_t rec_size;
+ bfd_size_type rec_size;
for (cur_block = block; cur_block; cur_block = cur_block->next)
num_recs++;
{
/* Allocate a fragment and (unfortunately) leak it. */
fragS *fragP;
- size_t frag_size;
+ bfd_size_type frag_size;
fixS *fixes;
frchainS *frchainP;
int i;
xt_block_aligned_size (const xtensa_block_info *xt_block)
{
bfd_vma end_addr;
- size_t align_bits;
+ unsigned align_bits;
if (!xt_block->flags.is_align)
return xt_block->size;
/* FIXME: Make tinsn allocation dynamic. */
if (xtensa_opcode_num_operands (isa, opcode) >= MAX_INSN_ARGS)
as_fatal (_("too many operands in instruction"));
- opi->single = XTENSA_UNDEFINED;
- opi->single_size = 0;
- opi->widest = XTENSA_UNDEFINED;
- opi->widest_size = 0;
opi->narrowest = XTENSA_UNDEFINED;
opi->narrowest_size = 0x7F;
+ opi->narrowest_slot = 0;
opi->formats = 0;
opi->num_formats = 0;
opi->issuef = 0;
{
opi->narrowest = fmt;
opi->narrowest_size = fmt_length;
- }
- if (fmt_length > opi->widest_size)
- {
- opi->widest = fmt;
- opi->widest_size = fmt_length;
- }
- if (xtensa_format_num_slots (isa, fmt) == 1)
- {
- if (opi->single_size == 0
- || fmt_length < opi->single_size)
- {
- opi->single = fmt;
- opi->single_size = fmt_length;
- }
+ opi->narrowest_slot = slot;
}
}
}
static int
xg_get_single_size (xtensa_opcode opcode)
{
- assert (op_placement_table[opcode].single != XTENSA_UNDEFINED);
- return op_placement_table[opcode].single_size;
+ return op_placement_table[opcode].narrowest_size;
}
static xtensa_format
xg_get_single_format (xtensa_opcode opcode)
{
- return op_placement_table[opcode].single;
+ return op_placement_table[opcode].narrowest;
+}
+
+
+static int
+xg_get_single_slot (xtensa_opcode opcode)
+{
+ return op_placement_table[opcode].narrowest_slot;
}
\f
default:
/* Symbolic immediates are only allowed on the last immediate
operand. At this time, CONST16 is the only opcode where we
- support non-PC-relative relocations. (It isn't necessary
- to complain about non-PC-relative relocations here, but
- otherwise, no error is reported until the relocations are
- generated, and the assembler won't get that far if there
- are any other errors. It's nice to see all the problems
- at once.) */
+ support non-PC-relative relocations. */
if (i != get_relaxable_immed (insn->opcode)
|| (xtensa_operand_is_PCrelative (isa, insn->opcode, i) != 1
&& insn->opcode != xtensa_const16_opcode))
{
- as_bad (_("invalid symbolic operand %d on '%s'"),
- i, xtensa_opcode_name (isa, insn->opcode));
+ as_bad (_("invalid symbolic operand"));
return TRUE;
}
}
}
-/* Convert the constant operands in the tinsn to insnbuf.
- Return TRUE if there is a symbol in the immediate field.
-
- Before this is called,
- 1) the number of operands are correct
- 2) the tinsn is a ITYPE_INSN
- 3) ONLY the relaxable_ is built
- 4) All operands are O_constant, O_symbol. All constants fit
- The return value tells whether there are any remaining O_symbols. */
-
-static bfd_boolean
-tinsn_to_insnbuf (TInsn *tinsn, xtensa_insnbuf insnbuf)
-{
- static xtensa_insnbuf slotbuf = 0;
- xtensa_isa isa = xtensa_default_isa;
- xtensa_opcode opcode = tinsn->opcode;
- xtensa_format fmt = xg_get_single_format (opcode);
- bfd_boolean has_fixup = FALSE;
- int noperands = xtensa_opcode_num_operands (isa, opcode);
- int i;
- uint32 opnd_value;
- char *file_name;
- int line;
-
- if (!slotbuf)
- slotbuf = xtensa_insnbuf_alloc (isa);
-
- assert (tinsn->insn_type == ITYPE_INSN);
- if (noperands != tinsn->ntok)
- as_fatal (_("operand number mismatch"));
-
- if (xtensa_opcode_encode (isa, fmt, 0, slotbuf, opcode))
- as_fatal (_("cannot encode opcode"));
-
- for (i = 0; i < noperands; ++i)
- {
- expressionS *expr = &tinsn->tok[i];
- switch (expr->X_op)
- {
- case O_register:
- if (xtensa_operand_is_visible (isa, opcode, i) == 0)
- break;
- /* The register number has already been checked in
- expression_maybe_register, so we don't need to check here. */
- opnd_value = expr->X_add_number;
- (void) xtensa_operand_encode (isa, opcode, i, &opnd_value);
- xtensa_operand_set_field (isa, opcode, i, fmt, 0,
- slotbuf, opnd_value);
- break;
-
- case O_constant:
- if (xtensa_operand_is_visible (isa, opcode, i) == 0)
- break;
- as_where (&file_name, &line);
- /* It is a constant and we called this function,
- then we have to try to fit it. */
- xtensa_insnbuf_set_operand (slotbuf, fmt, 0, opcode, i,
- expr->X_add_number, file_name, line);
- break;
-
- default:
- has_fixup = TRUE;
- break;
- }
- }
-
- xtensa_format_encode (isa, fmt, insnbuf);
- xtensa_format_set_slot (isa, fmt, 0, insnbuf, slotbuf);
-
- return has_fixup;
-}
-
-
-/* Convert the constant operands in the tinsn to slotbuf.
- Return TRUE if there is a symbol in the immediate field.
- (Eventually this should replace tinsn_to_insnbuf.) */
-
-/* Before this is called,
- 1) the number of operands are correct
- 2) the tinsn is a ITYPE_INSN
- 3) ONLY the relaxable_ is built
- 4) All operands are
- O_constant, O_symbol
- All constants fit
-
- The return value tells whether there are any remaining O_symbols. */
+/* Encode a TInsn opcode and its constant operands into slotbuf.
+ Return TRUE if there is a symbol in the immediate field. This
+ function assumes that:
+ 1) The number of operands are correct.
+ 2) The insn_type is ITYPE_INSN.
+ 3) The opcode can be encoded in the specified format and slot.
+ 4) Operands are either O_constant or O_symbol, and all constants fit. */
static bfd_boolean
tinsn_to_slotbuf (xtensa_format fmt,
int noperands = xtensa_opcode_num_operands (isa, opcode);
int i;
- *((int *) &slotbuf[0]) = 0;
- *((int *) &slotbuf[1]) = 0;
assert (tinsn->insn_type == ITYPE_INSN);
if (noperands != tinsn->ntok)
as_fatal (_("operand number mismatch"));
for (i = 0; i < noperands; i++)
{
expressionS *expr = &tinsn->tok[i];
- int rc, line;
+ int rc;
+ unsigned line;
char *file_name;
uint32 opnd_value;
}
+/* Encode a single TInsn into an insnbuf. If the opcode can only be encoded
+ into a multi-slot instruction, fill the other slots with NOPs.
+ Return TRUE if there is a symbol in the immediate field. See also the
+ assumptions listed for tinsn_to_slotbuf. */
+
+static bfd_boolean
+tinsn_to_insnbuf (TInsn *tinsn, xtensa_insnbuf insnbuf)
+{
+ static xtensa_insnbuf slotbuf = 0;
+ static vliw_insn vinsn;
+ xtensa_isa isa = xtensa_default_isa;
+ bfd_boolean has_fixup = FALSE;
+ int i;
+
+ if (!slotbuf)
+ {
+ slotbuf = xtensa_insnbuf_alloc (isa);
+ xg_init_vinsn (&vinsn);
+ }
+
+ xg_clear_vinsn (&vinsn);
+
+ bundle_tinsn (tinsn, &vinsn);
+
+ xtensa_format_encode (isa, vinsn.format, insnbuf);
+
+ for (i = 0; i < vinsn.num_slots; i++)
+ {
+ /* Only one slot may have a fix-up because the rest contains NOPs. */
+ has_fixup |=
+ tinsn_to_slotbuf (vinsn.format, i, &vinsn.slots[i], vinsn.slotbuf[i]);
+ xtensa_format_set_slot (isa, vinsn.format, i, insnbuf, vinsn.slotbuf[i]);
+ }
+
+ return has_fixup;
+}
+
+
/* Check the instruction arguments. Return TRUE on failure. */
static bfd_boolean
{
opnum = get_relaxable_immed (opcode);
assert (opnum >= 0);
- if (fragP->tc_frag_data.slot_sub_symbols[slot])
- {
- set_expr_symbol_offset_diff
- (&tinsn->tok[opnum],
- fragP->tc_frag_data.slot_symbols[slot],
- fragP->tc_frag_data.slot_sub_symbols[slot],
- fragP->tc_frag_data.slot_offsets[slot]);
- }
- else
- {
- set_expr_symbol_offset
- (&tinsn->tok[opnum],
- fragP->tc_frag_data.slot_symbols[slot],
- fragP->tc_frag_data.slot_offsets[slot]);
- }
+ set_expr_symbol_offset (&tinsn->tok[opnum],
+ fragP->tc_frag_data.slot_symbols[slot],
+ fragP->tc_frag_data.slot_offsets[slot]);
}
}
for (i = 0; i < MAX_SLOTS; i++)
{
- tinsn_init (&v->slots[i]);
- v->slots[i].opcode = XTENSA_UNDEFINED;
v->slotbuf[i] = xtensa_insnbuf_alloc (isa);
if (v->slotbuf[i] == NULL)
as_fatal (_("out of memory"));
xg_clear_vinsn (vliw_insn *v)
{
int i;
+
+ memset (v, 0, offsetof (vliw_insn, insnbuf));
+
v->format = XTENSA_UNDEFINED;
v->num_slots = 0;
v->inside_bundle = FALSE;
debug_type = xt_saved_debug_type;
for (i = 0; i < MAX_SLOTS; i++)
- {
- memset (&v->slots[i], 0, sizeof (TInsn));
- v->slots[i].opcode = XTENSA_UNDEFINED;
- }
+ v->slots[i].opcode = XTENSA_UNDEFINED;
}
vinsn_has_specific_opcodes (vliw_insn *v)
{
int i;
-
+
for (i = 0; i < v->num_slots; i++)
{
if (v->slots[i].is_specific_opcode)
}
-/* Before this is called, we should have
- filled out the following fields:
-
- 1) the number of operands for each opcode are correct
- 2) the tinsn in the slots are ITYPE_INSN
- 3) ONLY the relaxable_ is built
- 4) All operands are
- O_constant, O_symbol
- All constants fit
-
- The return value tells whether there are any remaining O_symbols. */
+/* Encode a vliw_insn into an insnbuf. Return TRUE if there are any symbolic
+ operands. See also the assumptions listed for tinsn_to_slotbuf. */
static bfd_boolean
vinsn_to_insnbuf (vliw_insn *vinsn,
xtensa_format_set_slot (isa, fmt, slot,
insnbuf, vinsn->slotbuf[slot]);
- /* tinsn_has_fixup tracks if there is a fixup at all.
- record_fixup controls globally. I.E., we use this
- function from several places, some of which are after
- fixups have already been recorded. Finally,
- tinsn->record_fixup controls based on the individual ops,
- which may or may not need it based on the relaxation
- requirements. */
- if (tinsn_has_fixup && record_fixup)
+ if (tinsn_has_fixup)
{
int i;
xtensa_opcode opcode = tinsn->opcode;
case O_hi16:
if (get_relaxable_immed (opcode) == i)
{
- if (tinsn->record_fix || expr->X_op != O_symbol)
+ /* Add a fix record for the instruction, except if this
+ function is being called prior to relaxation, i.e.,
+ if record_fixup is false, and the instruction might
+ be relaxed later. */
+ if (record_fixup
+ || tinsn->is_specific_opcode
+ || !xg_is_relaxable_insn (tinsn, 0))
{
- if (!xg_add_opcode_fix
- (tinsn, i, fmt, slot, expr, fragP,
- frag_offset - fragP->fr_literal))
- as_bad (_("instruction with constant operands does not fit"));
+ xg_add_opcode_fix (tinsn, i, fmt, slot, expr, fragP,
+ frag_offset - fragP->fr_literal);
}
else
{
+ if (expr->X_op != O_symbol)
+ as_bad (_("invalid operand"));
tinsn->symbol = expr->X_add_symbol;
tinsn->offset = expr->X_add_number;
}
}
else
- as_bad (_("invalid operand %d on '%s'"),
- i, xtensa_opcode_name (isa, opcode));
+ as_bad (_("symbolic operand not allowed"));
break;
case O_constant:
case O_register:
break;
- case O_subtract:
- if (get_relaxable_immed (opcode) == i)
- {
- if (tinsn->record_fix)
- as_bad (_("invalid subtract operand"));
- else
- {
- tinsn->symbol = expr->X_add_symbol;
- tinsn->sub_symbol = expr->X_op_symbol;
- tinsn->offset = expr->X_add_number;
- }
- }
- else
- as_bad (_("invalid operand %d on '%s'"),
- i, xtensa_opcode_name (isa, opcode));
- break;
-
default:
- as_bad (_("invalid expression for operand %d on '%s'"),
- i, xtensa_opcode_name (isa, opcode));
+ as_bad (_("expression too complex"));
break;
}
}
slotbuf = xtensa_insnbuf_alloc (isa);
}
- xtensa_insnbuf_from_chars (isa, insnbuf, f, 0);
+ xtensa_insnbuf_from_chars (isa, insnbuf, (unsigned char *) f, 0);
fmt = xtensa_format_decode (isa, insnbuf);
if (fmt == XTENSA_UNDEFINED)
as_fatal (_("cannot decode instruction format"));
}
-/* Set the expression to symbol - minus_sym + offset. */
-
-static void
-set_expr_symbol_offset_diff (expressionS *s,
- symbolS *sym,
- symbolS *minus_sym,
- offsetT offset)
-{
- s->X_op = O_subtract;
- s->X_add_symbol = sym;
- s->X_op_symbol = minus_sym; /* unused */
- s->X_add_number = offset;
-}
-
-
/* Return TRUE if the two expressions are equal. */
bfd_boolean
projects / deliverable / binutils-gdb.git / blobdiff