\input texinfo @c -*-Texinfo-*-
@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
-@c 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
+@c 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
@c Free Software Foundation, Inc.
@c UPDATE!! On future updates--
@c (1) check for new machine-dep cmdline options in
@c man begin COPYRIGHT
Copyright @copyright{} 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
-2006, 2007, 2008 Free Software Foundation, Inc.
+2006, 2007, 2008, 2009 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
@vskip 0pt plus 1filll
Copyright @copyright{} 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
-2006, 2007, 2008 Free Software Foundation, Inc.
+2006, 2007, 2008, 2009 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
@emph{Target Alpha options:}
[@b{-m@var{cpu}}]
[@b{-mdebug} | @b{-no-mdebug}]
+ [@b{-replace} | @b{-noreplace}]
[@b{-relax}] [@b{-g}] [@b{-G@var{size}}]
[@b{-F}] [@b{-32addr}]
@end ifset
@emph{Target i386 options:}
[@b{--32}|@b{--64}] [@b{-n}]
- [@b{-march}=@var{CPU}[+@var{EXTENSION}@dots{}]] [@b{-mtune}=@var{CPU}]
+ [@b{-march}=@var{CPU}[+@var{EXTENSION}@dots{}]] [@b{-mtune}=@var{CPU}]
@end ifset
@ifset I960
@emph{Target PowerPC options:}
[@b{-mpwrx}|@b{-mpwr2}|@b{-mpwr}|@b{-m601}|@b{-mppc}|@b{-mppc32}|@b{-m603}|@b{-m604}|
- @b{-m403}|@b{-m405}|@b{-mppc64}|@b{-m620}|@b{-mppc64bridge}|@b{-mbooke}|
- @b{-mbooke32}|@b{-mbooke64}]
+ @b{-m403}|@b{-m405}|@b{-mppc64}|@b{-m620}|@b{-mppc64bridge}|@b{-mbooke}]
[@b{-mcom}|@b{-many}|@b{-maltivec}|@b{-mvsx}] [@b{-memb}]
[@b{-mregnames}|@b{-mno-regnames}]
[@b{-mrelocatable}|@b{-mrelocatable-lib}]
[@b{-mlittle}|@b{-mlittle-endian}|@b{-mbig}|@b{-mbig-endian}]
[@b{-msolaris}|@b{-mno-solaris}]
@end ifset
+@ifset S390
+
+@emph{Target s390 options:}
+ [@b{-m31}|@b{-m64}] [@b{-mesa}|@b{-mzarch}] [@b{-march}=@var{CPU}]
+ [@b{-mregnames}|@b{-mno-regnames}]
+ [@b{-mwarn-areg-zero}]
+@end ifset
+@ifset SCORE
+
+@emph{Target SCORE options:}
+ [@b{-EB}][@b{-EL}][@b{-FIXDD}][@b{-NWARN}]
+ [@b{-SCORE5}][@b{-SCORE5U}][@b{-SCORE7}][@b{-SCORE3}]
+ [@b{-march=score7}][@b{-march=score3}]
+ [@b{-USE_R1}][@b{-KPIC}][@b{-O0}][@b{-G} @var{num}][@b{-V}]
+@end ifset
@ifset SPARC
@emph{Target SPARC options:}
See the info pages for documentation of the MMIX-specific options.
@end ifset
+@ifset S390
+The following options are available when @value{AS} is configured for the s390
+processor family.
+
+@table @gcctabopt
+@item -m31
+@itemx -m64
+Select the word size, either 31/32 bits or 64 bits.
+@item -mesa
+@item -mzarch
+Select the architecture mode, either the Enterprise System
+Architecture (esa) or the z/Architecture mode (zarch).
+@item -march=@var{processor}
+Specify which s390 processor variant is the target, @samp{g6}, @samp{g6},
+@samp{z900}, @samp{z990}, @samp{z9-109}, @samp{z9-ec}, or @samp{z10}.
+@item -mregnames
+@itemx -mno-regnames
+Allow or disallow symbolic names for registers.
+@item -mwarn-areg-zero
+Warn whenever the operand for a base or index register has been specified
+but evaluates to zero.
+@end table
+@end ifset
+
@ifset XTENSA
The following options are available when @value{AS} is configured for
an Xtensa processor.
@ifset PPC
@samp{#} for Motorola PowerPC;
@end ifset
+@ifset S390
+@samp{#} for IBM S/390;
+@end ifset
+@ifset SCORE
+@samp{#} for the Sunplus SCORE;
+@end ifset
@ifset SH
@samp{!} for the Renesas / SuperH SH;
@end ifset
the same name, and they do not all have the same size, it will allocate space
using the largest size.
-@ifset ELF
-When using ELF, the @code{.comm} directive takes an optional third argument.
-This is the desired alignment of the symbol, specified as a byte boundary (for
-example, an alignment of 16 means that the least significant 4 bits of the
-address should be zero). The alignment must be an absolute expression, and it
-must be a power of two. If @code{@value{LD}} allocates uninitialized memory
-for the common symbol, it will use the alignment when placing the symbol. If
-no alignment is specified, @command{@value{AS}} will set the alignment to the
+@ifset COFF-ELF
+When using ELF or (as a GNU extension) PE, the @code{.comm} directive takes
+an optional third argument. This is the desired alignment of the symbol,
+specified for ELF as a byte boundary (for example, an alignment of 16 means
+that the least significant 4 bits of the address should be zero), and for PE
+as a power of two (for example, an alignment of 5 means aligned to a 32-byte
+boundary). The alignment must be an absolute expression, and it must be a
+power of two. If @code{@value{LD}} allocates uninitialized memory for the
+common symbol, it will use the alignment when placing the symbol. If no
+alignment is specified, @command{@value{AS}} will set the alignment to the
largest power of two less than or equal to the size of the symbol, up to a
-maximum of 16.
+maximum of 16 on ELF, or the default section alignment of 4 on PE@footnote{This
+is not the same as the executable image file alignment controlled by @code{@value{LD}}'s
+@samp{--section-alignment} option; image file sections in PE are aligned to
+multiples of 4096, which is far too large an alignment for ordinary variables.
+It is rather the default alignment for (non-debug) sections within object
+(@samp{*.o}) files, which are less strictly aligned.}.
@end ifset
@ifset HPPA
This directive will set the @code{isa} register in the @code{.debug_line}
state machine to @var{value}, which must be an unsigned integer.
+@item discriminator @var{value}
+This directive will set the @code{discriminator} register in the @code{.debug_line}
+state machine to @var{value}, which must be an unsigned integer.
+
@end table
@node Loc_mark_labels
shared section (meaningful for PE targets)
@item a
ignored. (For compatibility with the ELF version)
+@item y
+section is not readable (meaningful for PE targets)
@end table
If no flags are specified, the default flags depend upon the section name. If
@code{S} must contain zero terminated strings where each character is
@var{entsize} bytes long. The linker may remove duplicates within sections with
the same name, same entity size and same flags. @var{entsize} must be an
-absolute expression.
+absolute expression. For sections with both @code{M} and @code{S}, a string
+which is a suffix of a larger string is considered a duplicate. Thus
+@code{"def"} will be merged with @code{"abcdef"}; A reference to the first
+@code{"def"} will be changed to a reference to @code{"abcdef"+3}.
If @var{flags} contains the @code{G} symbol then the @var{type} argument must
be present along with an additional field like this:
@itemx function
Mark the symbol as being a function name.
+@item STT_GNU_IFUNC
+@itemx gnu_indirect_function
+Mark the symbol as an indirect function when evaluated during reloc
+processing. (This is only supported on Linux targeted assemblers).
+
@item STT_OBJECT
@itemx object
Mark the symbol as being a data object.
@itemx notype
Does not mark the symbol in any way. It is supported just for completeness.
-@item STT_IFUNC
-@itemx indirect_function
-Mark the symbol as an indirect function when evaluated during reloc
-processing. (This is only supported on Linux targeted assemblers).
+@item gnu_unique_object
+Marks the symbol as being a globally unique data object. The dynamic linker
+will make sure that in the entire process there is just one symbol with this
+name and type in use. (This is only supported on Linux targeted assemblers).
+
@end table
Note: Some targets support extra types in addition to those listed above.
@ifset IP2K
* IP2K-Dependent:: IP2K Dependent Features
@end ifset
+@ifset LM32
+* LM32-Dependent:: LM32 Dependent Features
+@end ifset
@ifset M32C
* M32C-Dependent:: M32C Dependent Features
@end ifset
@ifset PPC
* PPC-Dependent:: PowerPC Dependent Features
@end ifset
+@ifset S390
+* S/390-Dependent:: IBM S/390 Dependent Features
+@end ifset
+@ifset SCORE
+* SCORE-Dependent:: SCORE Dependent Features
+@end ifset
@ifset SPARC
* Sparc-Dependent:: SPARC Dependent Features
@end ifset
@include c-ip2k.texi
@end ifset
+@ifset LM32
+@include c-lm32.texi
+@end ifset
+
@ifset M32C
@include c-m32c.texi
@end ifset
@include c-ppc.texi
@end ifset
+@ifset S390
+@include c-s390.texi
+@end ifset
+
+@ifset SCORE
+@include c-score.texi
+@end ifset
+
@ifset SH
@include c-sh.texi
@include c-sh64.texi
Several engineers at Cygnus Support have also provided many small bug fixes and
configuration enhancements.
+Jon Beniston added support for the Lattice Mico32 architecture.
+
Many others have contributed large or small bugfixes and enhancements. If
you have contributed significant work and are not mentioned on this list, and
want to be, let us know. Some of the history has been lost; we are not
projects / deliverable / binutils-gdb.git / blobdiff