[@b{-mnan=@var{encoding}}]
[@b{-trap}] [@b{-no-break}] [@b{-break}] [@b{-no-trap}]
[@b{-mips16}] [@b{-no-mips16}]
+ [@b{-mmips16e2}] [@b{-mno-mips16e2}]
[@b{-mmicromips}] [@b{-mno-micromips}]
[@b{-msmartmips}] [@b{-mno-smartmips}]
[@b{-mips3d}] [@b{-no-mips3d}]
@b{-m620}|@b{-me500}|@b{-e500x2}|@b{-me500mc}|@b{-me500mc64}|@b{-me5500}|@b{-me6500}|@b{-mppc64bridge}|
@b{-mbooke}|@b{-mpower4}|@b{-mpwr4}|@b{-mpower5}|@b{-mpwr5}|@b{-mpwr5x}|@b{-mpower6}|@b{-mpwr6}|
@b{-mpower7}|@b{-mpwr7}|@b{-mpower8}|@b{-mpwr8}|@b{-mpower9}|@b{-mpwr9}@b{-ma2}|
- @b{-mcell}|@b{-mspe}|@b{-mtitan}|@b{-me300}|@b{-mcom}]
+ @b{-mcell}|@b{-mspe}|@b{-mspe2}|@b{-mtitan}|@b{-me300}|@b{-mcom}]
[@b{-many}] [@b{-maltivec}|@b{-mvsx}|@b{-mhtm}|@b{-mvle}]
[@b{-mregnames}|@b{-mno-regnames}]
[@b{-mrelocatable}|@b{-mrelocatable-lib}|@b{-K PIC}] [@b{-memb}]
[@b{-mnolink-relax}]
[@b{-mno-warn-regname-label}]
@end ifset
+@ifset RISCV
+
+@emph{Target RISC-V options:}
+ [@b{-fpic}|@b{-fPIC}|@b{-fno-pic}]
+ [@b{-march}=@var{ISA}]
+ [@b{-mabi}=@var{ABI}]
+@end ifset
@ifset RL78
@emph{Target RL78 options:}
[@b{-mint-register=@var{number}}]
[@b{-mgcc-abi}|@b{-mrx-abi}]
@end ifset
-@ifset RISCV
-
-@emph{Target RISC-V options:}
- [@b{-march}=@var{ISA}]
- [@b{-mabi}=@var{ABI}]
-@end ifset
@ifset S390
@emph{Target s390 options:}
@item -mips16
@itemx -no-mips16
Generate code for the MIPS 16 processor. This is equivalent to putting
-@code{.set mips16} at the start of the assembly file. @samp{-no-mips16}
+@code{.module mips16} at the start of the assembly file. @samp{-no-mips16}
turns off this option.
+@item -mmips16e2
+@itemx -mno-mips16e2
+Enable the use of MIPS16e2 instructions in MIPS16 mode. This is equivalent
+to putting @code{.module mips16e2} at the start of the assembly file.
+@samp{-mno-mips16e2} turns off this option.
+
@item -mmicromips
@itemx -mno-micromips
Generate code for the microMIPS processor. This is equivalent to putting
-@code{.set micromips} at the start of the assembly file. @samp{-mno-micromips}
-turns off this option. This is equivalent to putting @code{.set nomicromips}
-at the start of the assembly file.
+@code{.module micromips} at the start of the assembly file.
+@samp{-mno-micromips} turns off this option. This is equivalent to putting
+@code{.module nomicromips} at the start of the assembly file.
@item -msmartmips
@itemx -mno-smartmips
-Enables the SmartMIPS extension to the MIPS32 instruction set. This is
-equivalent to putting @code{.set smartmips} at the start of the assembly file.
-@samp{-mno-smartmips} turns off this option.
+Enables the SmartMIPS extension to the MIPS32 instruction set. This is
+equivalent to putting @code{.module smartmips} at the start of the assembly
+file. @samp{-mno-smartmips} turns off this option.
@item -mips3d
@itemx -no-mips3d
@ifset RISCV
@ifclear man
-@xref{RISC-V-Opts}, for the options available when @value{AS} is configured
+@xref{RISC-V-Options}, for the options available when @value{AS} is configured
for a RISC-V processor.
@end ifclear
@ifset man
@c man begin OPTIONS
The following options are available when @value{AS} is configured for a
-RISC-V processor.
+RISC-V processor.
@c man end
@c man begin INCLUDE
@include c-riscv.texi
@samp{arch3}), @samp{g6}, @samp{z900} (or @samp{arch5}), @samp{z990} (or
@samp{arch6}), @samp{z9-109}, @samp{z9-ec} (or @samp{arch7}), @samp{z10} (or
@samp{arch8}), @samp{z196} (or @samp{arch9}), @samp{zEC12} (or @samp{arch10}),
-@samp{z13} (or @samp{arch11}), or @samp{arch12}.
+@samp{z13} (or @samp{arch11}), or @samp{z14} (or @samp{arch12}).
@item -mregnames
@itemx -mno-regnames
Allow or disallow symbolic names for registers.
The second expression (also absolute) gives the fill value to be stored in the
padding bytes. It (and the comma) may be omitted. If it is omitted, the
-padding bytes are normally zero. However, on some systems, if the section is
+padding bytes are normally zero. However, on most systems, if the section is
marked as containing code and the fill value is omitted, the space is filled
with no-op instructions.
The second expression (also absolute) gives the fill value to be stored in the
padding bytes. It (and the comma) may be omitted. If it is omitted, the
-padding bytes are normally zero. However, on some systems, if the section is
+padding bytes are normally zero. However, on most systems, if the section is
marked as containing code and the fill value is omitted, the space is filled
with no-op instructions.
This directive will set the @code{discriminator} register in the @code{.debug_line}
state machine to @var{value}, which must be an unsigned integer.
+@item view @var{value}
+This option causes a row to be added to @code{.debug_line} in reference to the
+current address (which might not be the same as that of the following assembly
+instruction), and to associate @var{value} with the @code{view} register in the
+@code{.debug_line} state machine. If @var{value} is a label, both the
+@code{view} register and the label are set to the number of prior @code{.loc}
+directives at the same program location. If @var{value} is the literal
+@code{0}, the @code{view} register is set to zero, and the assembler asserts
+that there aren't any prior @code{.loc} directives at the same program
+location. If @var{value} is the literal @code{-0}, the assembler arrange for
+the @code{view} register to be reset in this row, even if there are prior
+@code{.loc} directives at the same program location.
+
@end table
@node Loc_mark_labels
The second expression (also absolute) gives the fill value to be stored in the
padding bytes. It (and the comma) may be omitted. If it is omitted, the
-padding bytes are normally zero. However, on some systems, if the section is
+padding bytes are normally zero. However, on most systems, if the section is
marked as containing code and the fill value is omitted, the space is filled
with no-op instructions.
.long 0
@end example
+A count of zero is allowed, but nothing is generated. Negative counts are not
+allowed and if encountered will be treated as if they were zero.
+
@node Sbttl
@section @code{.sbttl "@var{subheading}"}
@table @code
@item a
section is allocatable
+@item d
+section is a GNU_MBIND section
@item e
section is excluded from executable and shared library.
@item w
@cindex two-byte integer
@cindex integer, 2-byte
-This directive expects zero or more expressions, separated by commas. Each
-expression is evaluated and placed in the next two bytes of the current
-section. If an expression will not fit in two bytes, a warning message
-is displayed and the lowest two bytes of the expression's value are used.
+This directive expects zero or more expressions, separated by commas. If there
+are no expressions then the directive does nothing. Otherwise each expression
+is evaluated in turn and placed in the next two bytes of the current output
+section, using the endian model of the target. If an expression will not fit
+in two bytes, a warning message is displayed and the least significant two
+bytes of the expression's value are used. If an expression cannot be evaluated
+at assembly time then relocations will be generated in order to compute the
+value at link time.
+
+This directive does not apply any alignment before or after inserting the
+values. As a result of this, if relocations are generated, they may be
+different from those used for inserting values with a guaranteed alignment.
+
This directive is only available for ELF targets,
@node 4byte
@cindex four-byte integer
@cindex integer, 4-byte
-This directive expects zero or more expressions, separated by commas. Each
-expression is evaluated and placed in the next four bytes of the current
-section. If an expression will not fit in four bytes, a warning message
-is displayed and the lowest four bytes of the expression's value are used.
-This directive is only available for ELF targets,
+Like the @option{.2byte} directive, except that it inserts unaligned, four byte
+long values into the output.
@node 8byte
@section @code{.8byte @var{expression} [, @var{expression}]*}
@cindex eight-byte integer
@cindex integer, 8-byte
-This directive expects zero or more expressions, separated by commas. Each
-expression is evaluated and the resulting bignum is placed in the next eight
-bytes of the current section. If an expression will not fit in eight bytes, a
-warning message is displayed and the lowest eight bytes of the expression's
-value are used. This directive is only available for ELF targets,
+Like the @option{.2byte} directive, except that it inserts unaligned, eight
+byte long bignum values into the output.
+
@end ifset
@node Deprecated
@ifset PRU
* PRU-Dependent:: PRU Dependent Features
@end ifset
-@ifset RL78
-* RL78-Dependent:: RL78 Dependent Features
-@end ifset
@ifset RISCV
* RISC-V-Dependent:: RISC-V Dependent Features
@end ifset
+@ifset RL78
+* RL78-Dependent:: RL78 Dependent Features
+@end ifset
@ifset RX
* RX-Dependent:: RX Dependent Features
@end ifset
@ifset VISIUM
* Visium-Dependent:: Visium Dependent Features
@end ifset
+@ifset WASM32
+* WebAssembly-Dependent:: WebAssembly Dependent Features
+@end ifset
@ifset XGATE
-* XGATE-Dependent:: XGATE Features
+* XGATE-Dependent:: XGATE Dependent Features
@end ifset
@ifset XSTORMY16
* XSTORMY16-Dependent:: XStormy16 Dependent Features
@include c-pru.texi
@end ifset
-@ifset RL78
-@include c-rl78.texi
-@end ifset
-
@ifset RISCV
@include c-riscv.texi
@end ifset
+@ifset RL78
+@include c-rl78.texi
+@end ifset
+
@ifset RX
@include c-rx.texi
@end ifset
@include c-visium.texi
@end ifset
+@ifset WASM32
+@include c-wasm32.texi
+@end ifset
+
@ifset XGATE
@include c-xgate.texi
@end ifset
projects / deliverable / binutils-gdb.git / blobdiff