[@b{-modd-spreg}] [@b{-mno-odd-spreg}]
[@b{-march}=@var{CPU}] [@b{-mtune}=@var{CPU}] [@b{-mips1}] [@b{-mips2}]
[@b{-mips3}] [@b{-mips4}] [@b{-mips5}] [@b{-mips32}] [@b{-mips32r2}]
- [@b{-mips32r3}] [@b{-mips32r5}] [@b{-mips64}] [@b{-mips64r2}]
- [@b{-mips64r3}] [@b{-mips64r5}]
+ [@b{-mips32r3}] [@b{-mips32r5}] [@b{-mips32r6}] [@b{-mips64}] [@b{-mips64r2}]
+ [@b{-mips64r3}] [@b{-mips64r5}] [@b{-mips64r6}]
[@b{-construct-floats}] [@b{-no-construct-floats}]
[@b{-mnan=@var{encoding}}]
[@b{-trap}] [@b{-no-break}] [@b{-break}] [@b{-no-trap}]
@itemx -mips32r2
@itemx -mips32r3
@itemx -mips32r5
+@itemx -mips32r6
@itemx -mips64
@itemx -mips64r2
@itemx -mips64r3
@itemx -mips64r5
+@itemx -mips64r6
Generate code for a particular MIPS Instruction Set Architecture level.
@samp{-mips1} is an alias for @samp{-march=r3000}, @samp{-mips2} is an
alias for @samp{-march=r6000}, @samp{-mips3} is an alias for
@samp{-march=r4000} and @samp{-mips4} is an alias for @samp{-march=r8000}.
@samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, @samp{-mips32r3},
-@samp{-mips32r5}, @samp{-mips64}, @samp{-mips64r2}, @samp{-mips64r3}, and
-@samp{-mips64r5} correspond to generic MIPS V, MIPS32, MIPS32 Release 2,
-MIPS32 Release 3, MIPS32 Release 5, MIPS64, MIPS64 Release 2,
-MIPS64 Release 3, and MIPS64 Release 5 ISA processors, respectively.
+@samp{-mips32r5}, @samp{-mips32r6}, @samp{-mips64}, @samp{-mips64r2},
+@samp{-mips64r3}, @samp{-mips64r5}, and @samp{-mips64r6} correspond to generic
+MIPS V, MIPS32, MIPS32 Release 2, MIPS32 Release 3, MIPS32 Release 5, MIPS32
+Release 6, MIPS64, MIPS64 Release 2, MIPS64 Release 3, MIPS64 Release 5, and
+MIPS64 Release 6 ISA processors, respectively.
@item -march=@var{cpu}
Generate code for a particular MIPS CPU.