Update descriptions of the .2byte, .4byte and .8byte directives.

[deliverable/binutils-gdb.git] / gas / doc / c-arc.texi

diff --git a/gas/doc/c-arc.texi b/gas/doc/c-arc.texi
index a3e18cfd2a86c81bd49e9769e249db4f01bfbc29..1ff0b0fdceb77c64963c952ee13082e4051fa312 100644 (file)
--- a/gas/doc/c-arc.texi
+++ b/gas/doc/c-arc.texi
@@ -1,4 +1,4 @@
-@c Copyright (C) 2000-2016 Free Software Foundation, Inc.
+@c Copyright (C) 2000-2017 Free Software Foundation, Inc.
 @c This is part of the GAS manual.
 @c For copying conditions, see the file as.texinfo.
 
@@ -47,10 +47,28 @@ convenience.  Supported values for @var{cpu} are
 @item arc600
 Assemble for ARC 600.  Aliases: @code{-mA6}, @code{-mARC600}.
 
+@item arc600_norm
+Assemble for ARC 600 with norm instructions.
+
+@item arc600_mul64
+Assemble for ARC 600 with mul64 instructions.
+
+@item arc600_mul32x16
+Assemble for ARC 600 with mul32x16 instructions.
+
 @item arc601
 @cindex @code{mARC601} command line option, ARC
 Assemble for ARC 601.  Alias: @code{-mARC601}.
 
+@item arc601_norm
+Assemble for ARC 601 with norm instructions.
+
+@item arc601_mul64
+Assemble for ARC 601 with mul64 instructions.
+
+@item arc601_mul32x16
+Assemble for ARC 601 with mul32x16 instructions.
+
 @item arc700
 @cindex @code{mA7} command line option, ARC
 @cindex @code{mARC700} command line option, ARC
@@ -60,14 +78,49 @@ Assemble for ARC 700.  Aliases: @code{-mA7}, @code{-mARC700}.
 @cindex @code{mEM} command line option, ARC
 Assemble for ARC EM.  Aliases: @code{-mEM}
 
+@item em
+Assemble for ARC EM, identical as arcem variant.
+
+@item em4
+Assemble for ARC EM with code-density instructions.
+
+@item em4_dmips
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpus
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpuda
+Assemble for ARC EM with code-density, and double-precision assist
+instructions.
+
+@item quarkse_em
+Assemble for QuarkSE-EM cpu.
+
 @item archs
 @cindex @code{mHS} command line option, ARC
 Assemble for ARC HS.  Aliases: @code{-mHS}, @code{-mav2hs}.
 
+@item hs
+Assemble for ARC HS.
+
+@item hs34
+Assemble for ARC HS34.
+
+@item hs38
+Assemble for ARC HS38.
+
+@item hs38_linux
+Assemble for ARC HS38 with floating point support on.
+
+@item nps400
+@cindex @code{mnps400} command line option, ARC
+Assemble for ARC 700 with NPS-400 extended instructions.
+
 @end table
 
-Note: the @code{.cpu} directive can to be used to select a core
-variant from within assembly code.
+Note: the @code{.cpu} directive (@pxref{ARC Directives}) can
+to be used to select a core variant from within assembly code.
 
 @cindex @code{-EB} command line option, ARC
 @item -EB
@@ -91,6 +144,23 @@ Enable support for assembly-time relaxation.  The assembler will
 replace a longer version of an instruction with a shorter one,
 whenever it is possible.
 
+@cindex @code{-mnps400} command line option, ARC
+@item -mnps400
+Enable support for NPS-400 extended instructions.
+
+@cindex @code{-mspfp} command line option, ARC
+@item -mspfp
+Enable support for single-precision floating point instructions.
+
+@cindex @code{-mdpfp} command line option, ARC
+@item -mdpfp
+Enable support for double-precision floating point instructions.
+
+@cindex @code{-mfpuda} command line option, ARC
+@item -mfpuda
+Enable support for double-precision assist floating point instructions.
+Only valid for ARC EM processors.
+
 @end table
 
 @node ARC Syntax
@@ -347,15 +417,73 @@ version.  Permitted values for CPU are:
 @item ARC600
 Assemble for the ARC600 instruction set.
 
+@item arc600_norm
+Assemble for ARC 600 with norm instructions.
+
+@item arc600_mul64
+Assemble for ARC 600 with mul64 instructions.
+
+@item arc600_mul32x16
+Assemble for ARC 600 with mul32x16 instructions.
+
+@item arc601
+Assemble for ARC 601 instruction set.
+
+@item arc601_norm
+Assemble for ARC 601 with norm instructions.
+
+@item arc601_mul64
+Assemble for ARC 601 with mul64 instructions.
+
+@item arc601_mul32x16
+Assemble for ARC 601 with mul32x16 instructions.
+
 @item ARC700
 Assemble for the ARC700 instruction set.
 
+@item NPS400
+Assemble for the NPS400 instruction set.
+
 @item EM
 Assemble for the ARC EM instruction set.
 
+@item arcem
+Assemble for ARC EM instruction set
+
+@item em4
+Assemble for ARC EM with code-density instructions.
+
+@item em4_dmips
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpus
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpuda
+Assemble for ARC EM with code-density, and double-precision assist
+instructions.
+
+@item quarkse_em
+Assemble for QuarkSE-EM instruction set.
+
 @item HS
 Assemble for the ARC HS instruction set.
 
+@item archs
+Assemble for ARC HS instruction set.
+
+@item hs
+Assemble for ARC HS instruction set.
+
+@item hs34
+Assemble for ARC HS34 instruction set.
+
+@item hs38
+Assemble for ARC HS38 instruction set.
+
+@item hs38_linux
+Assemble for ARC HS38 with floating point support on.
+
 @end table
 
 Note: the @code{.cpu} directive overrides the command line option
@@ -479,6 +607,12 @@ Two Operand Instruction;
 
 @item SYNTAX_3OP
 Three Operand Instruction.
+
+@item SYNTAX_1OP
+One Operand Instruction.
+
+@item SYNTAX_NOP
+No Operand Instruction.
 @end table
 
 The syntax class may be followed by @samp{|} and one of the following