Add support for ARMv8-M security extensions instructions

[deliverable/binutils-gdb.git] / gas / doc / c-arm.texi

diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi
index ee26e6dc0a11f35b23550ae52e318785257b5cfc..7e4863ea992387ace7a785f759e93379430cd336 100644 (file)
--- a/gas/doc/c-arm.texi
+++ b/gas/doc/c-arm.texi
@@ -1,4 +1,4 @@
-@c Copyright (C) 1996-2015 Free Software Foundation, Inc.
+@c Copyright (C) 1996-2016 Free Software Foundation, Inc.
 @c This is part of the GAS manual.
 @c For copying conditions, see the file as.texinfo.
 
@@ -119,6 +119,8 @@ recognized:
 @code{cortex-a8},
 @code{cortex-a9},
 @code{cortex-a15},
+@code{cortex-a17},
+@code{cortex-a32},
 @code{cortex-a35},
 @code{cortex-a53},
 @code{cortex-a57},
@@ -127,6 +129,7 @@ recognized:
 @code{cortex-r4f},
 @code{cortex-r5},
 @code{cortex-r7},
+@code{cortex-r8},
 @code{cortex-m7},
 @code{cortex-m4},
 @code{cortex-m3},
@@ -537,6 +540,22 @@ respectively.  For example to load the 32-bit address of foo into r0:
         MOVT r0, #:upper16:foo
 @end smallexample
 
+Relocations @samp{R_ARM_THM_ALU_ABS_G0_NC}, @samp{R_ARM_THM_ALU_ABS_G1_NC},
+@samp{R_ARM_THM_ALU_ABS_G2_NC} and @samp{R_ARM_THM_ALU_ABS_G3_NC} can be
+generated by prefixing the value with @samp{#:lower0_7:#},
+@samp{#:lower8_15:#}, @samp{#:upper0_7:#} and @samp{#:upper8_15:#}
+respectively.  For example to load the 32-bit address of foo into r0:
+
+@smallexample
+        MOVS r0, #:upper8_15:#foo
+        LSLS r0, r0, #8
+        ADDS r0, #:upper0_7:#foo
+        LSLS r0, r0, #8
+        ADDS r0, #:lower8_15:#foo
+        LSLS r0, r0, #8
+        ADDS r0, #:lower0_7:#foo
+@end smallexample
+
 @node ARM-Neon-Alignment
 @subsection NEON Alignment Specifiers
 
@@ -1221,3 +1240,4 @@ code that calls functions which may throw exceptions.  If you need to
 know more about the object-file format used to represent unwind
 information, you may consult the @cite{Exception Handling ABI for the
 ARM Architecture} available from @uref{http://infocenter.arm.com}.
+