Allow symbols in MEMORY region specification

[deliverable/binutils-gdb.git] / gas / doc / c-arm.texi

diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi
index 983434f166cfc7084a5a8449a6be9520ec1a4a40..825248764045b7b73742a27ec680508bfa95e0ed 100644 (file)
--- a/gas/doc/c-arm.texi
+++ b/gas/doc/c-arm.texi
@@ -1,5 +1,4 @@
-@c Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
-@c 2006, 2007, 2008, 2009, 2010, 2011  Free Software Foundation, Inc.
+@c Copyright (C) 1996-2015 Free Software Foundation, Inc.
 @c This is part of the GAS manual.
 @c For copying conditions, see the file as.texinfo.
 
@@ -122,11 +121,18 @@ recognized:
 @code{cortex-a15},
 @code{cortex-r4},
 @code{cortex-r4f},
+@code{cortex-r5},
+@code{cortex-r7},
+@code{cortex-m7},
 @code{cortex-m4},
 @code{cortex-m3},
 @code{cortex-m1},
 @code{cortex-m0},
 @code{cortex-m0plus},
+@code{marvell-pj4},
+@code{marvell-whitney},
+@code{xgene1},
+@code{xgene2},
 @code{ep9312} (ARM920 with Cirrus Maverick coprocessor),
 @code{i80200} (Intel XScale processor)
 @code{iwmmxt} (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor)
@@ -154,13 +160,16 @@ been added, again in ascending alphabetical order.  For example,
 
 
 The following extensions are currently supported:
+@code{crc}
 @code{crypto} (Cryptography Extensions for v8-A architecture, implies @code{fp+simd}),
 @code{fp} (Floating Point Extensions for v8-A architecture),
 @code{idiv} (Integer Divide Extensions for v7-A and v7-R architectures),
 @code{iwmmxt},
 @code{iwmmxt2},
+@code{xscale},
 @code{maverick},
-@code{mp} (Multiprocessing Extensions for v7-A and v7-R architectures),
+@code{mp} (Multiprocessing Extensions for v7-A and v7-R
+architectures),
 @code{os} (Operating System for v6M architecture),
 @code{sec} (Security Extensions for v6K and v7-A architectures),
 @code{simd} (Advanced SIMD Extensions for v8-A architecture, implies @code{fp}),
@@ -199,11 +208,13 @@ names are recognized:
 @code{armv6s-m},
 @code{armv7},
 @code{armv7-a},
+@code{armv7ve},
 @code{armv7-r},
 @code{armv7-m},
 @code{armv7e-m},
 @code{armv8-a},
 @code{iwmmxt}
+@code{iwmmxt2}
 and
 @code{xscale}.
 If both @code{-mcpu} and
@@ -245,6 +256,8 @@ The following format options are recognized:
 @code{vfpv4},
 @code{vfpv4-d16},
 @code{fpv4-sp-d16},
+@code{fpv5-sp-d16},
+@code{fpv5-d16},
 @code{fp-armv8},
 @code{arm1020t},
 @code{arm1020e},
@@ -367,6 +380,10 @@ the linker option of the same name.
 Enable or disable warnings about using deprecated options or
 features.  The default is to warn.
 
+@cindex @code{-mccs} command line option, ARM
+@item -mccs
+Turns on CodeComposer Studio assembly syntax compatibility mode.
+
 @end table
 
 
@@ -388,7 +405,7 @@ ARM and THUMB instructions had their own, separate syntaxes.  The new,
 @code{unified} syntax, which can be selected via the @code{.syntax}
 directive, and has the following main features:
 
-@table @bullet
+@itemize @bullet
 @item
 Immediate operands do not require a @code{#} prefix.
 
@@ -413,7 +430,7 @@ The @code{.N} and @code{.W} suffixes are recognized and honored.
 @item
 All instructions set the flags if and only if they have an @code{s}
 affix.
-@end table
+@end itemize
 
 @node ARM-Chars
 @subsection Special Characters
@@ -449,28 +466,6 @@ Either @samp{#} or @samp{$} can be used to indicate immediate operands.
 @cindex register names, ARM
 *TODO* Explain about ARM register naming, and the predefined names.
 
-@node ARM-Neon-Alignment
-@subsection NEON Alignment Specifiers
-
-@cindex alignment for NEON instructions
-Some NEON load/store instructions allow an optional address
-alignment qualifier.
-The ARM documentation specifies that this is indicated by
-@samp{@@ @var{align}}. However GAS already interprets
-the @samp{@@} character as a "line comment" start,
-so @samp{: @var{align}} is used instead.  For example:
-
-@smallexample
-        vld1.8 @{q0@}, [r0, :128]
-@end smallexample
-
-@node ARM Floating Point
-@section Floating Point
-
-@cindex floating point, ARM (@sc{ieee})
-@cindex ARM floating point (@sc{ieee})
-The ARM family uses @sc{ieee} floating-point numbers.
-
 @node ARM-Relocations
 @subsection ARM relocation generation
 
@@ -517,6 +512,28 @@ respectively.  For example to load the 32-bit address of foo into r0:
         MOVT r0, #:upper16:foo
 @end smallexample
 
+@node ARM-Neon-Alignment
+@subsection NEON Alignment Specifiers
+
+@cindex alignment for NEON instructions
+Some NEON load/store instructions allow an optional address
+alignment qualifier.
+The ARM documentation specifies that this is indicated by
+@samp{@@ @var{align}}. However GAS already interprets
+the @samp{@@} character as a "line comment" start,
+so @samp{: @var{align}} is used instead.  For example:
+
+@smallexample
+        vld1.8 @{q0@}, [r0, :128]
+@end smallexample
+
+@node ARM Floating Point
+@section Floating Point
+
+@cindex floating point, ARM (@sc{ieee})
+@cindex ARM floating point (@sc{ieee})
+The ARM family uses @sc{ieee} floating-point numbers.
+
 @node ARM Directives
 @section ARM Machine Directives
 
@@ -562,13 +579,6 @@ incrementally to the architecture being compiled for.
 @item .arm
 This performs the same action as @var{.code 32}.
 
-@anchor{arm_pad}
-@cindex @code{.pad} directive, ARM
-@item .pad #@var{count}
-Generate unwinder annotations for a stack adjustment of @var{count} bytes.
-A positive value indicates the function prologue allocated stack space by
-decrementing the stack pointer.
-
 @c BBBBBBBBBBBBBBBBBBBBBBBBBB
 
 @cindex @code{.bss} directive, ARM
@@ -768,6 +778,7 @@ This directive writes 12-byte packed floating-point values to the
 output section.  These are not compatible with current ARM processors
 or ABIs.
 
+@anchor{arm_pad}
 @cindex @code{.pad} directive, ARM
 @item .pad #@var{count}
 Generate unwinder annotations for a stack adjustment of @var{count} bytes.