-@c Copyright 2007, 2008, 2011 Free Software Foundation, Inc.
+@c Copyright (C) 2007-2019 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@section CR16 Operand Qualifiers
@cindex CR16 Operand Qualifiers
-The National Semiconductor CR16 target of @code{@value{AS}} has a few machine dependent operand qualifiers.
+The National Semiconductor CR16 target of @code{@value{AS}} has a few machine dependent operand qualifiers.
Operand expression type qualifier is an optional field in the instruction operand, to determines the type of the expression field of an operand. The @code{@@} is required. CR16 architecture uses one of the following expression qualifiers:
@table @code
-@item s
+@item s
- @code{Specifies expression operand type as small}
-@item m
+@item m
- @code{Specifies expression operand type as medium}
-@item l
+@item l
- @code{Specifies expression operand type as large}
-@item c
+@item c
- @code{Specifies the CR16 Assembler generates a relocation entry for the operand, where pc has implied bit, the expression is adjusted accordingly. The linker uses the relocation entry to update the operand address at link time.}
-@item got/GOT
+@item got/GOT
- @code{Specifies the CR16 Assembler generates a relocation entry for the operand, offset from Global Offset Table. The linker uses this relocation entry to update the operand address at link time}
-@item cgot/cGOT
+@item cgot/cGOT
- @code{Specifies the CompactRISC Assembler generates a relocation entry for the operand, where pc has implied bit, the expression is adjusted accordingly. The linker uses the relocation entry to update the operand address at link time.}
@end table
CR16 target operand qualifiers and its size (in bits):
@table @samp
-@item Immediate Operand
-- s ---- 4 bits
-@item
-- m ---- 16 bits, for movb and movw instructions.
-@item
-- m ---- 20 bits, movd instructions.
-@item
-- l ---- 32 bits
-
-@item Absolute Operand
-- s ---- Illegal specifier for this operand.
-@item
-- m ---- 20 bits, movd instructions.
-
-@item Displacement Operand
-- s ---- 8 bits
-@item
-- m ---- 16 bits
-@item
-- l ---- 24 bits
+@item Immediate Operand: s
+4 bits.
+
+@item Immediate Operand: m
+16 bits, for movb and movw instructions.
+
+@item Immediate Operand: m
+20 bits, movd instructions.
+
+@item Immediate Operand: l
+32 bits.
+
+@item Absolute Operand: s
+Illegal specifier for this operand.
+
+@item Absolute Operand: m
+20 bits, movd instructions.
+
+@item Displacement Operand: s
+8 bits.
+
+@item Displacement Operand: m
+16 bits.
+
+@item Displacement Operand: l
+24 bits.
+
@end table
For example:
2 @code{movd $_myfun@@c,(r2,r1)}
This loads the address of _myfun, shifted right by 1, into register-pair r2-r1.
-
+
3 @code{_myfun_ptr:}
@code{.long _myfun@@c}
@code{loadd _myfun_ptr, (r1,r0)}
5 @code{loadd _myfunc@@cGOT(r12), (r1,r0)}
- This loads the address of _myfun, shifted right by 1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r1-r0.
+ This loads the address of _myfun, shifted right by 1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r1-r0.
@end example
@node CR16 Syntax