@code{movdir64b},
@code{enqcmd},
@code{serialize},
+@code{tsxldtrk},
@code{avx512f},
@code{avx512cd},
@code{avx512er},
@code{avx512_vbmi2},
@code{avx512_vnni},
@code{avx512_bitalg},
+@code{avx512_vp2intersect},
@code{avx512_bf16},
@code{noavx512f},
@code{noavx512cd},
@code{noavx512_bf16},
@code{noenqcmd},
@code{noserialize},
+@code{notsxldtrk},
@code{vmx},
@code{vmfunc},
@code{smx},
slightly bigger. This option only affects the handling of branch
instructions.
+@cindex @samp{-mbig-obj} option, i386
@cindex @samp{-mbig-obj} option, x86-64
@item -mbig-obj
-On x86-64 PE/COFF target this option forces the use of big object file
+On PE/COFF target this option forces the use of big object file
format, which allows more than 32768 sections.
@cindex @samp{-momit-lock-prefix=} option, i386
@item -mlfence-before-indirect-branch=@var{register}
@itemx -mlfence-before-indirect-branch=@var{memory}
These options control whether the assembler should generate lfence
-after indirect near branch instructions.
+before indirect near branch instructions.
@option{-mlfence-before-indirect-branch=@var{all}} will generate lfence
-after indirect near branch via register and issue a warning before
+before indirect near branch via register and issue a warning before
indirect near branch via memory.
+It also implicitly sets @option{-mlfence-before-ret=@var{shl}} when
+there's no explict @option{-mlfence-before-ret=}.
@option{-mlfence-before-indirect-branch=@var{register}} will generate
-lfence after indirect near branch via register.
+lfence before indirect near branch via register.
@option{-mlfence-before-indirect-branch=@var{memory}} will issue a
warning before indirect near branch via memory.
@option{-mlfence-before-indirect-branch=@var{none}} will not generate
@cindex @samp{-mlfence-before-ret=} option, i386
@cindex @samp{-mlfence-before-ret=} option, x86-64
@item -mlfence-before-ret=@var{none}
+@item -mlfence-before-ret=@var{shl}
@item -mlfence-before-ret=@var{or}
+@item -mlfence-before-ret=@var{yes}
@itemx -mlfence-before-ret=@var{not}
These options control whether the assembler should generate lfence
before ret. @option{-mlfence-before-ret=@var{or}} will generate
generate or instruction with lfence.
-@option{-mlfence-before-ret=@var{not}} will generate not instruction
-with lfence.
-@option{-mlfence-before-ret=@var{none}} will not generate lfence,
-which is the default.
+@option{-mlfence-before-ret=@var{shl/yes}} will generate shl instruction
+with lfence. @option{-mlfence-before-ret=@var{not}} will generate not
+instruction with lfence. @option{-mlfence-before-ret=@var{none}} will not
+generate lfence, which is the default.
@cindex @samp{-mx86-used-note=} option, i386
@cindex @samp{-mx86-used-note=} option, x86-64
@item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt}
@item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
@item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
-@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd}
+@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
@item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme}
@item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}