-@c Copyright 2008, 2009, 2011
-@c Free Software Foundation, Inc.
+@c Copyright (C) 2008-2016 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@item -msmall-data-limit
This option tells the assembler that the small data limit feature of
the RX port of GCC is being used. This results in the assembler
-generating an undefined reference to a symbol called __gp for use by
-the relocations that are needed to support the small data limit
+generating an undefined reference to a symbol called @code{__gp} for
+use by the relocations that are needed to support the small data limit
feature. This option is not enabled by default as it would otherwise
pollute the symbol table.
+@cindex @samp{-mpid}
+@item -mpid
+This option tells the assembler that the position independent data of the
+RX port of GCC is being used. This results in the assembler
+generating an undefined reference to a symbol called @code{__pid_base},
+and also setting the RX_PID flag bit in the e_flags field of the ELF
+header of the object file.
+
+@cindex @samp{-mint-register}
+@item -mint-register=@var{num}
+This option tells the assembler how many registers have been reserved
+for use by interrupt handlers. This is needed in order to compute the
+correct values for the @code{%gpreg} and @code{%pidreg} meta registers.
+
+@cindex @samp{-mgcc-abi}
+@item -mgcc-abi
+This option tells the assembler that the old GCC ABI is being used by
+the assembled code. With this version of the ABI function arguments
+that are passed on the stack are aligned to a 32-bit boundary.
+
+@cindex @samp{-mrx-abi}
+@item -mrx-abi
+This option tells the assembler that the official RX ABI is being used
+by the assembled code. With this version of the ABI function
+arguments that are passed on the stack are aligned to their natural
+alignments. This option is the default.
+
+@cindex @samp{-mcpu=}
+@item -mcpu=@var{name}
+This option tells the assembler the target CPU type. Currently the
+@code{rx100}, @code{rx200}, @code{rx600}, @code{rx610} and @code{rxv2}
+are recognised as valid cpu names. Attempting to assemble an instruction
+not supported by the indicated cpu type will result in an error message
+being generated.
+
+@cindex @samp{-mno-allow-string-insns}
+@item -mno-allow-string-insns
+This option tells the assembler to mark the object file that it is
+building as one that does not use the string instructions
+@code{SMOVF}, @code{SCMPU}, @code{SMOVB}, @code{SMOVU}, @code{SUNTIL}
+@code{SWHILE} or the @code{RMPA} instruction. In addition the mark
+tells the linker to complain if an attempt is made to link the binary
+with another one that does use any of these instructions.
+
+Note - the inverse of this option, @code{-mallow-string-insns}, is
+not needed. The assembler automatically detects the use of the
+the instructions in the source code and labels the resulting
+object file appropriately. If no string instructions are detected
+then the object file is labelled as being one that can be linked with
+either string-using or string-banned object files.
@end table
@node RX-Modifiers
@cindex RX modifiers
@cindex syntax, RX
+@cindex %gp
-The assembler supports several modifiers when using symbol addresses
+The assembler supports one modifier when using symbol addresses
in RX instruction operands. The general syntax is the following:
@smallexample
-%modifier(symbol)
+%gp(symbol)
@end smallexample
+The modifier returns the offset from the @var{__gp} symbol to the
+specified symbol as a 16-bit value. The intent is that this offset
+should be used in a register+offset move instruction when generating
+references to small data. Ie, like this:
+
+@smallexample
+ mov.W %gp(_foo)[%gpreg], r1
+@end smallexample
+
+The assembler also supports two meta register names which can be used
+to refer to registers whose values may not be known to the
+programmer. These meta register names are:
+
@table @code
-@cindex symbol modifiers
-@item %gp
-@c FIXME: Add documentation here.
+@cindex @samp{%gpreg}
+@item %gpreg
+The small data address register.
+
+@cindex @samp{%pidreg}
+@item %pidreg
+The PID base address register.
@end table
+Both registers normally have the value r13, but this can change if
+some registers have been reserved for use by interrupt handlers or if
+both the small data limit and position independent data features are
+being used at the same time.
+
@node RX-Directives
@section Assembler Directives
@cindex RX assembler directive .3byte
Inserts a 3-byte value into the output file at the current location.
+@item .fetchalign
+@cindex assembler directive .fetchalign, RX
+@cindex RX assembler directive .fetchalign
+If the next opcode following this directive spans a fetch line
+boundary (8 byte boundary), the opcode is aligned to that boundary.
+If the next opcode does not span a fetch line, this directive has no
+effect. Note that one or more labels may be between this directive
+and the opcode; those labels are aligned as well. Any inserted bytes
+due to alignment will form a NOP opcode.
+
@end table
@node RX-Float
projects / deliverable / binutils-gdb.git / blobdiff