-@c Copyright 2009, 2011
-@c Free Software Foundation, Inc.
+@c Copyright (C) 2009-2015 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
The s390 version of @code{@value{AS}} supports two architectures modes
and seven chip levels. The architecture modes are the Enterprise System
Architecture (ESA) and the newer z/Architecture mode. The chip levels
-are g5, g6, z900, z990, z9-109, z9-ec, z10 and z196.
+are g5, g6, z900, z990, z9-109, z9-ec, z10, z196, zEC12, and z13.
@menu
* s390 Options:: Command-line Options.
@cindex s390 options
The following table lists all available s390 specific options:
-
+
@table @code
@cindex @samp{-m31} option, s390
@cindex @samp{-m64} option, s390
@cindex @samp{-march=} option, s390
@item -march=@var{CPU}
This option specifies the target processor. The following processor names
-are recognized:
+are recognized:
@code{g5},
@code{g6},
@code{z900},
@code{z990},
@code{z9-109},
@code{z9-ec},
-@code{z10} and
-@code{z196}.
+@code{z10},
+@code{z196},
+@code{zEC12}, and
+@code{z13}.
Assembling an instruction that is not supported on the target processor
results in an error message. Do not specify @code{g5} or @code{g6}
with @samp{-mzarch}.
@cindex instruction syntax, s390
@cindex s390 instruction syntax
-The assembler syntax closely follows the syntax outlined in
-Enterprise Systems Architecture/390 Principles of Operation (SA22-7201)
-and the z/Architecture Principles of Operation (SA22-7832).
+The assembler syntax closely follows the syntax outlined in
+Enterprise Systems Architecture/390 Principles of Operation (SA22-7201)
+and the z/Architecture Principles of Operation (SA22-7832).
Each instruction has two major parts, the instruction mnemonic
and the instruction operands. The instruction format varies.
The Principles of Operation manuals lists 26 instruction formats where
some of the formats have multiple variants. For the @samp{.insn}
-pseudo directive the assembler recognizes some of the formats.
+pseudo directive the assembler recognizes some of the formats.
Typically, the most general variant of the instruction format is used
by the @samp{.insn} directive.
+--------+----+----+
| OpCode | R1 | R2 |
+--------+----+----+
-0 8 12 15
+0 8 12 15
@end verbatim
@item RRE format: <insn> R1,R2
symbol.
@item @@gotoff
The @@gotoff modifier can be used for 16-bit immediate fields. The symbol
-term is replaced with the offset from the start of the GOT to the
+term is replaced with the offset from the start of the GOT to the
address of the symbol.
@item @@gotplt
The @@gotplt modifier can be used for displacement fields, 16-bit immediate
The @@gotntpoff modifier can be used for displacement fields. The symbol
is added to the static TLS block and the negated offset to the symbol
in the static TLS block is added to the GOT. The symbol term is replaced
-with the offset to the GOT slot from the start of the GOT.
+with the offset to the GOT slot from the start of the GOT.
@item @@indntpoff
The @@indntpoff modifier can be used for 32-bit pc-relative immediate
fields. The symbol is added to the static TLS block and the negated offset
@item :tls_load
The :tls_load marker is used to flag the load instruction in the initial
exec TLS model that retrieves the offset from the thread pointer to a
-thread local storage variable from the GOT.
+thread local storage variable from the GOT.
@item :tls_gdcall
The :tls_gdcall marker is used to flag the branch-and-save instruction to
the __tls_get_offset function in the global dynamic TLS model.
@node s390 Directives
@section Assembler Directives
-@code{@value{AS}} for s390 supports all of the standard ELF
+@code{@value{AS}} for s390 supports all of the standard ELF
assembler directives as outlined in the main part of this document.
Some directives have been extended and there are some additional
directives, which are only available for the s390 @code{@value{AS}}.
@itemx .quad
This directive places one or more 16-bit (.short), 32-bit (.long), or
64-bit (.quad) values into the current section. If an ELF or TLS modifier
-is used only the following expressions are allowed:
+is used only the following expressions are allowed:
@samp{symbol@@modifier + constant},
@samp{symbol@@modifier + label + constant}, and
@samp{symbol@@modifier - label + constant}.
@item .ltorg
This directive causes the current contents of the literal pool to be
dumped to the current location (@ref{s390 Literal Pool Entries}).
+
+@cindex @code{.machine} directive, s390
+@item .machine string
+This directive allows you to change the machine for which code is
+generated. @code{string} may be any of the @code{-march=} selection
+options (without the -march=), @code{push}, or @code{pop}.
+@code{.machine push} saves the currently selected cpu, which may be
+restored with @code{.machine pop}. Be aware that the cpu string has
+to be put into double quotes in case it contains characters not
+appropriate for identifiers. So you have to write @code{"z9-109"}
+instead of just @code{z9-109}.
+
+@cindex @code{.machinemode} directive, s390
+@item .machinemode string
+This directive allows to change the architecture mode for which code
+is being generated. @code{string} may be @code{esa}, @code{zarch},
+@code{zarch_nohighgprs}, @code{push}, or @code{pop}.
+@code{.machinemode zarch_nohighgprs} can be used to prevent the
+@code{highgprs} flag from being set in the ELF header of the output
+file. This is useful in situations where the code is gated with a
+runtime check which makes sure that the code is only executed on
+kernels providing the @code{highgprs} feature.
+@code{.machinemode push} saves the currently selected mode, which may
+be restored with @code{.machinemode pop}.
@end table
@node s390 Floating Point
projects / deliverable / binutils-gdb.git / blobdiff