-@c Copyright 1997, 2002, 2003 Free Software Foundation, Inc.
+@c Copyright (C) 1997-2015 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
architecture, together with support routines only used by the V850E
architecture.
+@cindex @code{-mv850e2} command line option, V850
+@item -mv850e2
+Specifies that the assembled code should be marked as being targeted at
+the V850E2 processor. This allows the linker to detect attempts to link
+such code with code assembled for other processors.
+
+@cindex @code{-mv850e2v3} command line option, V850
+@item -mv850e2v3
+Specifies that the assembled code should be marked as being targeted at
+the V850E2V3 processor. This allows the linker to detect attempts to link
+such code with code assembled for other processors.
+
+@cindex @code{-mv850e2v4} command line option, V850
+@item -mv850e2v4
+This is an alias for @option{-mv850e3v5}.
+
+@cindex @code{-mv850e3v5} command line option, V850
+@item -mv850e3v5
+Specifies that the assembled code should be marked as being targeted at
+the V850E3V5 processor. This allows the linker to detect attempts to link
+such code with code assembled for other processors.
+
@cindex @code{-mrelax} command line option, V850
@item -mrelax
Enables relaxation. This allows the .longcall and .longjump pseudo
assembler will then flag these sections of code and the linker will
attempt to relax them.
-@end table
+@cindex @code{-mgcc-abi} command line option, V850
+@item -mgcc-abi
+Marks the generated objecy file as supporting the old GCC ABI.
+
+@cindex @code{-mrh850-abi} command line option, V850
+@item -mrh850-abi
+Marks the generated objecy file as supporting the RH850 ABI. This is
+the default.
+@cindex @code{-m8byte-align} command line option, V850
+@item -m8byte-align
+Marks the generated objecy file as supporting a maximum 64-bits of
+alignment for variables defined in the source code.
+
+@cindex @code{-m4byte-align} command line option, V850
+@item -m4byte-align
+Marks the generated objecy file as supporting a maximum 32-bits of
+alignment for variables defined in the source code. This is the
+default.
+
+@end table
@node V850 Syntax
@section Syntax
@cindex line comment character, V850
@cindex V850 line comment character
-@samp{#} is the line comment character.
+@samp{#} is the line comment character. If a @samp{#} appears as the
+first character of a line, the whole line is treated as a comment, but
+in this case the line can also be a logical line number directive
+(@pxref{Comments}) or a preprocessor control command
+(@pxref{Preprocessing}).
+
+Two dashes (@samp{--}) can also be used to start a line comment.
+
+@cindex line separator, V850
+@cindex statement separator, V850
+@cindex V850 line separator
+
+The @samp{;} character can be used to separate statements on the same
+line.
+
@node V850-Regs
@subsection Register Names
@table @code
@cindex @code{offset} directive, V850
@item .offset @var{<expression>}
-Moves the offset into the current section to the specified amount.
+Moves the offset into the current section to the specified amount.
@cindex @code{section} directive, V850
@item .section "name", <type>
This is an extension to the standard .section directive. It sets the
current section to be <type> and creates an alias for this section
-called "name".
+called "name".
@cindex @code{.v850} directive, V850
@item .v850
the V850E1 processor. This allows the linker to detect attempts to link
such code with code assembled for other processors.
+@cindex @code{.v850e2} directive, V850
+@item .v850e2
+Specifies that the assembled code should be marked as being targeted at
+the V850E2 processor. This allows the linker to detect attempts to link
+such code with code assembled for other processors.
+
+@cindex @code{.v850e2v3} directive, V850
+@item .v850e2v3
+Specifies that the assembled code should be marked as being targeted at
+the V850E2V3 processor. This allows the linker to detect attempts to link
+such code with code assembled for other processors.
+
+@cindex @code{.v850e2v4} directive, V850
+@item .v850e2v4
+Specifies that the assembled code should be marked as being targeted at
+the V850E3V5 processor. This allows the linker to detect attempts to link
+such code with code assembled for other processors.
+
+@cindex @code{.v850e3v5} directive, V850
+@item .v850e3v5
+Specifies that the assembled code should be marked as being targeted at
+the V850E3V5 processor. This allows the linker to detect attempts to link
+such code with code assembled for other processors.
+
@end table
@node V850 Opcodes
computes the difference between the address of labels 'here' and
'there', takes the upper 16 bits of this difference, shifts it down 16
bits and then multiplies it by the lower 16 bits in register 5, putting
-the result into register 6.
+the result into register 6.
@cindex @code{lo} pseudo-op, V850
@item lo()
@samp{mov hilo(here), r6}
computes the absolute address of label 'here' and puts the result into
-register 6.
+register 6.
@cindex @code{sdaoff} pseudo-op, V850
@item sdaoff()
Computes the offset of the named variable from the start of the Small
Data Area (whoes address is held in register 4, the GP register) and
stores the result as a 16 bit signed value in the immediate operand
-field of the given instruction. For example:
+field of the given instruction. For example:
@samp{ld.w sdaoff(_a_variable)[gp],r6}
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