Regenerate some files for recent ARM patches

[deliverable/binutils-gdb.git] / gas / doc / internals.texi

diff --git a/gas/doc/internals.texi b/gas/doc/internals.texi
index 7649ce536fe34b9f067ded57495a75afd2c509aa..93352ecf7f1d69bf559bc3213e3099157c360a95 100644 (file)
--- a/gas/doc/internals.texi
+++ b/gas/doc/internals.texi
@@ -1,5 +1,5 @@
 \input texinfo
-@c  Copyright (C) 1991-2015 Free Software Foundation, Inc.
+@c  Copyright (C) 1991-2018 Free Software Foundation, Inc.
 @setfilename internals.info
 @node Top
 @top Assembler Internals
@@ -151,10 +151,6 @@ Set the name of the symbol.
 @cindex S_IS_EXTERNAL
 Return non-zero if the symbol is externally visible.
 
-@item S_IS_EXTERN
-@cindex S_IS_EXTERN
-A synonym for @code{S_IS_EXTERNAL}.  Don't use it.
-
 @item S_IS_WEAK
 @cindex S_IS_WEAK
 Return non-zero if the symbol is weak, or if it is a @code{weakref} alias or
@@ -1100,11 +1096,6 @@ You may define this macro to parse an expression used in a data allocation
 pseudo-op such as @code{.word}.  You can use this to recognize relocation
 directives that may appear in such directives.
 
-@item BITFIELD_CONS_EXPRESSION
-@cindex BITFIELD_CONS_EXPRESSION
-If you define this macro, GAS will recognize bitfield instructions in data
-allocation pseudo-ops, as used on the i960.
-
 @item REPEAT_CONS_EXPRESSION
 @cindex REPEAT_CONS_EXPRESSION
 If you define this macro, GAS will recognize repeat counts in data allocation
@@ -1757,12 +1748,6 @@ no-op instructions, it must be able to expand or shrink the section contents
 while still preserving intra-section references and meeting alignment
 requirements.
 
-For the i960 using b.out format, no expansion is done; instead, each
-@samp{.align} directive causes extra space to be allocated, enough that when
-the linker is relaxing a section and removing unneeded space, it can discard
-some or all of this extra padding and cause the following data to be correctly
-aligned.
-
 For the H8/300, I think the linker expands calls that can't reach, and doesn't
 worry about alignment issues; the cpu probably never needs any significant
 alignment beyond the instruction size.