x86/Intel: accept memory operand size specifiers for CET insns

[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-cet.d

diff --git a/gas/testsuite/gas/i386/x86-64-cet.d b/gas/testsuite/gas/i386/x86-64-cet.d
index af298274a1415863c9a739fd6a500d0fa71190d6..27749662aa0cc7513440d15653a81bc80b40711f 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-cet.d
+++ b/gas/testsuite/gas/i386/x86-64-cet.d
@@ -27,9 +27,13 @@ Disassembly of section .text:
  +[a-f0-9]+:   f3 0f 01 ea             saveprevssp 
  +[a-f0-9]+:   f3 41 0f 01 2c 24       rstorssp \(%r12\)
  +[a-f0-9]+:   41 0f 38 f6 04 24       wrssd  %eax,\(%r12\)
+ +[a-f0-9]+:   44 0f 38 f6 20          wrssd  %r12d,\(%rax\)
  +[a-f0-9]+:   4a 0f 38 f6 14 39       wrssq  %rdx,\(%rcx,%r15,1\)
+ +[a-f0-9]+:   4a 0f 38 f6 0c 3a       wrssq  %rcx,\(%rdx,%r15,1\)
  +[a-f0-9]+:   66 41 0f 38 f5 04 24    wrussd %eax,\(%r12\)
+ +[a-f0-9]+:   66 44 0f 38 f5 20       wrussd %r12d,\(%rax\)
  +[a-f0-9]+:   66 48 0f 38 f5 0c 03    wrussq %rcx,\(%rbx,%rax,1\)
+ +[a-f0-9]+:   66 48 0f 38 f5 1c 01    wrussq %rbx,\(%rcx,%rax,1\)
  +[a-f0-9]+:   f3 0f 01 e8             setssbsy 
  +[a-f0-9]+:   f3 42 0f ae 34 26       clrssbsy \(%rsi,%r12,1\)
  +[a-f0-9]+:   f3 0f 1e fa             endbr64