0: 60 00 00 00 nop
4: 60 00 00 00 nop
8: 60 00 00 00 nop
- c: 48 00 00 04 b 10 <foo\+0x10>
- 10: 48 00 00 08 b 18 <foo\+0x18>
- 14: 48 00 00 00 b 14 <foo\+0x14>
+ c: 48 00 00 04 b 10 <foo\+0x10>
+ 10: 48 00 00 08 b 18 <foo\+0x18>
+ 14: 48 00 00 00 b 14 <foo\+0x14>
14: R_PPC64_REL24 x
- 18: 48 00 00 04 b 1c <foo\+0x1c>
+ 18: 48 00 00 04 b 1c <foo\+0x1c>
18: R_PPC64_REL24 \.data\+0x4
- 1c: 48 00 00 00 b 1c <foo\+0x1c>
+ 1c: 48 00 00 00 b 1c <foo\+0x1c>
1c: R_PPC64_REL24 z
- 20: 48 00 00 14 b 34 <foo\+0x34>
+ 20: 48 00 00 14 b 34 <foo\+0x34>
20: R_PPC64_REL24 z\+0x14
- 24: 48 00 00 04 b 28 <foo\+0x28>
- 28: 48 00 00 00 b 28 <foo\+0x28>
+ 24: 48 00 00 04 b 28 <foo\+0x28>
+ 28: 48 00 00 00 b 28 <foo\+0x28>
28: R_PPC64_REL24 a
- 2c: 48 00 00 48 b 74 <apfour>
- 30: 48 00 00 04 b 34 <foo\+0x34>
+ 2c: 48 00 00 48 b 74 <apfour>
+ 30: 48 00 00 04 b 34 <foo\+0x34>
30: R_PPC64_REL24 a\+0x4
- 34: 48 00 00 44 b 78 <apfour\+0x4>
+ 34: 48 00 00 44 b 78 <apfour\+0x4>
38: 00 00 00 38 \.long 0x38
38: R_PPC64_ADDR32 \.text\+0x38
3c: 00 00 00 44 \.long 0x44
50: R_PPC64_ADDR32 x
54: R_PPC64_ADDR32 y
58: R_PPC64_ADDR32 z
- 5c: ff ff ff fc fnmsub f31,f31,f31,f31
+ 5c: ff ff ff fc fnmsub f31,f31,f31,f31
5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc
- 60: ff ff ff fc fnmsub f31,f31,f31,f31
+ 60: ff ff ff fc fnmsub f31,f31,f31,f31
60: R_PPC64_ADDR32 y\+0xfffffffffffffffc
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
+ 64: ff ff ff fc fnmsub f31,f31,f31,f31
64: R_PPC64_ADDR32 z\+0xfffffffffffffffc
68: 00 00 00 08 \.long 0x8
6c: 00 00 00 08 \.long 0x8
\.\.\.
74: R_PPC64_ADDR32 b
78: R_PPC64_ADDR32 apfour
- 7c: ff ff ff fc fnmsub f31,f31,f31,f31
+ 7c: ff ff ff fc fnmsub f31,f31,f31,f31
80: 00 00 00 02 \.long 0x2
80: R_PPC64_ADDR32 apfour\+0x2
84: 00 00 00 00 \.long 0x0