Use std::unique_ptr in reg_buffer

[deliverable/binutils-gdb.git] / gdb / aarch64-linux-nat.c

diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c
index 63ef4d1cf8da9a7ca80e4fe7b67ac926051be507..1e4f937dc9162bcb5528f570a441c6663899b8b9 100644 (file)
--- a/gdb/aarch64-linux-nat.c
+++ b/gdb/aarch64-linux-nat.c
@@ -32,6 +32,7 @@
 #include "aarch32-linux-nat.h"
 #include "nat/aarch64-linux.h"
 #include "nat/aarch64-linux-hw-point.h"
+#include "nat/aarch64-sve-linux-ptrace.h"
 
 #include "elf/external.h"
 #include "elf/common.h"
@@ -208,7 +209,7 @@ fetch_gregs_from_thread (struct regcache *regcache)
      and arm.  */
   gdb_static_assert (sizeof (regs) >= 18 * 4);
 
-  tid = ptid_get_lwp (regcache_get_ptid (regcache));
+  tid = ptid_get_lwp (regcache->ptid ());
 
   iovec.iov_base = &regs;
   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
@@ -227,7 +228,7 @@ fetch_gregs_from_thread (struct regcache *regcache)
       int regno;
 
       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
-       regcache_raw_supply (regcache, regno, &regs[regno - AARCH64_X0_REGNUM]);
+       regcache->raw_supply (regno, &regs[regno - AARCH64_X0_REGNUM]);
     }
 }
 
@@ -245,7 +246,7 @@ store_gregs_to_thread (const struct regcache *regcache)
   /* Make sure REGS can hold all registers contents on both aarch64
      and arm.  */
   gdb_static_assert (sizeof (regs) >= 18 * 4);
-  tid = ptid_get_lwp (regcache_get_ptid (regcache));
+  tid = ptid_get_lwp (regcache->ptid ());
 
   iovec.iov_base = &regs;
   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
@@ -264,9 +265,8 @@ store_gregs_to_thread (const struct regcache *regcache)
       int regno;
 
       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
-       if (REG_VALID == regcache_register_status (regcache, regno))
-         regcache_raw_collect (regcache, regno,
-                               &regs[regno - AARCH64_X0_REGNUM]);
+       if (REG_VALID == regcache->get_register_status (regno))
+         regcache->raw_collect (regno, &regs[regno - AARCH64_X0_REGNUM]);
     }
 
   ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
@@ -289,7 +289,7 @@ fetch_fpregs_from_thread (struct regcache *regcache)
      and arm.  */
   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 
-  tid = ptid_get_lwp (regcache_get_ptid (regcache));
+  tid = ptid_get_lwp (regcache->ptid ());
 
   iovec.iov_base = &regs;
 
@@ -314,11 +314,10 @@ fetch_fpregs_from_thread (struct regcache *regcache)
        perror_with_name (_("Unable to fetch vFP/SIMD registers."));
 
       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
-       regcache_raw_supply (regcache, regno,
-                            &regs.vregs[regno - AARCH64_V0_REGNUM]);
+       regcache->raw_supply (regno, &regs.vregs[regno - AARCH64_V0_REGNUM]);
 
-      regcache_raw_supply (regcache, AARCH64_FPSR_REGNUM, &regs.fpsr);
-      regcache_raw_supply (regcache, AARCH64_FPCR_REGNUM, &regs.fpcr);
+      regcache->raw_supply (AARCH64_FPSR_REGNUM, &regs.fpsr);
+      regcache->raw_supply (AARCH64_FPCR_REGNUM, &regs.fpcr);
     }
 }
 
@@ -336,7 +335,7 @@ store_fpregs_to_thread (const struct regcache *regcache)
   /* Make sure REGS can hold all VFP registers contents on both aarch64
      and arm.  */
   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
-  tid = ptid_get_lwp (regcache_get_ptid (regcache));
+  tid = ptid_get_lwp (regcache->ptid ());
 
   iovec.iov_base = &regs;
 
@@ -361,16 +360,14 @@ store_fpregs_to_thread (const struct regcache *regcache)
        perror_with_name (_("Unable to fetch FP/SIMD registers."));
 
       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
-       if (REG_VALID == regcache_register_status (regcache, regno))
-         regcache_raw_collect (regcache, regno,
-                               (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
-
-      if (REG_VALID == regcache_register_status (regcache, AARCH64_FPSR_REGNUM))
-       regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM,
-                             (char *) &regs.fpsr);
-      if (REG_VALID == regcache_register_status (regcache, AARCH64_FPCR_REGNUM))
-       regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM,
-                             (char *) &regs.fpcr);
+       if (REG_VALID == regcache->get_register_status (regno))
+         regcache->raw_collect
+           (regno, (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
+
+      if (REG_VALID == regcache->get_register_status (AARCH64_FPSR_REGNUM))
+       regcache->raw_collect (AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
+      if (REG_VALID == regcache->get_register_status (AARCH64_FPCR_REGNUM))
+       regcache->raw_collect (AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
     }
 
   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
@@ -541,7 +538,7 @@ aarch64_linux_nat_target::read_description ()
   if (ret == 0)
     return tdesc_arm_with_neon;
   else
-    return aarch64_read_description ();
+    return aarch64_read_description (aarch64_sve_get_vq (tid));
 }
 
 /* Convert a native/host siginfo object, into/from the siginfo in the
@@ -769,16 +766,38 @@ aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
   state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
   for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
     {
+      const unsigned int offset
+       = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
       const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
       const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
-      const CORE_ADDR addr_watch = state->dr_addr_wp[i];
+      const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
+      const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
+      const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
 
       if (state->dr_ref_count_wp[i]
          && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
-         && addr_trap >= addr_watch
+         && addr_trap >= addr_watch_aligned
          && addr_trap < addr_watch + len)
        {
-         *addr_p = addr_trap;
+         /* ADDR_TRAP reports the first address of the memory range
+            accessed by the CPU, regardless of what was the memory
+            range watched.  Thus, a large CPU access that straddles
+            the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
+            ADDR_TRAP that is lower than the
+            ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
+
+            addr: |   4   |   5   |   6   |   7   |   8   |
+                                  |---- range watched ----|
+                  |----------- range accessed ------------|
+
+            In this case, ADDR_TRAP will be 4.
+
+            To match a watchpoint known to GDB core, we must never
+            report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
+            range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
+            positive on kernels older than 4.10.  See PR
+            external/20207.  */
+         *addr_p = addr_orig;
          return true;
        }
     }
@@ -837,11 +856,9 @@ triggers a breakpoint or watchpoint."),
 void
 _initialize_aarch64_linux_nat (void)
 {
-  struct target_ops *t = &the_aarch64_linux_nat_target;
-
   add_show_debug_regs_command ();
 
   /* Register the target.  */
   linux_target = &the_aarch64_linux_nat_target;
-  add_target (t);
+  add_inf_child_target (&the_aarch64_linux_nat_target);
 }