and arm. */
gdb_static_assert (sizeof (regs) >= 18 * 4);
- tid = ptid_get_lwp (inferior_ptid);
+ tid = ptid_get_lwp (regcache_get_ptid (regcache));
iovec.iov_base = ®s;
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
/* Make sure REGS can hold all registers contents on both aarch64
and arm. */
gdb_static_assert (sizeof (regs) >= 18 * 4);
- tid = ptid_get_lwp (inferior_ptid);
+ tid = ptid_get_lwp (regcache_get_ptid (regcache));
iovec.iov_base = ®s;
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
and arm. */
gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
- tid = ptid_get_lwp (inferior_ptid);
+ tid = ptid_get_lwp (regcache_get_ptid (regcache));
iovec.iov_base = ®s;
/* Make sure REGS can hold all VFP registers contents on both aarch64
and arm. */
gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
- tid = ptid_get_lwp (inferior_ptid);
+ tid = ptid_get_lwp (regcache_get_ptid (regcache));
iovec.iov_base = ®s;