struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
struct dwarf2_frame_state_reg *ra_state;
- if (tdep->has_pauth () && op == DW_CFA_AARCH64_negate_ra_state)
+ if (op == DW_CFA_AARCH64_negate_ra_state)
{
+ /* On systems without pauth, treat as a nop. */
+ if (!tdep->has_pauth ())
+ return true;
+
/* Allocate RA_STATE column if it's not allocated yet. */
fs->regs.alloc_regs (AARCH64_DWARF_PAUTH_RA_STATE + 1);
t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnh",
TYPE_CODE_UNION);
+ elem = builtin_type (gdbarch)->builtin_half;
+ append_composite_type_field (t, "f", elem);
+
elem = builtin_type (gdbarch)->builtin_uint16;
append_composite_type_field (t, "u", elem);
sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnh",
TYPE_CODE_UNION);
+ append_composite_type_field (sub, "f",
+ init_vector_type (bt->builtin_half, 8));
append_composite_type_field (sub, "u",
init_vector_type (bt->builtin_uint16, 8));
append_composite_type_field (sub, "s",
/* The address where the instruction will be executed at. */
CORE_ADDR new_addr;
/* Buffer of instructions to be copied to NEW_ADDR to execute. */
- uint32_t insn_buf[DISPLACED_MODIFIED_INSNS];
+ uint32_t insn_buf[AARCH64_DISPLACED_MODIFIED_INSNS];
/* Number of instructions in INSN_BUF. */
unsigned insn_count;
/* Registers when doing displaced stepping. */
dsd.insn_count = 0;
aarch64_relocate_instruction (insn, &visitor,
(struct aarch64_insn_data *) &dsd);
- gdb_assert (dsd.insn_count <= DISPLACED_MODIFIED_INSNS);
+ gdb_assert (dsd.insn_count <= AARCH64_DISPLACED_MODIFIED_INSNS);
if (dsd.insn_count != 0)
{
selftests::aarch64_analyze_prologue_test);
selftests::register_test ("aarch64-process-record",
selftests::aarch64_process_record_test);
- selftests::record_xml_tdesc ("aarch64.xml",
- aarch64_create_target_description (0, false));
#endif
}