/* Common target dependent code for GDB on AArch64 systems.
- Copyright (C) 2009-2017 Free Software Foundation, Inc.
+ Copyright (C) 2009-2018 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GDB.
#include "record.h"
#include "record-full.h"
-
-#include "features/aarch64.c"
-
#include "arch/aarch64-insn.h"
#include "opcode/aarch64.h"
{
public:
ULONGEST read (CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
+ override
{
return read_code_unsigned_integer (memaddr, len, byte_order);
}
insn = reader.read (start, 4, byte_order_for_code);
- if (aarch64_decode_insn (insn, &inst, 1) != 0)
+ if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
break;
if (inst.opcode->iclass == addsub_imm
{}
ULONGEST read (CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
+ override
{
SELF_CHECK (len == 4);
SELF_CHECK (memaddr % 4 == 0);
/* PCS C.1, the argument is allocated to the least significant
bits of V register. */
memcpy (reg, buf, len);
- regcache_cooked_write (regcache, regnum, reg);
+ regcache->cooked_write (regnum, reg);
if (aarch64_debug)
{
aarch64_extract_return_value (struct type *type, struct regcache *regs,
gdb_byte *valbuf)
{
- struct gdbarch *gdbarch = get_regcache_arch (regs);
+ struct gdbarch *gdbarch = regs->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
if (TYPE_CODE (type) == TYPE_CODE_FLT)
bfd_byte buf[V_REGISTER_SIZE];
int len = TYPE_LENGTH (type);
- regcache_cooked_read (regs, AARCH64_V0_REGNUM, buf);
+ regs->cooked_read (AARCH64_V0_REGNUM, buf);
memcpy (valbuf, buf, len);
}
else if (TYPE_CODE (type) == TYPE_CODE_INT
struct type *target_type = check_typedef (TYPE_TARGET_TYPE (type));
int len = TYPE_LENGTH (target_type);
- regcache_cooked_read (regs, regno, buf);
+ regs->cooked_read (regno, buf);
memcpy (valbuf, buf, len);
valbuf += len;
- regcache_cooked_read (regs, regno + 1, buf);
+ regs->cooked_read (regno + 1, buf);
memcpy (valbuf, buf, len);
valbuf += len;
}
i + 1,
gdbarch_register_name (gdbarch, regno));
}
- regcache_cooked_read (regs, regno, buf);
+ regs->cooked_read (regno, buf);
memcpy (valbuf, buf, len);
valbuf += len;
/* Short vector is returned in V register. */
gdb_byte buf[V_REGISTER_SIZE];
- regcache_cooked_read (regs, AARCH64_V0_REGNUM, buf);
+ regs->cooked_read (AARCH64_V0_REGNUM, buf);
memcpy (valbuf, buf, TYPE_LENGTH (type));
}
else
while (len > 0)
{
- regcache_cooked_read (regs, regno++, buf);
+ regs->cooked_read (regno++, buf);
memcpy (valbuf, buf, len > X_REGISTER_SIZE ? X_REGISTER_SIZE : len);
len -= X_REGISTER_SIZE;
valbuf += X_REGISTER_SIZE;
aarch64_store_return_value (struct type *type, struct regcache *regs,
const gdb_byte *valbuf)
{
- struct gdbarch *gdbarch = get_regcache_arch (regs);
+ struct gdbarch *gdbarch = regs->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
if (TYPE_CODE (type) == TYPE_CODE_FLT)
int len = TYPE_LENGTH (type);
memcpy (buf, valbuf, len > V_REGISTER_SIZE ? V_REGISTER_SIZE : len);
- regcache_cooked_write (regs, AARCH64_V0_REGNUM, buf);
+ regs->cooked_write (AARCH64_V0_REGNUM, buf);
}
else if (TYPE_CODE (type) == TYPE_CODE_INT
|| TYPE_CODE (type) == TYPE_CODE_CHAR
LONGEST val = unpack_long (type, valbuf);
store_signed_integer (tmpbuf, X_REGISTER_SIZE, byte_order, val);
- regcache_cooked_write (regs, AARCH64_X0_REGNUM, tmpbuf);
+ regs->cooked_write (AARCH64_X0_REGNUM, tmpbuf);
}
else
{
while (len > 0)
{
- regcache_cooked_write (regs, regno++, valbuf);
+ regs->cooked_write (regno++, valbuf);
len -= X_REGISTER_SIZE;
valbuf += X_REGISTER_SIZE;
}
}
memcpy (tmpbuf, valbuf, len);
- regcache_cooked_write (regs, regno, tmpbuf);
+ regs->cooked_write (regno, tmpbuf);
valbuf += len;
}
}
gdb_byte buf[V_REGISTER_SIZE];
memcpy (buf, valbuf, TYPE_LENGTH (type));
- regcache_cooked_write (regs, AARCH64_V0_REGNUM, buf);
+ regs->cooked_write (AARCH64_V0_REGNUM, buf);
}
else
{
{
memcpy (tmpbuf, valbuf,
len > X_REGISTER_SIZE ? X_REGISTER_SIZE : len);
- regcache_cooked_write (regs, regno++, tmpbuf);
+ regs->cooked_write (regno++, tmpbuf);
len -= X_REGISTER_SIZE;
valbuf += X_REGISTER_SIZE;
}
static struct value *
aarch64_pseudo_read_value (struct gdbarch *gdbarch,
- struct regcache *regcache,
+ readable_regcache *regcache,
int regnum)
{
gdb_byte reg_buf[V_REGISTER_SIZE];
unsigned v_regnum;
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_Q0_REGNUM;
- status = regcache_raw_read (regcache, v_regnum, reg_buf);
+ status = regcache->raw_read (v_regnum, reg_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
unsigned v_regnum;
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_D0_REGNUM;
- status = regcache_raw_read (regcache, v_regnum, reg_buf);
+ status = regcache->raw_read (v_regnum, reg_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
unsigned v_regnum;
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_S0_REGNUM;
- status = regcache_raw_read (regcache, v_regnum, reg_buf);
+ status = regcache->raw_read (v_regnum, reg_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
unsigned v_regnum;
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_H0_REGNUM;
- status = regcache_raw_read (regcache, v_regnum, reg_buf);
+ status = regcache->raw_read (v_regnum, reg_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
unsigned v_regnum;
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_B0_REGNUM;
- status = regcache_raw_read (regcache, v_regnum, reg_buf);
+ status = regcache->raw_read (v_regnum, reg_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_Q0_REGNUM;
memcpy (reg_buf, buf, Q_REGISTER_SIZE);
- regcache_raw_write (regcache, v_regnum, reg_buf);
+ regcache->raw_write (v_regnum, reg_buf);
return;
}
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_D0_REGNUM;
memcpy (reg_buf, buf, D_REGISTER_SIZE);
- regcache_raw_write (regcache, v_regnum, reg_buf);
+ regcache->raw_write (v_regnum, reg_buf);
return;
}
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_S0_REGNUM;
memcpy (reg_buf, buf, S_REGISTER_SIZE);
- regcache_raw_write (regcache, v_regnum, reg_buf);
+ regcache->raw_write (v_regnum, reg_buf);
return;
}
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_H0_REGNUM;
memcpy (reg_buf, buf, H_REGISTER_SIZE);
- regcache_raw_write (regcache, v_regnum, reg_buf);
+ regcache->raw_write (v_regnum, reg_buf);
return;
}
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_B0_REGNUM;
memcpy (reg_buf, buf, B_REGISTER_SIZE);
- regcache_raw_write (regcache, v_regnum, reg_buf);
+ regcache->raw_write (v_regnum, reg_buf);
return;
}
static std::vector<CORE_ADDR>
aarch64_software_single_step (struct regcache *regcache)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
const int insn_size = 4;
const int atomic_sequence_length = 16; /* Instruction sequence length. */
int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */
aarch64_inst inst;
- if (aarch64_decode_insn (insn, &inst, 1) != 0)
+ if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
return {};
/* Look for a Load Exclusive instruction which begins the sequence. */
insn = read_memory_unsigned_integer (loc, insn_size,
byte_order_for_code);
- if (aarch64_decode_insn (insn, &inst, 1) != 0)
+ if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
return {};
/* Check if the instruction is a conditional branch. */
if (inst.opcode->iclass == condbranch)
struct aarch64_displaced_step_data dsd;
aarch64_inst inst;
- if (aarch64_decode_insn (insn, &inst, 1) != 0)
+ if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
return NULL;
/* Look for a Load Exclusive instruction which begins the sequence. */
return 1;
}
+/* Get the correct target description. */
+
+const target_desc *
+aarch64_read_description ()
+{
+ static target_desc *aarch64_tdesc = NULL;
+ target_desc **tdesc = &aarch64_tdesc;
+
+ if (*tdesc == NULL)
+ *tdesc = aarch64_create_target_description ();
+
+ return *tdesc;
+}
+
/* Initialize the current architecture based on INFO. If possible,
re-use an architecture from ARCHES, which is a list of
architectures already created during this debugging session.
/* Ensure we always have a target descriptor. */
if (!tdesc_has_registers (tdesc))
- tdesc = tdesc_aarch64;
+ tdesc = aarch64_read_description ();
gdb_assert (tdesc);
gdbarch_register (bfd_arch_aarch64, aarch64_gdbarch_init,
aarch64_dump_tdep);
- initialize_tdesc_aarch64 ();
-
/* Debug this file's internals. */
add_setshow_boolean_cmd ("aarch64", class_maintenance, &aarch64_debug, _("\
Set AArch64 debugging."), _("\
selftests::aarch64_analyze_prologue_test);
selftests::register_test ("aarch64-process-record",
selftests::aarch64_process_record_test);
+ selftests::record_xml_tdesc ("aarch64.xml",
+ aarch64_create_target_description ());
#endif
}