/* Target-dependent code for AMD64.
- Copyright (C) 2001-2017 Free Software Foundation, Inc.
+ Copyright (C) 2001-2018 Free Software Foundation, Inc.
Contributed by Jiri Smid, SuSE Labs.
#include "ax.h"
#include "ax-gdb.h"
#include "common/byte-vector.h"
+#include "osabi.h"
+#include "x86-tdep.h"
/* Note that the AMD64 architecture was previously known as x86-64.
The latter is (forever) engraved into the canonical system name as
static struct value *
amd64_pseudo_register_read_value (struct gdbarch *gdbarch,
- struct regcache *regcache,
+ readable_regcache *regcache,
int regnum)
{
gdb_byte *raw_buf = (gdb_byte *) alloca (register_size (gdbarch, regnum));
if (gpnum >= AMD64_NUM_LOWER_BYTE_REGS)
{
/* Special handling for AH, BH, CH, DH. */
- status = regcache_raw_read (regcache,
- gpnum - AMD64_NUM_LOWER_BYTE_REGS,
- raw_buf);
+ status = regcache->raw_read (gpnum - AMD64_NUM_LOWER_BYTE_REGS,
+ raw_buf);
if (status == REG_VALID)
memcpy (buf, raw_buf + 1, 1);
else
}
else
{
- status = regcache_raw_read (regcache, gpnum, raw_buf);
+ status = regcache->raw_read (gpnum, raw_buf);
if (status == REG_VALID)
memcpy (buf, raw_buf, 1);
else
{
int gpnum = regnum - tdep->eax_regnum;
/* Extract (always little endian). */
- status = regcache_raw_read (regcache, gpnum, raw_buf);
+ status = regcache->raw_read (gpnum, raw_buf);
if (status == REG_VALID)
memcpy (buf, raw_buf, 4);
else
bitsize = TYPE_LENGTH (subtype) * 8;
endpos = (TYPE_FIELD_BITPOS (type, i) + bitsize - 1) / 64;
- /* Ignore static fields. */
- if (field_is_static (&TYPE_FIELD (type, i)))
+ /* Ignore static fields, or empty fields, for example nested
+ empty structures.*/
+ if (field_is_static (&TYPE_FIELD (type, i)) || bitsize == 0)
continue;
gdb_assert (pos == 0 || pos == 1);
AMD64_DS_REGNUM, AMD64_ES_REGNUM, AMD64_FS_REGNUM, AMD64_GS_REGNUM
};
+/* Implement the "in_indirect_branch_thunk" gdbarch function. */
+
+static bool
+amd64_in_indirect_branch_thunk (struct gdbarch *gdbarch, CORE_ADDR pc)
+{
+ return x86_in_indirect_branch_thunk (pc, amd64_register_names,
+ AMD64_RAX_REGNUM,
+ AMD64_RIP_REGNUM);
+}
+
void
amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch,
const target_desc *default_tdesc)
set_gdbarch_insn_is_call (gdbarch, amd64_insn_is_call);
set_gdbarch_insn_is_ret (gdbarch, amd64_insn_is_ret);
set_gdbarch_insn_is_jump (gdbarch, amd64_insn_is_jump);
+
+ set_gdbarch_in_indirect_branch_thunk (gdbarch,
+ amd64_in_indirect_branch_thunk);
+}
+
+/* Initialize ARCH for x86-64, no osabi. */
+
+static void
+amd64_none_init_abi (gdbarch_info info, gdbarch *arch)
+{
+ amd64_init_abi (info, arch, amd64_target_description (X86_XSTATE_SSE_MASK));
}
-\f
static struct type *
amd64_x32_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
set_gdbarch_ptr_bit (gdbarch, 32);
}
+/* Initialize ARCH for x64-32, no osabi. */
+
+static void
+amd64_x32_none_init_abi (gdbarch_info info, gdbarch *arch)
+{
+ amd64_x32_init_abi (info, arch,
+ amd64_target_description (X86_XSTATE_SSE_MASK));
+}
+
/* Return the target description for a specified XSAVE feature mask. */
const struct target_desc *
void
_initialize_amd64_tdep (void)
{
+ gdbarch_register_osabi (bfd_arch_i386, bfd_mach_x86_64, GDB_OSABI_NONE,
+ amd64_none_init_abi);
+ gdbarch_register_osabi (bfd_arch_i386, bfd_mach_x64_32, GDB_OSABI_NONE,
+ amd64_x32_none_init_abi);
+
#if GDB_SELF_TEST
struct
{