* i386nbsd-nat.c (i386nbsd_supply_pcb): Cast to 'gdb_byte *' in
[deliverable/binutils-gdb.git] / gdb / amd64-tdep.c
index d967ae933c4add249c9c69a0744602988d9518c7..8cb175145b5ee923aaf4a70d01e6cbdfb02324e0 100644 (file)
@@ -55,7 +55,9 @@ struct amd64_register_info
   struct type **type;
 };
 
-static struct amd64_register_info amd64_register_info[] =
+static struct type *amd64_sse_type;
+
+static struct amd64_register_info const amd64_register_info[] =
 {
   { "rax", &builtin_type_int64 },
   { "rbx", &builtin_type_int64 },
@@ -103,22 +105,22 @@ static struct amd64_register_info amd64_register_info[] =
   { "fop", &builtin_type_int32 },
 
   /* %xmm0 is register number 40.  */
-  { "xmm0", &builtin_type_v4sf },
-  { "xmm1", &builtin_type_v4sf },
-  { "xmm2", &builtin_type_v4sf },
-  { "xmm3", &builtin_type_v4sf },
-  { "xmm4", &builtin_type_v4sf },
-  { "xmm5", &builtin_type_v4sf },
-  { "xmm6", &builtin_type_v4sf },
-  { "xmm7", &builtin_type_v4sf },
-  { "xmm8", &builtin_type_v4sf },
-  { "xmm9", &builtin_type_v4sf },
-  { "xmm10", &builtin_type_v4sf },
-  { "xmm11", &builtin_type_v4sf },
-  { "xmm12", &builtin_type_v4sf },
-  { "xmm13", &builtin_type_v4sf },
-  { "xmm14", &builtin_type_v4sf },
-  { "xmm15", &builtin_type_v4sf },
+  { "xmm0", &amd64_sse_type },
+  { "xmm1", &amd64_sse_type },
+  { "xmm2", &amd64_sse_type },
+  { "xmm3", &amd64_sse_type },
+  { "xmm4", &amd64_sse_type },
+  { "xmm5", &amd64_sse_type },
+  { "xmm6", &amd64_sse_type },
+  { "xmm7", &amd64_sse_type },
+  { "xmm8", &amd64_sse_type },
+  { "xmm9", &amd64_sse_type },
+  { "xmm10", &amd64_sse_type },
+  { "xmm11", &amd64_sse_type },
+  { "xmm12", &amd64_sse_type },
+  { "xmm13", &amd64_sse_type },
+  { "xmm14", &amd64_sse_type },
+  { "xmm15", &amd64_sse_type },
   { "mxcsr", &builtin_type_int32 }
 };
 
@@ -143,9 +145,33 @@ amd64_register_name (int regnum)
 static struct type *
 amd64_register_type (struct gdbarch *gdbarch, int regnum)
 {
+  struct type *t;
+
   gdb_assert (regnum >= 0 && regnum < AMD64_NUM_REGS);
 
-  return *amd64_register_info[regnum].type;
+  /* ??? Unfortunately, amd64_init_abi is called too early, and so we
+     cannot create the amd64_sse_type early enough to avoid any check
+     at this point.  */
+  t = *amd64_register_info[regnum].type;
+  if (t != NULL)
+    return t;
+
+  gdb_assert (amd64_sse_type == NULL);
+
+  t = init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION);
+  append_composite_type_field (t, "v4_float", builtin_type_v4_float);
+  append_composite_type_field (t, "v2_double", builtin_type_v2_double);
+  append_composite_type_field (t, "v16_int8", builtin_type_v16_int8);
+  append_composite_type_field (t, "v8_int16", builtin_type_v8_int16);
+  append_composite_type_field (t, "v4_int32", builtin_type_v4_int32);
+  append_composite_type_field (t, "v2_int64", builtin_type_v2_int64);
+  append_composite_type_field (t, "uint128", builtin_type_int128);
+
+  TYPE_FLAGS (t) |= TYPE_FLAG_VECTOR;
+  TYPE_NAME (t) = "builtin_type_vec128i";
+      
+  amd64_sse_type = t;
+  return t;
 }
 
 /* DWARF Register Number Mapping as defined in the System V psABI,
@@ -406,7 +432,7 @@ amd64_classify (struct type *type, enum amd64_reg_class class[2])
 static enum return_value_convention
 amd64_return_value (struct gdbarch *gdbarch, struct type *type,
                    struct regcache *regcache,
-                   void *readbuf, const void *writebuf)
+                   gdb_byte *readbuf, const gdb_byte *writebuf)
 {
   enum amd64_reg_class class[2];
   int len = TYPE_LENGTH (type);
@@ -503,10 +529,10 @@ amd64_return_value (struct gdbarch *gdbarch, struct type *type,
 
       if (readbuf)
        regcache_raw_read_part (regcache, regnum, offset, min (len, 8),
-                               ((gdb_byte *)readbuf) + i * 8);
+                               readbuf + i * 8);
       if (writebuf)
        regcache_raw_write_part (regcache, regnum, offset, min (len, 8),
-                                ((const gdb_byte *)writebuf) + i * 8);
+                                writebuf + i * 8);
     }
 
   return RETURN_VALUE_REGISTER_CONVENTION;
@@ -862,7 +888,7 @@ static void
 amd64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
                           int regnum, int *optimizedp,
                           enum lval_type *lvalp, CORE_ADDR *addrp,
-                          int *realnump, void *valuep)
+                          int *realnump, gdb_byte *valuep)
 {
   struct amd64_frame_cache *cache =
     amd64_frame_cache (next_frame, this_cache);
@@ -969,7 +995,7 @@ amd64_sigtramp_frame_prev_register (struct frame_info *next_frame,
                                    void **this_cache,
                                    int regnum, int *optimizedp,
                                    enum lval_type *lvalp, CORE_ADDR *addrp,
-                                   int *realnump, void *valuep)
+                                   int *realnump, gdb_byte *valuep)
 {
   /* Make sure we've initialized the cache.  */
   amd64_sigtramp_frame_cache (next_frame, this_cache);
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