/* Target-dependent code for AMD64.
- Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006
+ Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007
Free Software Foundation, Inc.
Contributed by Jiri Smid, SuSE Labs.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor,
- Boston, MA 02110-1301, USA. */
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
#include "arch-utils.h"
/* Register information. */
-struct amd64_register_info
+static const char *amd64_register_names[] =
{
- char *name;
- struct type **type;
-};
-
-static struct amd64_register_info const amd64_register_info[] =
-{
- { "rax", &builtin_type_int64 },
- { "rbx", &builtin_type_int64 },
- { "rcx", &builtin_type_int64 },
- { "rdx", &builtin_type_int64 },
- { "rsi", &builtin_type_int64 },
- { "rdi", &builtin_type_int64 },
- { "rbp", &builtin_type_void_data_ptr },
- { "rsp", &builtin_type_void_data_ptr },
+ "rax", "rbx", "rcx", "rdx", "rsi", "rdi", "rbp", "rsp",
/* %r8 is indeed register number 8. */
- { "r8", &builtin_type_int64 },
- { "r9", &builtin_type_int64 },
- { "r10", &builtin_type_int64 },
- { "r11", &builtin_type_int64 },
- { "r12", &builtin_type_int64 },
- { "r13", &builtin_type_int64 },
- { "r14", &builtin_type_int64 },
- { "r15", &builtin_type_int64 },
- { "rip", &builtin_type_void_func_ptr },
- { "eflags", &i386_eflags_type },
- { "cs", &builtin_type_int32 },
- { "ss", &builtin_type_int32 },
- { "ds", &builtin_type_int32 },
- { "es", &builtin_type_int32 },
- { "fs", &builtin_type_int32 },
- { "gs", &builtin_type_int32 },
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "rip", "eflags", "cs", "ss", "ds", "es", "fs", "gs",
/* %st0 is register number 24. */
- { "st0", &builtin_type_i387_ext },
- { "st1", &builtin_type_i387_ext },
- { "st2", &builtin_type_i387_ext },
- { "st3", &builtin_type_i387_ext },
- { "st4", &builtin_type_i387_ext },
- { "st5", &builtin_type_i387_ext },
- { "st6", &builtin_type_i387_ext },
- { "st7", &builtin_type_i387_ext },
- { "fctrl", &builtin_type_int32 },
- { "fstat", &builtin_type_int32 },
- { "ftag", &builtin_type_int32 },
- { "fiseg", &builtin_type_int32 },
- { "fioff", &builtin_type_int32 },
- { "foseg", &builtin_type_int32 },
- { "fooff", &builtin_type_int32 },
- { "fop", &builtin_type_int32 },
+ "st0", "st1", "st2", "st3", "st4", "st5", "st6", "st7",
+ "fctrl", "fstat", "ftag", "fiseg", "fioff", "foseg", "fooff", "fop",
/* %xmm0 is register number 40. */
- { "xmm0", &i386_sse_type },
- { "xmm1", &i386_sse_type },
- { "xmm2", &i386_sse_type },
- { "xmm3", &i386_sse_type },
- { "xmm4", &i386_sse_type },
- { "xmm5", &i386_sse_type },
- { "xmm6", &i386_sse_type },
- { "xmm7", &i386_sse_type },
- { "xmm8", &i386_sse_type },
- { "xmm9", &i386_sse_type },
- { "xmm10", &i386_sse_type },
- { "xmm11", &i386_sse_type },
- { "xmm12", &i386_sse_type },
- { "xmm13", &i386_sse_type },
- { "xmm14", &i386_sse_type },
- { "xmm15", &i386_sse_type },
- { "mxcsr", &i386_mxcsr_type }
+ "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
+ "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
+ "mxcsr",
};
/* Total number of registers. */
-#define AMD64_NUM_REGS ARRAY_SIZE (amd64_register_info)
+#define AMD64_NUM_REGS ARRAY_SIZE (amd64_register_names)
/* Return the name of register REGNUM. */
amd64_register_name (int regnum)
{
if (regnum >= 0 && regnum < AMD64_NUM_REGS)
- return amd64_register_info[regnum].name;
+ return amd64_register_names[regnum];
return NULL;
}
struct type *
amd64_register_type (struct gdbarch *gdbarch, int regnum)
{
- gdb_assert (regnum >= 0 && regnum < AMD64_NUM_REGS);
-
- return *amd64_register_info[regnum].type;
+ if (regnum >= AMD64_RAX_REGNUM && regnum <= AMD64_RDI_REGNUM)
+ return builtin_type_int64;
+ if (regnum == AMD64_RBP_REGNUM || regnum == AMD64_RSP_REGNUM)
+ return builtin_type_void_data_ptr;
+ if (regnum >= AMD64_R8_REGNUM && regnum <= AMD64_R15_REGNUM)
+ return builtin_type_int64;
+ if (regnum == AMD64_RIP_REGNUM)
+ return builtin_type_void_func_ptr;
+ if (regnum == AMD64_EFLAGS_REGNUM)
+ return i386_eflags_type;
+ if (regnum >= AMD64_CS_REGNUM && regnum <= AMD64_GS_REGNUM)
+ return builtin_type_int32;
+ if (regnum >= AMD64_ST0_REGNUM && regnum <= AMD64_ST0_REGNUM + 7)
+ return builtin_type_i387_ext;
+ if (regnum >= AMD64_FCTRL_REGNUM && regnum <= AMD64_FCTRL_REGNUM + 7)
+ return builtin_type_int32;
+ if (regnum >= AMD64_XMM0_REGNUM && regnum <= AMD64_XMM0_REGNUM + 15)
+ return i386_sse_type (gdbarch);
+ if (regnum == AMD64_MXCSR_REGNUM)
+ return i386_mxcsr_type;
+
+ internal_error (__FILE__, __LINE__, _("invalid regnum"));
}
/* DWARF Register Number Mapping as defined in the System V psABI,
int frameless_p;
};
-/* Allocate and initialize a frame cache. */
+/* Initialize a frame cache. */
-static struct amd64_frame_cache *
-amd64_alloc_frame_cache (void)
+static void
+amd64_init_frame_cache (struct amd64_frame_cache *cache)
{
- struct amd64_frame_cache *cache;
int i;
- cache = FRAME_OBSTACK_ZALLOC (struct amd64_frame_cache);
-
/* Base address. */
cache->base = 0;
cache->sp_offset = -8;
/* Frameless until proven otherwise. */
cache->frameless_p = 1;
+}
+
+/* Allocate and initialize a frame cache. */
+
+static struct amd64_frame_cache *
+amd64_alloc_frame_cache (void)
+{
+ struct amd64_frame_cache *cache;
+ cache = FRAME_OBSTACK_ZALLOC (struct amd64_frame_cache);
+ amd64_init_frame_cache (cache);
return cache;
}
struct amd64_frame_cache cache;
CORE_ADDR pc;
+ amd64_init_frame_cache (&cache);
pc = amd64_analyze_prologue (start_pc, 0xffffffffffffffffLL, &cache);
if (cache.frameless_p)
return start_pc;
cache = amd64_alloc_frame_cache ();
*this_cache = cache;
- cache->pc = frame_func_unwind (next_frame);
+ cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
if (cache->pc != 0)
amd64_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
gdb_assert (regnum >= 0);
- if (regnum == SP_REGNUM && cache->saved_sp)
+ if (regnum == gdbarch_sp_regnum (current_gdbarch) && cache->saved_sp)
{
*optimizedp = 0;
*lvalp = not_lval;