#include "features/i386/amd64-avx.c"
#include "features/i386/amd64-mpx.c"
#include "features/i386/amd64-avx-mpx.c"
-#include "features/i386/amd64-avx512.c"
+#include "features/i386/amd64-avx-avx512.c"
+#include "features/i386/amd64-avx-mpx-avx512-pku.c"
#include "features/i386/x32.c"
#include "features/i386/x32-avx.c"
-#include "features/i386/x32-avx512.c"
+#include "features/i386/x32-avx-avx512.c"
#include "ax.h"
#include "ax-gdb.h"
"xmm28", "xmm29", "xmm30", "xmm31"
};
+static const char *amd64_pkeys_names[] = {
+ "pkru"
+};
+
/* DWARF Register Number Mapping as defined in the System V psABI,
section 3.6. */
if ((code == TYPE_CODE_INT || code == TYPE_CODE_ENUM
|| code == TYPE_CODE_BOOL || code == TYPE_CODE_RANGE
|| code == TYPE_CODE_CHAR
- || code == TYPE_CODE_PTR || code == TYPE_CODE_REF)
+ || code == TYPE_CODE_PTR || TYPE_IS_REFERENCE (type))
&& (len == 1 || len == 2 || len == 4 || len == 8))
theclass[0] = AMD64_INTEGER;
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[8];
+ /* BND registers can be in arbitrary values at the moment of the
+ inferior call. This can cause boundary violations that are not
+ due to a real bug or even desired by the user. The best to be done
+ is set the BND registers to allow access to the whole memory, INIT
+ state, before pushing the inferior call. */
+ i387_reset_bnd_regs (gdbarch, regcache);
+
/* Pass arguments. */
sp = amd64_push_arguments (regcache, nargs, args, sp, struct_return);
AMD64_GSBASE_REGNUM, "gs_base");
}
+ if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.pkeys") != NULL)
+ {
+ tdep->pkeys_register_names = amd64_pkeys_names;
+ tdep->pkru_regnum = AMD64_PKRU_REGNUM;
+ tdep->num_pkeys_regs = 1;
+ }
+
tdep->num_byte_regs = 20;
tdep->num_word_regs = 16;
tdep->num_dword_regs = 16;
{
switch (xcr0 & X86_XSTATE_ALL_MASK)
{
- case X86_XSTATE_MPX_AVX512_MASK:
- case X86_XSTATE_AVX512_MASK:
- return tdesc_amd64_avx512;
+ case X86_XSTATE_AVX_MPX_AVX512_PKU_MASK:
+ return tdesc_amd64_avx_mpx_avx512_pku;
+ case X86_XSTATE_AVX_AVX512_MASK:
+ return tdesc_amd64_avx_avx512;
case X86_XSTATE_MPX_MASK:
return tdesc_amd64_mpx;
case X86_XSTATE_AVX_MPX_MASK:
initialize_tdesc_amd64_avx ();
initialize_tdesc_amd64_mpx ();
initialize_tdesc_amd64_avx_mpx ();
- initialize_tdesc_amd64_avx512 ();
+ initialize_tdesc_amd64_avx_avx512 ();
+ initialize_tdesc_amd64_avx_mpx_avx512_pku ();
initialize_tdesc_x32 ();
initialize_tdesc_x32_avx ();
- initialize_tdesc_x32_avx512 ();
+ initialize_tdesc_x32_avx_avx512 ();
}
\f