AMD64_K0_REGNUM,
AMD64_K7_REGNUM = AMD64_K0_REGNUM + 7,
AMD64_ZMM0H_REGNUM,
- AMD64_ZMM31H_REGNUM = AMD64_ZMM0H_REGNUM + 31
+ AMD64_ZMM31H_REGNUM = AMD64_ZMM0H_REGNUM + 31,
+ AMD64_PKRU_REGNUM,
+ AMD64_FSBASE_REGNUM,
+ AMD64_GSBASE_REGNUM
};
/* Number of general purpose registers. */
#define AMD64_NUM_GREGS 24
-#define AMD64_NUM_REGS (AMD64_ZMM31H_REGNUM + 1)
+#define AMD64_NUM_REGS (AMD64_GSBASE_REGNUM + 1)
extern struct target_desc *tdesc_amd64;