AMD64_FS_REGNUM, /* %fs */
AMD64_GS_REGNUM, /* %gs */
AMD64_ST0_REGNUM = 24, /* %st0 */
+ AMD64_ST1_REGNUM, /* %st1 */
AMD64_FCTRL_REGNUM = AMD64_ST0_REGNUM + 8,
AMD64_FSTAT_REGNUM = AMD64_ST0_REGNUM + 9,
+ AMD64_FTAG_REGNUM = AMD64_ST0_REGNUM + 10,
AMD64_XMM0_REGNUM = 40, /* %xmm0 */
AMD64_XMM1_REGNUM, /* %xmm1 */
AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16,
struct regcache *regs);
extern void amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch);
+extern void amd64_x32_init_abi (struct gdbarch_info info,
+ struct gdbarch *gdbarch);
/* Fill register REGNUM in REGCACHE with the appropriate
floating-point or SSE register value from *FXSAVE. If REGNUM is