/* Common target-dependent functionality for AArch64.
- Copyright (C) 2017-2019 Free Software Foundation, Inc.
+ Copyright (C) 2017-2021 Free Software Foundation, Inc.
This file is part of GDB.
#ifndef ARCH_AARCH64_H
#define ARCH_AARCH64_H
-#include "common/tdesc.h"
+#include "gdbsupport/tdesc.h"
+
+/* Holds information on what architectural features are available. This is
+ used to select register sets. */
+struct aarch64_features
+{
+ bool sve = false;
+ bool pauth = false;
+ bool mte = false;
+};
/* Create the aarch64 target description. A non zero VQ value indicates both
the presence of SVE and the Vector Quotient - the number of 128bit chunks in
- an SVE Z register. */
+ an SVE Z register. HAS_PAUTH_P indicates the presence of the PAUTH
+ feature.
-target_desc *aarch64_create_target_description (uint64_t vq);
+ MTE_P indicates the presence of the Memory Tagging Extension feature. */
+
+target_desc *aarch64_create_target_description (uint64_t vq, bool has_pauth_p,
+ bool mte_p);
/* Register numbers of various important registers.
Note that on SVE, the Z registers reuse the V register numbers and the V
AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7
};
+#define V_REGISTER_SIZE 16
+
/* Pseudo register base numbers. */
#define AARCH64_Q0_REGNUM 0
#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)
#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32)
+#define AARCH64_PAUTH_DMASK_REGNUM(pauth_reg_base) (pauth_reg_base)
+#define AARCH64_PAUTH_CMASK_REGNUM(pauth_reg_base) (pauth_reg_base + 1)
+#define AARCH64_PAUTH_REGS_SIZE (16)
+
#define AARCH64_X_REGS_NUM 31
#define AARCH64_V_REGS_NUM 32
#define AARCH64_SVE_Z_REGS_NUM AARCH64_V_REGS_NUM