/* Common target-dependent functionality for AArch64.
- Copyright (C) 2017-2018 Free Software Foundation, Inc.
+ Copyright (C) 2017-2021 Free Software Foundation, Inc.
This file is part of GDB.
#ifndef ARCH_AARCH64_H
#define ARCH_AARCH64_H
-#include "common/tdesc.h"
+#include "gdbsupport/tdesc.h"
+
+/* Holds information on what architectural features are available. This is
+ used to select register sets. */
+struct aarch64_features
+{
+ bool sve = false;
+ bool pauth = false;
+ bool mte = false;
+};
/* Create the aarch64 target description. A non zero VQ value indicates both
the presence of SVE and the Vector Quotient - the number of 128bit chunks in
- an SVE Z register. */
+ an SVE Z register. HAS_PAUTH_P indicates the presence of the PAUTH
+ feature.
+
+ MTE_P indicates the presence of the Memory Tagging Extension feature. */
-target_desc *aarch64_create_target_description (uint64_t vq);
+target_desc *aarch64_create_target_description (uint64_t vq, bool has_pauth_p,
+ bool mte_p);
/* Register numbers of various important registers.
Note that on SVE, the Z registers reuse the V register numbers and the V
AARCH64_SVE_P15_REGNUM = AARCH64_SVE_P0_REGNUM + 15, /* Last SVE predicate
register. */
AARCH64_SVE_FFR_REGNUM, /* SVE First Fault Register. */
- AARCH64_SVE_VG_REGNUM, /* SVE Vector Gradient. */
+ AARCH64_SVE_VG_REGNUM, /* SVE Vector Granule. */
/* Other useful registers. */
AARCH64_LAST_X_ARG_REGNUM = AARCH64_X0_REGNUM + 7,
AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7
};
+#define V_REGISTER_SIZE 16
+
+/* Pseudo register base numbers. */
+#define AARCH64_Q0_REGNUM 0
+#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)
+#define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32)
+#define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32)
+#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
+#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32)
+
+#define AARCH64_PAUTH_DMASK_REGNUM(pauth_reg_base) (pauth_reg_base)
+#define AARCH64_PAUTH_CMASK_REGNUM(pauth_reg_base) (pauth_reg_base + 1)
+#define AARCH64_PAUTH_REGS_SIZE (16)
+
#define AARCH64_X_REGS_NUM 31
#define AARCH64_V_REGS_NUM 32
#define AARCH64_SVE_Z_REGS_NUM AARCH64_V_REGS_NUM
The number of bytes in an SVE Z register.
VQ : Vector Quotient.
The number of 128bit chunks in an SVE Z register.
- VG : Vector Gradient.
+ VG : Vector Granule.
The number of 64bit chunks in an SVE Z register. */
#define sve_vg_from_vl(vl) ((vl) / 8)
#define sve_vl_from_vg(vg) ((vg) * 8)
+#ifndef sve_vq_from_vl
#define sve_vq_from_vl(vl) ((vl) / 0x10)
+#endif
+#ifndef sve_vl_from_vq
#define sve_vl_from_vq(vq) ((vq) * 0x10)
+#endif
#define sve_vq_from_vg(vg) (sve_vq_from_vl (sve_vl_from_vg (vg)))
#define sve_vg_from_vq(vq) (sve_vg_from_vl (sve_vl_from_vq (vq)))