#include <sys/user.h>
#include <sys/ptrace.h>
#include <sys/utsname.h>
+#include <sys/procfs.h>
+
+/* Prototypes for supply_gregset etc. */
+#include "gregset.h"
extern int arm_apcs_32;
static unsigned int os_version, os_major, os_minor, os_release;
+/* On Linux, threads are implemented as pseudo-processes, in which
+ case we may be tracing more than one process at a time. In that
+ case, inferior_pid will contain the main process ID and the
+ individual thread (process) ID mashed together. These macros are
+ used to separate them out. These definitions should be overridden
+ if thread support is included. */
+
+#if !defined (PIDGET) /* Default definition for PIDGET/TIDGET. */
+#define PIDGET(PID) PID
+#define TIDGET(PID) 0
+#endif
+
+int
+get_thread_id (int inferior_pid)
+{
+ int tid = TIDGET (inferior_pid);
+ if (0 == tid) tid = inferior_pid;
+ return tid;
+}
+#define GET_THREAD_ID(PID) get_thread_id ((PID));
+
static void
fetch_nwfpe_single (unsigned int fn, FPA11 * fpa11)
{
supply_register (F0_REGNUM + fn, (char *) &mem[0]);
}
+static void
+fetch_nwfpe_register (int regno, FPA11 * fpa11)
+{
+ int fn = regno - F0_REGNUM;
+
+ switch (fpa11->fType[fn])
+ {
+ case typeSingle:
+ fetch_nwfpe_single (fn, fpa11);
+ break;
+
+ case typeDouble:
+ fetch_nwfpe_double (fn, fpa11);
+ break;
+
+ case typeExtended:
+ fetch_nwfpe_extended (fn, fpa11);
+ break;
+
+ default:
+ fetch_nwfpe_none (fn);
+ }
+}
+
static void
store_nwfpe_single (unsigned int fn, FPA11 * fpa11)
{
fpa11->fType[fn] = typeDouble;
}
-/* Get the whole floating point state of the process and store the
- floating point stack into registers[]. */
+void
+store_nwfpe_register (int regno, FPA11 * fpa11)
+{
+ if (register_valid[regno])
+ {
+ unsigned int fn = regno - F0_REGNUM;
+ switch (fpa11->fType[fn])
+ {
+ case typeSingle:
+ store_nwfpe_single (fn, fpa11);
+ break;
+
+ case typeDouble:
+ store_nwfpe_double (fn, fpa11);
+ break;
+
+ case typeExtended:
+ store_nwfpe_extended (fn, fpa11);
+ break;
+ }
+ }
+}
+
+
+/* Get the value of a particular register from the floating point
+ state of the process and store it into registers[]. */
+
+static void
+fetch_fpregister (int regno)
+{
+ int ret, tid;
+ FPA11 fp;
+
+ /* Get the thread id for the ptrace call. */
+ tid = GET_THREAD_ID (inferior_pid);
+
+ /* Read the floating point state. */
+ ret = ptrace (PT_GETFPREGS, tid, 0, &fp);
+ if (ret < 0)
+ {
+ warning ("Unable to fetch floating point register.");
+ return;
+ }
+
+ /* Fetch fpsr. */
+ if (FPS_REGNUM == regno)
+ supply_register (FPS_REGNUM, (char *) &fp.fpsr);
+
+ /* Fetch the floating point register. */
+ if (regno >= F0_REGNUM && regno <= F7_REGNUM)
+ {
+ int fn = regno - F0_REGNUM;
+
+ switch (fp.fType[fn])
+ {
+ case typeSingle:
+ fetch_nwfpe_single (fn, &fp);
+ break;
+
+ case typeDouble:
+ fetch_nwfpe_double (fn, &fp);
+ break;
+
+ case typeExtended:
+ fetch_nwfpe_extended (fn, &fp);
+ break;
+
+ default:
+ fetch_nwfpe_none (fn);
+ }
+ }
+}
+
+/* Get the whole floating point state of the process and store it
+ into registers[]. */
static void
fetch_fpregs (void)
{
- int ret, regno;
+ int ret, regno, tid;
FPA11 fp;
+ /* Get the thread id for the ptrace call. */
+ tid = GET_THREAD_ID (inferior_pid);
+
/* Read the floating point state. */
- ret = ptrace (PT_GETFPREGS, inferior_pid, 0, &fp);
+ ret = ptrace (PT_GETFPREGS, tid, 0, &fp);
if (ret < 0)
{
- warning ("Unable to fetch the floating point state.");
+ warning ("Unable to fetch the floating point registers.");
return;
}
}
}
+/* Save a particular register into the floating point state of the
+ process using the contents from registers[]. */
+
+static void
+store_fpregister (int regno)
+{
+ int ret, tid;
+ FPA11 fp;
+
+ /* Get the thread id for the ptrace call. */
+ tid = GET_THREAD_ID (inferior_pid);
+
+ /* Read the floating point state. */
+ ret = ptrace (PT_GETFPREGS, tid, 0, &fp);
+ if (ret < 0)
+ {
+ warning ("Unable to fetch the floating point registers.");
+ return;
+ }
+
+ /* Store fpsr. */
+ if (FPS_REGNUM == regno && register_valid[FPS_REGNUM])
+ read_register_gen (FPS_REGNUM, (char *) &fp.fpsr);
+
+ /* Store the floating point register. */
+ if (regno >= F0_REGNUM && regno <= F7_REGNUM)
+ {
+ store_nwfpe_register (regno, &fp);
+ }
+
+ ret = ptrace (PTRACE_SETFPREGS, tid, 0, &fp);
+ if (ret < 0)
+ {
+ warning ("Unable to store floating point register.");
+ return;
+ }
+}
+
/* Save the whole floating point state of the process using
the contents from registers[]. */
static void
store_fpregs (void)
{
- int ret, regno;
+ int ret, regno, tid;
FPA11 fp;
+ /* Get the thread id for the ptrace call. */
+ tid = GET_THREAD_ID (inferior_pid);
+
+ /* Read the floating point state. */
+ ret = ptrace (PT_GETFPREGS, tid, 0, &fp);
+ if (ret < 0)
+ {
+ warning ("Unable to fetch the floating point registers.");
+ return;
+ }
+
/* Store fpsr. */
if (register_valid[FPS_REGNUM])
read_register_gen (FPS_REGNUM, (char *) &fp.fpsr);
/* Store the floating point registers. */
for (regno = F0_REGNUM; regno <= F7_REGNUM; regno++)
{
- if (register_valid[regno])
- {
- unsigned int fn = regno - F0_REGNUM;
- switch (fp.fType[fn])
- {
- case typeSingle:
- store_nwfpe_single (fn, &fp);
- break;
-
- case typeDouble:
- store_nwfpe_double (fn, &fp);
- break;
-
- case typeExtended:
- store_nwfpe_extended (fn, &fp);
- break;
- }
- }
+ fetch_nwfpe_register (regno, &fp);
+ }
+
+ ret = ptrace (PTRACE_SETFPREGS, tid, 0, &fp);
+ if (ret < 0)
+ {
+ warning ("Unable to store floating point registers.");
+ return;
}
+}
+
+/* Fetch a general register of the process and store into
+ registers[]. */
+
+static void
+fetch_register (int regno)
+{
+ int ret, tid;
+ struct pt_regs regs;
- ret = ptrace (PTRACE_SETFPREGS, inferior_pid, 0, &fp);
+ /* Get the thread id for the ptrace call. */
+ tid = GET_THREAD_ID (inferior_pid);
+
+ ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
{
- warning ("Unable to store floating point state.");
+ warning ("Unable to fetch general register.");
return;
}
+
+ if (regno >= A1_REGNUM && regno < PC_REGNUM)
+ supply_register (regno, (char *) ®s.uregs[regno]);
+
+ if (PS_REGNUM == regno)
+ {
+ if (arm_apcs_32)
+ supply_register (PS_REGNUM, (char *) ®s.uregs[CPSR_REGNUM]);
+ else
+ supply_register (PS_REGNUM, (char *) ®s.uregs[PC_REGNUM]);
+ }
+
+ if (PC_REGNUM == regno)
+ {
+ regs.uregs[PC_REGNUM] = ADDR_BITS_REMOVE (regs.uregs[PC_REGNUM]);
+ supply_register (PC_REGNUM, (char *) ®s.uregs[PC_REGNUM]);
+ }
}
/* Fetch all general registers of the process and store into
static void
fetch_regs (void)
{
- int ret, regno;
+ int ret, regno, tid;
struct pt_regs regs;
- ret = ptrace (PTRACE_GETREGS, inferior_pid, 0, ®s);
+ /* Get the thread id for the ptrace call. */
+ tid = GET_THREAD_ID (inferior_pid);
+
+ ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
{
warning ("Unable to fetch general registers.");
/* Store all general registers of the process from the values in
registers[]. */
+static void
+store_register (int regno)
+{
+ int ret, tid;
+ struct pt_regs regs;
+
+ if (!register_valid[regno])
+ return;
+
+ /* Get the thread id for the ptrace call. */
+ tid = GET_THREAD_ID (inferior_pid);
+
+ /* Get the general registers from the process. */
+ ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
+ if (ret < 0)
+ {
+ warning ("Unable to fetch general registers.");
+ return;
+ }
+
+ if (regno >= A1_REGNUM && regno <= PC_REGNUM)
+ read_register_gen (regno, (char *) ®s.uregs[regno]);
+
+ ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
+ if (ret < 0)
+ {
+ warning ("Unable to store general register.");
+ return;
+ }
+}
+
static void
store_regs (void)
{
- int ret, regno;
+ int ret, regno, tid;
struct pt_regs regs;
- ret = ptrace (PTRACE_GETREGS, inferior_pid, 0, ®s);
+ /* Get the thread id for the ptrace call. */
+ tid = GET_THREAD_ID (inferior_pid);
+
+ /* Fetch the general registers. */
+ ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
{
warning ("Unable to fetch general registers.");
read_register_gen (regno, (char *) ®s.uregs[regno]);
}
- ret = ptrace (PTRACE_SETREGS, inferior_pid, 0, ®s);
+ ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
if (ret < 0)
{
void
fetch_inferior_registers (int regno)
{
- if ((regno < F0_REGNUM) || (regno > FPS_REGNUM))
- fetch_regs ();
+ if (-1 == regno)
+ {
+ fetch_regs ();
+ fetch_fpregs ();
+ }
+ else
+ {
+ if (regno < F0_REGNUM || regno > FPS_REGNUM)
+ fetch_register (regno);
- if (((regno >= F0_REGNUM) && (regno <= FPS_REGNUM)) || (regno == -1))
- fetch_fpregs ();
+ if (regno >= F0_REGNUM && regno <= FPS_REGNUM)
+ fetch_fpregister (regno);
+ }
}
/* Store registers back into the inferior. Store all registers if
void
store_inferior_registers (int regno)
{
- if ((regno < F0_REGNUM) || (regno > FPS_REGNUM))
- store_regs ();
+ if (-1 == regno)
+ {
+ store_regs ();
+ store_fpregs ();
+ }
+ else
+ {
+ if ((regno < F0_REGNUM) || (regno > FPS_REGNUM))
+ store_register (regno);
- if (((regno >= F0_REGNUM) && (regno <= FPS_REGNUM)) || (regno == -1))
- store_fpregs ();
+ if ((regno >= F0_REGNUM) && (regno <= FPS_REGNUM))
+ store_fpregister (regno);
+ }
}
-/*
- Dynamic Linking on ARM Linux
- ----------------------------
-
- Note: PLT = procedure linkage table
- GOT = global offset table
-
- As much as possible, ELF dynamic linking defers the resolution of
- jump/call addresses until the last minute. The technique used is
- inspired by the i386 ELF design, and is based on the following
- constraints.
-
- 1) The calling technique should not force a change in the assembly
- code produced for apps; it MAY cause changes in the way assembly
- code is produced for position independent code (i.e. shared
- libraries).
-
- 2) The technique must be such that all executable areas must not be
- modified; and any modified areas must not be executed.
-
- To do this, there are three steps involved in a typical jump:
-
- 1) in the code
- 2) through the PLT
- 3) using a pointer from the GOT
-
- When the executable or library is first loaded, each GOT entry is
- initialized to point to the code which implements dynamic name
- resolution and code finding. This is normally a function in the
- program interpreter (on ARM Linux this is usually ld-linux.so.2,
- but it does not have to be). On the first invocation, the function
- is located and the GOT entry is replaced with the real function
- address. Subsequent calls go through steps 1, 2 and 3 and end up
- calling the real code.
+/* Fill register regno (if it is a general-purpose register) in
+ *gregsetp with the appropriate value from GDB's register array.
+ If regno is -1, do this for all registers. */
- 1) In the code:
-
- b function_call
- bl function_call
-
- This is typical ARM code using the 26 bit relative branch or branch
- and link instructions. The target of the instruction
- (function_call is usually the address of the function to be called.
- In position independent code, the target of the instruction is
- actually an entry in the PLT when calling functions in a shared
- library. Note that this call is identical to a normal function
- call, only the target differs.
-
- 2) In the PLT:
-
- The PLT is a synthetic area, created by the linker. It exists in
- both executables and libraries. It is an array of stubs, one per
- imported function call. It looks like this:
-
- PLT[0]:
- str lr, [sp, #-4]! @push the return address (lr)
- ldr lr, [pc, #16] @load from 6 words ahead
- add lr, pc, lr @form an address for GOT[0]
- ldr pc, [lr, #8]! @jump to the contents of that addr
-
- The return address (lr) is pushed on the stack and used for
- calculations. The load on the second line loads the lr with
- &GOT[3] - . - 20. The addition on the third leaves:
-
- lr = (&GOT[3] - . - 20) + (. + 8)
- lr = (&GOT[3] - 12)
- lr = &GOT[0]
-
- On the fourth line, the pc and lr are both updated, so that:
+void
+fill_gregset (gregset_t *gregsetp, int regno)
+{
+ if (-1 == regno)
+ {
+ int regnum;
+ for (regnum = A1_REGNUM; regnum <= PC_REGNUM; regnum++)
+ if (register_valid[regnum])
+ read_register_gen (regnum, (char *) &(*gregsetp)[regnum]);
+ }
+ else if (regno >= A1_REGNUM && regno <= PC_REGNUM)
+ {
+ if (register_valid[regno])
+ read_register_gen (regno, (char *) &(*gregsetp)[regno]);
+ }
- pc = GOT[2]
- lr = &GOT[0] + 8
- = &GOT[2]
+ if (PS_REGNUM == regno || -1 == regno)
+ {
+ if (register_valid[regno] || -1 == regno)
+ {
+ if (arm_apcs_32)
+ read_register_gen (PS_REGNUM, (char *) &(*gregsetp)[CPSR_REGNUM]);
+ else
+ read_register_gen (PC_REGNUM, (char *) &(*gregsetp)[PC_REGNUM]);
+ }
+ }
+
+}
- NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
- "tight", but allows us to keep all the PLT entries the same size.
+/* Fill GDB's register array with the general-purpose register values
+ in *gregsetp. */
- PLT[n+1]:
- ldr ip, [pc, #4] @load offset from gotoff
- add ip, pc, ip @add the offset to the pc
- ldr pc, [ip] @jump to that address
- gotoff: .word GOT[n+3] - .
+void
+supply_gregset (gregset_t *gregsetp)
+{
+ int regno, reg_pc;
- The load on the first line, gets an offset from the fourth word of
- the PLT entry. The add on the second line makes ip = &GOT[n+3],
- which contains either a pointer to PLT[0] (the fixup trampoline) or
- a pointer to the actual code.
+ for (regno = A1_REGNUM; regno < PC_REGNUM; regno++)
+ supply_register (regno, (char *) &(*gregsetp)[regno]);
- 3) In the GOT:
+ if (arm_apcs_32)
+ supply_register (PS_REGNUM, (char *) &(*gregsetp)[CPSR_REGNUM]);
+ else
+ supply_register (PS_REGNUM, (char *) &(*gregsetp)[PC_REGNUM]);
- The GOT contains helper pointers for both code (PLT) fixups and
- data fixups. The first 3 entries of the GOT are special. The next
- M entries (where M is the number of entries in the PLT) belong to
- the PLT fixups. The next D (all remaining) entries belong to
- various data fixups. The actual size of the GOT is 3 + M + D.
+ reg_pc = ADDR_BITS_REMOVE ((CORE_ADDR)(*gregsetp)[PC_REGNUM]);
+ supply_register (PC_REGNUM, (char *) ®_pc);
+}
- The GOT is also a synthetic area, created by the linker. It exists
- in both executables and libraries. When the GOT is first
- initialized , all the GOT entries relating to PLT fixups are
- pointing to code back at PLT[0].
-
- The special entries in the GOT are:
+/* Fill register regno (if it is a floating-point register) in
+ *fpregsetp with the appropriate value from GDB's register array.
+ If regno is -1, do this for all registers. */
- GOT[0] = linked list pointer used by the dynamic loader
- GOT[1] = pointer to the reloc table for this module
- GOT[2] = pointer to the fixup/resolver code
+void
+fill_fpregset (fpregset_t *fpregsetp, int regno)
+{
+ FPA11 *fp = (FPA11 *) fpregsetp;
+
+ if (-1 == regno)
+ {
+ int regnum;
+ for (regnum = F0_REGNUM; regnum <= F7_REGNUM; regnum++)
+ store_nwfpe_register (regnum, fp);
+ }
+ else if (regno >= F0_REGNUM && regno <= F7_REGNUM)
+ {
+ store_nwfpe_register (regno, fp);
+ return;
+ }
- The first invocation of function call comes through and uses the
- fixup/resolver code. On the entry to the fixup/resolver code:
-
- ip = &GOT[n+3]
- lr = &GOT[2]
- stack[0] = return address (lr) of the function call
- [r0, r1, r2, r3] are still the arguments to the function call
+ /* Store fpsr. */
+ if (register_valid[FPS_REGNUM])
+ if (FPS_REGNUM == regno || -1 == regno)
+ read_register_gen (FPS_REGNUM, (char *) &fp->fpsr);
+}
- This is enough information for the fixup/resolver code to work
- with. Before the fixup/resolver code returns, it actually calls
- the requested function and repairs &GOT[n+3]. */
+/* Fill GDB's register array with the floating-point register values
+ in *fpregsetp. */
-CORE_ADDR
-arm_skip_solib_resolver (CORE_ADDR pc)
+void
+supply_fpregset (fpregset_t *fpregsetp)
{
- /* FIXME */
- return 0;
-}
+ int regno;
+ FPA11 *fp = (FPA11 *) fpregsetp;
-int
-arm_linux_register_u_addr (int blockend, int regnum)
-{
- return blockend + REGISTER_BYTE (regnum);
+ /* Fetch fpsr. */
+ supply_register (FPS_REGNUM, (char *) &fp->fpsr);
+
+ /* Fetch the floating point registers. */
+ for (regno = F0_REGNUM; regno <= F7_REGNUM; regno++)
+ {
+ fetch_nwfpe_register (regno, fp);
+ }
}
int
projects / deliverable / binutils-gdb.git / blobdiff