Give Palmer co-credit for last patch.

[deliverable/binutils-gdb.git] / gdb / arm-tdep.c

diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index def3958fc97c04938d9cedd4106b9bfa12e2d139..54c6392ba7b3608d73182aede76bb494c48473bf 100644 (file)
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -30,7 +30,7 @@
 #include "disasm.h"
 #include "regcache.h"
 #include "reggroups.h"
-#include "doublest.h"
+#include "target-float.h"
 #include "value.h"
 #include "arch-utils.h"
 #include "osabi.h"
@@ -220,7 +220,7 @@ static const char *disassembly_style;
 
 /* This is used to keep the bfd arch_info in sync with the disassembly
    style.  */
-static void set_disassembly_style_sfunc(char *, int,
+static void set_disassembly_style_sfunc (const char *, int,
                                         struct cmd_list_element *);
 static void show_disassembly_style_sfunc (struct ui_file *, int,
                                          struct cmd_list_element *,
@@ -7902,8 +7902,8 @@ arm_extract_return_value (struct type *type, struct regcache *regs,
            bfd_byte tmpbuf[FP_REGISTER_SIZE];
 
            regcache_cooked_read (regs, ARM_F0_REGNUM, tmpbuf);
-           convert_typed_floating (tmpbuf, arm_ext_type (gdbarch),
-                                   valbuf, type);
+           target_float_convert (tmpbuf, arm_ext_type (gdbarch),
+                                 valbuf, type);
          }
          break;
 
@@ -8107,7 +8107,7 @@ arm_store_return_value (struct type *type, struct regcache *regs,
        {
        case ARM_FLOAT_FPA:
 
-         convert_typed_floating (valbuf, type, buf, arm_ext_type (gdbarch));
+         target_float_convert (valbuf, type, buf, arm_ext_type (gdbarch));
          regcache_cooked_write (regs, ARM_F0_REGNUM, buf);
          break;
 
@@ -8387,7 +8387,7 @@ arm_update_current_architecture (void)
 }
 
 static void
-set_fp_model_sfunc (char *args, int from_tty,
+set_fp_model_sfunc (const char *args, int from_tty,
                    struct cmd_list_element *c)
 {
   int fp_model;
@@ -8424,7 +8424,7 @@ The current ARM floating point model is \"%s\".\n"),
 }
 
 static void
-arm_set_abi (char *args, int from_tty,
+arm_set_abi (const char *args, int from_tty,
             struct cmd_list_element *c)
 {
   int arm_abi;
@@ -8485,7 +8485,7 @@ arm_show_force_mode (struct ui_file *file, int from_tty,
    arm disassembly" command, and does that.  */
 
 static void
-set_disassembly_style_sfunc (char *args, int from_tty,
+set_disassembly_style_sfunc (const char *args, int from_tty,
                             struct cmd_list_element *c)
 {
   /* Convert the short style name into the long style name (eg, reg-names-*)
@@ -10010,13 +10010,13 @@ arm_record_extension_space (insn_decode_record *arm_insn_r)
       && !INSN_RECORDED(arm_insn_r))
     {
       /* Handle MLA(S) and MUL(S).  */
-      if (0 <= insn_op1 && 3 >= insn_op1)
+      if (in_inclusive_range (insn_op1, 0U, 3U))
       {
         record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
         record_buf[1] = ARM_PS_REGNUM;
         arm_insn_r->reg_rec_count = 2;
       }
-      else if (4 <= insn_op1 && 15 >= insn_op1)
+      else if (in_inclusive_range (insn_op1, 4U, 15U))
       {
         /* Handle SMLAL(S), SMULL(S), UMLAL(S), UMULL(S).  */
         record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19);
@@ -11712,14 +11712,14 @@ thumb_record_ld_st_reg_offset (insn_decode_record *thumb_insn_r)
       /* Handle load/store register offset.  */
       uint32_t opB = bits (thumb_insn_r->arm_insn, 9, 11);
 
-      if (opB >= 4 && opB <= 7)
+      if (in_inclusive_range (opB, 4U, 7U))
         {
           /* LDR(2), LDRB(2) , LDRH(2), LDRSB, LDRSH.  */
           reg_src1 = bits (thumb_insn_r->arm_insn,0, 2);
           record_buf[0] = reg_src1;
           thumb_insn_r->reg_rec_count = 1;
         }
-      else if (opB >= 0 && opB <= 2)
+      else if (in_inclusive_range (opB, 0U, 2U))
         {
           /* STR(2), STRB(2), STRH(2) .  */
           reg_src1 = bits (thumb_insn_r->arm_insn, 3, 5);