2011-04-21 Tristan Gingold <gingold@adacore.com>

[deliverable/binutils-gdb.git] / gdb / arm-tdep.h

diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h
index 6e7eab9b447477cec96576025345baef873b469f..fe27c7f1087c5ddf3d2d034545f2b5ad55ee8664 100644 (file)
--- a/gdb/arm-tdep.h
+++ b/gdb/arm-tdep.h
@@ -23,6 +23,7 @@
 /* Forward declarations.  */
 struct gdbarch;
 struct regset;
+struct address_space;
 
 /* Register numbers of various important registers.  */
 
@@ -257,11 +258,21 @@ struct displaced_step_closure
     {
       /* If non-NULL, override generic SVC handling (e.g. for a particular
          OS).  */
-      int (*copy_svc_os) (struct gdbarch *gdbarch, uint32_t insn, CORE_ADDR to,
-                         struct regcache *regs,
+      int (*copy_svc_os) (struct gdbarch *gdbarch, struct regcache *regs,
                          struct displaced_step_closure *dsc);
     } svc;
   } u;
+
+  /* The size of original instruction, 2 or 4.  */
+  unsigned int insn_size;
+  /* True if the original insn (and thus all replacement insns) are Thumb
+     instead of ARM.   */
+  unsigned int is_thumb;
+
+  /* The slots in the array is used in this way below,
+     - ARM instruction occupies one slot,
+     - Thumb 16 bit instruction occupies one slot,
+     - Thumb 32-bit instruction occupies *two* slots, one part for each.  */
   unsigned long modinsn[DISPLACED_MODIFIED_INSNS];
   int numinsns;
   CORE_ADDR insn_addr;
@@ -291,7 +302,8 @@ extern void
   arm_displaced_init_closure (struct gdbarch *gdbarch, CORE_ADDR from,
                              CORE_ADDR to, struct displaced_step_closure *dsc);
 extern ULONGEST
-  displaced_read_reg (struct regcache *regs, CORE_ADDR from, int regno);
+  displaced_read_reg (struct regcache *regs, struct displaced_step_closure *dsc,
+                     int regno);
 extern void
   displaced_write_reg (struct regcache *regs,
                       struct displaced_step_closure *dsc, int regno,
@@ -299,6 +311,8 @@ extern void
 
 CORE_ADDR arm_skip_stub (struct frame_info *, CORE_ADDR);
 CORE_ADDR arm_get_next_pc (struct frame_info *, CORE_ADDR);
+void arm_insert_single_step_breakpoint (struct gdbarch *,
+                                       struct address_space *, CORE_ADDR);
 int arm_software_single_step (struct frame_info *);
 int arm_frame_is_thumb (struct frame_info *frame);
 
@@ -309,6 +323,13 @@ extern void arm_displaced_step_fixup (struct gdbarch *,
                                      struct displaced_step_closure *,
                                      CORE_ADDR, CORE_ADDR, struct regcache *);
 
+/* Return the bit mask in ARM_PS_REGNUM that indicates Thumb mode.  */
+extern int arm_psr_thumb_bit (struct gdbarch *);
+
+/* Is the instruction at the given memory address a Thumb or ARM
+   instruction?  */
+extern int arm_pc_is_thumb (struct gdbarch *, CORE_ADDR);
+
 /* Functions exported from armbsd-tdep.h.  */
 
 /* Return the appropriate register set for the core section identified