#ifndef TM_ARMLINUX_H
#define TM_ARMLINUX_H
+#ifdef GDBSERVER
+#define ARM_GNULINUX_TARGET
+#endif
+
/* Include the common ARM target definitions. */
#include "arm/tm-arm.h"
#include "tm-linux.h"
-/* Target byte order on ARM Linux is little endian and not selectable. */
-#undef TARGET_BYTE_ORDER_SELECTABLE_P
-#define TARGET_BYTE_ORDER_SELECTABLE_P 0
+/* Use target-specific function to define link map offsets. */
+extern struct link_map_offsets *arm_linux_svr4_fetch_link_map_offsets (void);
+#define SVR4_FETCH_LINK_MAP_OFFSETS() arm_linux_svr4_fetch_link_map_offsets ()
/* Under ARM Linux the traditional way of performing a breakpoint is to
execute a particular software interrupt, rather than use a particular
#define IN_SOLIB_DYNSYM_RESOLVE_CODE in_svr4_dynsym_resolve_code */
#endif
+/* When the ARM Linux kernel invokes a signal handler, the return
+ address points at a special instruction which'll trap back into
+ the kernel. These definitions are used to identify this bit of
+ code as a signal trampoline in order to support backtracing
+ through calls to signal handlers. */
+
+int arm_linux_in_sigtramp (CORE_ADDR pc, char *name);
+#define IN_SIGTRAMP(pc, name) arm_linux_in_sigtramp (pc, name)
+
+/* Each OS has different mechanisms for accessing the various
+ registers stored in the sigcontext structure. These definitions
+ provide a mechanism by which the generic code in arm-tdep.c can
+ find the addresses at which various registers are saved at in the
+ sigcontext structure. If SIGCONTEXT_REGISTER_ADDRESS is not
+ defined, arm-tdep.c will define it to be 0. (See ia64-tdep.c and
+ ia64-linux-tdep.c to see what a similar mechanism looks like when
+ multi-arched.) */
+
+extern CORE_ADDR arm_linux_sigcontext_register_address (CORE_ADDR, CORE_ADDR,
+ int);
+#define SIGCONTEXT_REGISTER_ADDRESS arm_linux_sigcontext_register_address
+
#endif /* TM_ARMLINUX_H */