* gdb-stabs.h (SECT_OFF_MAX): Increase to 64.

[deliverable/binutils-gdb.git] / gdb / d10v-tdep.c

diff --git a/gdb/d10v-tdep.c b/gdb/d10v-tdep.c
index 20e146f3b1cb69a214cb0ec4c80a6fe03072b2f3..171ff387a361201260c8e09909dde711a4482b29 100644 (file)
--- a/gdb/d10v-tdep.c
+++ b/gdb/d10v-tdep.c
@@ -55,7 +55,6 @@ struct gdbarch_tdep
     int nr_dmap_regs;
     unsigned long (*dmap_register) (int nr);
     unsigned long (*imap_register) (int nr);
-    int (*register_sim_regno) (int nr);
   };
 
 /* These are the addresses the D10V-EVA board maps data and
@@ -100,9 +99,7 @@ extern void d10v_frame_init_saved_regs (struct frame_info *);
 static void do_d10v_pop_frame (struct frame_info *fi);
 
 int
-d10v_frame_chain_valid (chain, frame)
-     CORE_ADDR chain;
-     struct frame_info *frame; /* not used here */
+d10v_frame_chain_valid (CORE_ADDR chain, struct frame_info *frame)
 {
   return ((chain) != 0 && (frame) != 0 && (frame)->pc > IMEM_START);
 }
@@ -194,7 +191,7 @@ d10v_ts3_register_name (int reg_nr)
   return register_names[reg_nr];
 }
 
-/* Access the DMAP/IMAP registers in a target independant way. */
+/* Access the DMAP/IMAP registers in a target independent way. */
 
 static unsigned long
 d10v_ts2_dmap_register (int reg_nr)
@@ -274,12 +271,6 @@ d10v_ts3_register_sim_regno (int nr)
   return nr;
 }
 
-int
-d10v_register_sim_regno (int nr)
-{
-  return gdbarch_tdep (current_gdbarch)->register_sim_regno (nr);
-}
-
 /* Index within `registers' of the first byte of the space for
    register REG_NR.  */
 
@@ -1099,10 +1090,8 @@ d10v_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
    extract and copy its value into `valbuf'.  */
 
 void
-d10v_extract_return_value (type, regbuf, valbuf)
-     struct type *type;
-     char regbuf[REGISTER_BYTES];
-     char *valbuf;
+d10v_extract_return_value (struct type *type, char regbuf[REGISTER_BYTES],
+                          char *valbuf)
 {
   int len;
   /*    printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM)));  */
@@ -1467,6 +1456,7 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   int d10v_num_regs;
   struct gdbarch_tdep *tdep;
   gdbarch_register_name_ftype *d10v_register_name;
+  gdbarch_register_sim_regno_ftype *d10v_register_sim_regno;
 
   /* Find a candidate among the list of pre-declared architectures. */
   arches = gdbarch_list_lookup_by_info (arches, &info);
@@ -1483,9 +1473,9 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
     case bfd_mach_d10v_ts2:
       d10v_num_regs = 37;
       d10v_register_name = d10v_ts2_register_name;
+      d10v_register_sim_regno = d10v_ts2_register_sim_regno;
       tdep->a0_regnum = TS2_A0_REGNUM;
       tdep->nr_dmap_regs = TS2_NR_DMAP_REGS;
-      tdep->register_sim_regno = d10v_ts2_register_sim_regno;
       tdep->dmap_register = d10v_ts2_dmap_register;
       tdep->imap_register = d10v_ts2_imap_register;
       break;
@@ -1493,9 +1483,9 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
     case bfd_mach_d10v_ts3:
       d10v_num_regs = 42;
       d10v_register_name = d10v_ts3_register_name;
+      d10v_register_sim_regno = d10v_ts3_register_sim_regno;
       tdep->a0_regnum = TS3_A0_REGNUM;
       tdep->nr_dmap_regs = TS3_NR_DMAP_REGS;
-      tdep->register_sim_regno = d10v_ts3_register_sim_regno;
       tdep->dmap_register = d10v_ts3_dmap_register;
       tdep->imap_register = d10v_ts3_imap_register;
       break;
@@ -1608,6 +1598,9 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
   set_gdbarch_stack_align (gdbarch, d10v_stack_align);
 
+  set_gdbarch_register_sim_regno (gdbarch, d10v_register_sim_regno);
+  set_gdbarch_extra_stack_alignment_needed (gdbarch, 0);
+
   return gdbarch;
 }