int nr_dmap_regs;
unsigned long (*dmap_register) (int nr);
unsigned long (*imap_register) (int nr);
- int (*register_sim_regno) (int nr);
};
/* These are the addresses the D10V-EVA board maps data and
static void do_d10v_pop_frame (struct frame_info *fi);
int
-d10v_frame_chain_valid (chain, frame)
- CORE_ADDR chain;
- struct frame_info *frame; /* not used here */
+d10v_frame_chain_valid (CORE_ADDR chain, struct frame_info *frame)
{
return ((chain) != 0 && (frame) != 0 && (frame)->pc > IMEM_START);
}
registers. */
int
-d10v_use_struct_convention (gcc_p, type)
- int gcc_p;
- struct type *type;
+d10v_use_struct_convention (int gcc_p, struct type *type)
{
return (TYPE_LENGTH (type) > 8);
}
unsigned char *
-d10v_breakpoint_from_pc (pcptr, lenptr)
- CORE_ADDR *pcptr;
- int *lenptr;
+d10v_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
{
static unsigned char breakpoint[] =
{0x2f, 0x90, 0x5e, 0x00};
return register_names[reg_nr];
}
-/* Access the DMAP/IMAP registers in a target independant way. */
+/* Access the DMAP/IMAP registers in a target independent way. */
static unsigned long
d10v_ts2_dmap_register (int reg_nr)
return nr;
}
-int
-d10v_register_sim_regno (int nr)
-{
- return gdbarch_tdep (current_gdbarch)->register_sim_regno (nr);
-}
-
/* Index within `registers' of the first byte of the space for
register REG_NR. */
int
-d10v_register_byte (reg_nr)
- int reg_nr;
+d10v_register_byte (int reg_nr)
{
if (reg_nr < A0_REGNUM)
return (reg_nr * 2);
register REG_NR. */
int
-d10v_register_raw_size (reg_nr)
- int reg_nr;
+d10v_register_raw_size (int reg_nr)
{
if (reg_nr < A0_REGNUM)
return 2;
for register N. */
int
-d10v_register_virtual_size (reg_nr)
- int reg_nr;
+d10v_register_virtual_size (int reg_nr)
{
return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (reg_nr));
}
of data in register N. */
struct type *
-d10v_register_virtual_type (reg_nr)
- int reg_nr;
+d10v_register_virtual_type (int reg_nr)
{
if (reg_nr >= A0_REGNUM
&& reg_nr < (A0_REGNUM + NR_A_REGS))
/* convert $pc and $sp to/from virtual addresses */
int
-d10v_register_convertible (nr)
- int nr;
+d10v_register_convertible (int nr)
{
return ((nr) == PC_REGNUM || (nr) == SP_REGNUM);
}
void
-d10v_register_convert_to_virtual (regnum, type, from, to)
- int regnum;
- struct type *type;
- char *from;
- char *to;
+d10v_register_convert_to_virtual (int regnum, struct type *type, char *from,
+ char *to)
{
ULONGEST x = extract_unsigned_integer (from, REGISTER_RAW_SIZE (regnum));
if (regnum == PC_REGNUM)
}
void
-d10v_register_convert_to_raw (type, regnum, from, to)
- struct type *type;
- int regnum;
- char *from;
- char *to;
+d10v_register_convert_to_raw (struct type *type, int regnum, char *from,
+ char *to)
{
ULONGEST x = extract_unsigned_integer (from, TYPE_LENGTH (type));
x &= 0x3ffff;
CORE_ADDR
-d10v_make_daddr (x)
- CORE_ADDR x;
+d10v_make_daddr (CORE_ADDR x)
{
return ((x) | DMEM_START);
}
CORE_ADDR
-d10v_make_iaddr (x)
- CORE_ADDR x;
+d10v_make_iaddr (CORE_ADDR x)
{
return (((x) << 2) | IMEM_START);
}
int
-d10v_daddr_p (x)
- CORE_ADDR x;
+d10v_daddr_p (CORE_ADDR x)
{
return (((x) & 0x3000000) == DMEM_START);
}
int
-d10v_iaddr_p (x)
- CORE_ADDR x;
+d10v_iaddr_p (CORE_ADDR x)
{
return (((x) & 0x3000000) == IMEM_START);
}
CORE_ADDR
-d10v_convert_iaddr_to_raw (x)
- CORE_ADDR x;
+d10v_convert_iaddr_to_raw (CORE_ADDR x)
{
return (((x) >> 2) & 0xffff);
}
CORE_ADDR
-d10v_convert_daddr_to_raw (x)
- CORE_ADDR x;
+d10v_convert_daddr_to_raw (CORE_ADDR x)
{
return ((x) & 0xffff);
}
register. */
void
-d10v_store_struct_return (addr, sp)
- CORE_ADDR addr;
- CORE_ADDR sp;
+d10v_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
{
write_register (ARG1_REGNUM, (addr));
}
Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
void
-d10v_store_return_value (type, valbuf)
- struct type *type;
- char *valbuf;
+d10v_store_return_value (struct type *type, char *valbuf)
{
write_register_bytes (REGISTER_BYTE (RET1_REGNUM),
valbuf,
as a CORE_ADDR (or an expression that can be used as one). */
CORE_ADDR
-d10v_extract_struct_value_address (regbuf)
- char *regbuf;
+d10v_extract_struct_value_address (char *regbuf)
{
return (extract_address ((regbuf) + REGISTER_BYTE (ARG1_REGNUM),
REGISTER_RAW_SIZE (ARG1_REGNUM))
}
CORE_ADDR
-d10v_frame_saved_pc (frame)
- struct frame_info *frame;
+d10v_frame_saved_pc (struct frame_info *frame)
{
return ((frame)->extra_info->return_pc);
}
CORE_ADDR
-d10v_frame_args_address (fi)
- struct frame_info *fi;
+d10v_frame_args_address (struct frame_info *fi)
{
return (fi)->frame;
}
CORE_ADDR
-d10v_frame_locals_address (fi)
- struct frame_info *fi;
+d10v_frame_locals_address (struct frame_info *fi)
{
return (fi)->frame;
}
the stack and that may not be written yet. */
CORE_ADDR
-d10v_saved_pc_after_call (frame)
- struct frame_info *frame;
+d10v_saved_pc_after_call (struct frame_info *frame)
{
return ((read_register (LR_REGNUM) << 2)
| IMEM_START);
registers. */
void
-d10v_pop_frame ()
+d10v_pop_frame (void)
{
generic_pop_current_frame (do_d10v_pop_frame);
}
static void
-do_d10v_pop_frame (fi)
- struct frame_info *fi;
+do_d10v_pop_frame (struct frame_info *fi)
{
CORE_ADDR fp;
int regnum;
}
static int
-check_prologue (op)
- unsigned short op;
+check_prologue (unsigned short op)
{
/* st rn, @-sp */
if ((op & 0x7E1F) == 0x6C1F)
}
CORE_ADDR
-d10v_skip_prologue (pc)
- CORE_ADDR pc;
+d10v_skip_prologue (CORE_ADDR pc)
{
unsigned long op;
unsigned short op1, op2;
*/
CORE_ADDR
-d10v_frame_chain (fi)
- struct frame_info *fi;
+d10v_frame_chain (struct frame_info *fi)
{
d10v_frame_init_saved_regs (fi);
static int next_addr, uses_frame;
static int
-prologue_find_regs (op, fi, addr)
- unsigned short op;
- struct frame_info *fi;
- CORE_ADDR addr;
+prologue_find_regs (unsigned short op, struct frame_info *fi, CORE_ADDR addr)
{
int n;
for it IS the sp for the next frame. */
void
-d10v_frame_init_saved_regs (fi)
- struct frame_info *fi;
+d10v_frame_init_saved_regs (struct frame_info *fi)
{
CORE_ADDR fp, pc;
unsigned long op;
}
void
-d10v_init_extra_frame_info (fromleaf, fi)
- int fromleaf;
- struct frame_info *fi;
+d10v_init_extra_frame_info (int fromleaf, struct frame_info *fi)
{
fi->extra_info = (struct frame_extra_info *)
frame_obstack_alloc (sizeof (struct frame_extra_info));
}
static void
-show_regs (args, from_tty)
- char *args;
- int from_tty;
+show_regs (char *args, int from_tty)
{
int a;
printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
}
CORE_ADDR
-d10v_read_pc (pid)
- int pid;
+d10v_read_pc (int pid)
{
int save_pid;
CORE_ADDR pc;
}
void
-d10v_write_pc (val, pid)
- CORE_ADDR val;
- int pid;
+d10v_write_pc (CORE_ADDR val, int pid)
{
int save_pid;
}
CORE_ADDR
-d10v_read_sp ()
+d10v_read_sp (void)
{
return (D10V_MAKE_DADDR (read_register (SP_REGNUM)));
}
void
-d10v_write_sp (val)
- CORE_ADDR val;
+d10v_write_sp (CORE_ADDR val)
{
write_register (SP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val));
}
void
-d10v_write_fp (val)
- CORE_ADDR val;
+d10v_write_fp (CORE_ADDR val)
{
write_register (FP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val));
}
CORE_ADDR
-d10v_read_fp ()
+d10v_read_fp (void)
{
return (D10V_MAKE_DADDR (read_register (FP_REGNUM)));
}
Needed for targets where we don't actually execute a JSR/BSR instruction */
CORE_ADDR
-d10v_push_return_address (pc, sp)
- CORE_ADDR pc;
- CORE_ADDR sp;
+d10v_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
{
write_register (LR_REGNUM, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ()));
return sp;
static struct stack_item *push_stack_item (struct stack_item *prev,
void *contents, int len);
static struct stack_item *
-push_stack_item (prev, contents, len)
- struct stack_item *prev;
- void *contents;
- int len;
+push_stack_item (struct stack_item *prev, void *contents, int len)
{
struct stack_item *si;
si = xmalloc (sizeof (struct stack_item));
static struct stack_item *pop_stack_item (struct stack_item *si);
static struct stack_item *
-pop_stack_item (si)
- struct stack_item *si;
+pop_stack_item (struct stack_item *si)
{
struct stack_item *dead = si;
si = si->prev;
CORE_ADDR
-d10v_push_arguments (nargs, args, sp, struct_return, struct_addr)
- int nargs;
- value_ptr *args;
- CORE_ADDR sp;
- int struct_return;
- CORE_ADDR struct_addr;
+d10v_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
+ int struct_return, CORE_ADDR struct_addr)
{
int i;
int regnum = ARG1_REGNUM;
extract and copy its value into `valbuf'. */
void
-d10v_extract_return_value (type, regbuf, valbuf)
- struct type *type;
- char regbuf[REGISTER_BYTES];
- char *valbuf;
+d10v_extract_return_value (struct type *type, char regbuf[REGISTER_BYTES],
+ char *valbuf)
{
int len;
/* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */
trace_data;
static void
-trace_command (args, from_tty)
- char *args;
- int from_tty;
+trace_command (char *args, int from_tty)
{
/* Clear the host-side trace buffer, allocating space if needed. */
trace_data.size = 0;
}
static void
-untrace_command (args, from_tty)
- char *args;
- int from_tty;
+untrace_command (char *args, int from_tty)
{
tracing = 0;
}
static void
-trace_info (args, from_tty)
- char *args;
- int from_tty;
+trace_info (char *args, int from_tty)
{
int i;
on STREAM. Returns length of the instruction, in bytes. */
static int
-print_insn (memaddr, stream)
- CORE_ADDR memaddr;
- struct ui_file *stream;
+print_insn (CORE_ADDR memaddr, struct ui_file *stream)
{
/* If there's no disassembler, something is very wrong. */
if (tm_print_insn == NULL)
}
static void
-d10v_eva_prepare_to_trace ()
+d10v_eva_prepare_to_trace (void)
{
if (!tracing)
return;
more useful for display. */
static void
-d10v_eva_get_trace_data ()
+d10v_eva_get_trace_data (void)
{
int count, i, j, oldsize;
int trace_addr, trace_seg, trace_cnt, next_cnt;
}
static void
-tdisassemble_command (arg, from_tty)
- char *arg;
- int from_tty;
+tdisassemble_command (char *arg, int from_tty)
{
int i, count;
CORE_ADDR low, high;
}
static void
-display_trace (low, high)
- int low, high;
+display_trace (int low, int high)
{
int i, count, trace_show_source, first, suppress;
CORE_ADDR next_address;
static gdbarch_init_ftype d10v_gdbarch_init;
static struct gdbarch *
-d10v_gdbarch_init (info, arches)
- struct gdbarch_info info;
- struct gdbarch_list *arches;
+d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
static LONGEST d10v_call_dummy_words[] =
{0};
int d10v_num_regs;
struct gdbarch_tdep *tdep;
gdbarch_register_name_ftype *d10v_register_name;
+ gdbarch_register_sim_regno_ftype *d10v_register_sim_regno;
/* Find a candidate among the list of pre-declared architectures. */
arches = gdbarch_list_lookup_by_info (arches, &info);
case bfd_mach_d10v_ts2:
d10v_num_regs = 37;
d10v_register_name = d10v_ts2_register_name;
+ d10v_register_sim_regno = d10v_ts2_register_sim_regno;
tdep->a0_regnum = TS2_A0_REGNUM;
tdep->nr_dmap_regs = TS2_NR_DMAP_REGS;
- tdep->register_sim_regno = d10v_ts2_register_sim_regno;
tdep->dmap_register = d10v_ts2_dmap_register;
tdep->imap_register = d10v_ts2_imap_register;
break;
case bfd_mach_d10v_ts3:
d10v_num_regs = 42;
d10v_register_name = d10v_ts3_register_name;
+ d10v_register_sim_regno = d10v_ts3_register_sim_regno;
tdep->a0_regnum = TS3_A0_REGNUM;
tdep->nr_dmap_regs = TS3_NR_DMAP_REGS;
- tdep->register_sim_regno = d10v_ts3_register_sim_regno;
tdep->dmap_register = d10v_ts3_dmap_register;
tdep->imap_register = d10v_ts3_imap_register;
break;
set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
set_gdbarch_stack_align (gdbarch, d10v_stack_align);
+ set_gdbarch_register_sim_regno (gdbarch, d10v_register_sim_regno);
+ set_gdbarch_extra_stack_alignment_needed (gdbarch, 0);
+
return gdbarch;
}
extern void (*target_wait_loop_hook) (void);
void
-_initialize_d10v_tdep ()
+_initialize_d10v_tdep (void)
{
register_gdbarch_init (bfd_arch_d10v, d10v_gdbarch_init);
projects / deliverable / binutils-gdb.git / blobdiff