Sync config.sub,config.guess with upstream.

[deliverable/binutils-gdb.git] / gdb / gdbarch.sh

diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh
index e410e657bb202350d1f0570a9fe9419e4a573239..ae7dd97c53164fb5bdf2ab50f1b6dc0f99afad3a 100755 (executable)
--- a/gdb/gdbarch.sh
+++ b/gdb/gdbarch.sh
@@ -559,7 +559,7 @@ M:CORE_ADDR:skip_main_prologue:CORE_ADDR ip:ip
 M:CORE_ADDR:skip_entrypoint:CORE_ADDR ip:ip
 
 f:int:inner_than:CORE_ADDR lhs, CORE_ADDR rhs:lhs, rhs:0:0
-m:const gdb_byte *:breakpoint_from_pc:CORE_ADDR *pcptr, int *lenptr:pcptr, lenptr::0:
+m:const gdb_byte *:breakpoint_from_pc:CORE_ADDR *pcptr, int *lenptr:pcptr, lenptr:0:default_breakpoint_from_pc::0
 
 # Return the breakpoint kind for this target based on *PCPTR.
 m:int:breakpoint_kind_from_pc:CORE_ADDR *pcptr:pcptr::0:
@@ -569,6 +569,11 @@ m:int:breakpoint_kind_from_pc:CORE_ADDR *pcptr:pcptr::0:
 # SIZE is set to the software breakpoint's length in memory.
 m:const gdb_byte *:sw_breakpoint_from_kind:int kind, int *size:kind, size::NULL::0
 
+# Return the breakpoint kind for this target based on the current
+# processor state (e.g. the current instruction mode on ARM) and the
+# *PCPTR.  In default, it is gdbarch->breakpoint_kind_from_pc.
+m:int:breakpoint_kind_from_current_state:struct regcache *regcache, CORE_ADDR *pcptr:regcache, pcptr:0:default_breakpoint_kind_from_current_state::0
+
 M:CORE_ADDR:adjust_breakpoint_address:CORE_ADDR bpaddr:bpaddr
 m:int:memory_insert_breakpoint:struct bp_target_info *bp_tgt:bp_tgt:0:default_memory_insert_breakpoint::0
 m:int:memory_remove_breakpoint:struct bp_target_info *bp_tgt:bp_tgt:0:default_memory_remove_breakpoint::0