/* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
- Copyright (C) 1995-2015 Free Software Foundation, Inc.
+ Copyright (C) 1995-2018 Free Software Foundation, Inc.
This file is part of GDB.
#include "server.h"
#include "linux-low.h"
#include "arch/arm.h"
+#include "arch/arm-linux.h"
+#include "arch/arm-get-next-pcs.h"
#include "linux-aarch32-low.h"
#include <sys/uio.h>
#endif
#include "nat/gdb_ptrace.h"
#include <signal.h>
+#include <sys/syscall.h>
/* Defined in auto-generated files. */
void init_registers_arm (void);
64
};
+/* Forward declarations needed for get_next_pcs ops. */
+static ULONGEST get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
+ int len,
+ int byte_order);
+
+static CORE_ADDR get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self,
+ CORE_ADDR val);
+
+static CORE_ADDR get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self);
+
+static int get_next_pcs_is_thumb (struct arm_get_next_pcs *self);
+
+/* get_next_pcs operations. */
+static struct arm_get_next_pcs_ops get_next_pcs_ops = {
+ get_next_pcs_read_memory_unsigned_integer,
+ get_next_pcs_syscall_next_pc,
+ get_next_pcs_addr_bits_remove,
+ get_next_pcs_is_thumb,
+ arm_linux_get_next_pcs_fixup,
+};
+
static int
arm_cannot_store_register (int regno)
{
arm_fill_vfpregset_num (regcache, buf, num);
}
+/* Wrapper of UNMAKE_THUMB_ADDR for get_next_pcs. */
+static CORE_ADDR
+get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self, CORE_ADDR val)
+{
+ return UNMAKE_THUMB_ADDR (val);
+}
+
static void
arm_store_vfpregset (struct regcache *regcache, const void *buf)
{
arm_store_vfpregset_num (regcache, buf, num);
}
-extern int debug_threads;
-
-static CORE_ADDR
-arm_get_pc (struct regcache *regcache)
+/* Wrapper of arm_is_thumb_mode for get_next_pcs. */
+static int
+get_next_pcs_is_thumb (struct arm_get_next_pcs *self)
{
- unsigned long pc;
- collect_register_by_name (regcache, "pc", &pc);
- if (debug_threads)
- debug_printf ("stop pc is %08lx\n", pc);
- return pc;
+ return arm_is_thumb_mode ();
}
-static void
-arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
+/* Read memory from the inferiror.
+ BYTE_ORDER is ignored and there to keep compatiblity with GDB's
+ read_memory_unsigned_integer. */
+static ULONGEST
+get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
+ int len,
+ int byte_order)
{
- unsigned long newpc = pc;
- supply_register_by_name (regcache, "pc", &newpc);
+ ULONGEST res;
+
+ res = 0;
+ target_read_memory (memaddr, (unsigned char *) &res, len);
+
+ return res;
}
/* Fetch the thread-local storage pointer for libthread_db. */
ps_err_e
-ps_get_thread_area (const struct ps_prochandle *ph,
+ps_get_thread_area (struct ps_prochandle *ph,
lwpid_t lwpid, int idx, void **base)
{
if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
/* Callback to mark a watch-/breakpoint to be updated in all threads of
the current process. */
-struct update_registers_data
-{
- int watch;
- int i;
-};
-
-static int
-update_registers_callback (struct inferior_list_entry *entry, void *arg)
+static void
+update_registers_callback (thread_info *thread, int watch, int i)
{
- struct thread_info *thread = (struct thread_info *) entry;
struct lwp_info *lwp = get_thread_lwp (thread);
- struct update_registers_data *data = (struct update_registers_data *) arg;
- /* Only update the threads of the current process. */
- if (pid_of (thread) == pid_of (current_thread))
- {
- /* The actual update is done later just before resuming the lwp,
- we just mark that the registers need updating. */
- if (data->watch)
- lwp->arch_private->wpts_changed[data->i] = 1;
- else
- lwp->arch_private->bpts_changed[data->i] = 1;
-
- /* If the lwp isn't stopped, force it to momentarily pause, so
- we can update its breakpoint registers. */
- if (!lwp->stopped)
- linux_stop_lwp (lwp);
- }
+ /* The actual update is done later just before resuming the lwp,
+ we just mark that the registers need updating. */
+ if (watch)
+ lwp->arch_private->wpts_changed[i] = 1;
+ else
+ lwp->arch_private->bpts_changed[i] = 1;
- return 0;
+ /* If the lwp isn't stopped, force it to momentarily pause, so
+ we can update its breakpoint registers. */
+ if (!lwp->stopped)
+ linux_stop_lwp (lwp);
}
static int
for (i = 0; i < count; i++)
if (!arm_hwbp_control_is_enabled (pts[i].control))
{
- struct update_registers_data data = { watch, i };
pts[i] = p;
- find_inferior (&all_threads, update_registers_callback, &data);
+
+ /* Only update the threads of the current process. */
+ for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
+ {
+ update_registers_callback (thread, watch, i);
+ });
+
return 0;
}
for (i = 0; i < count; i++)
if (arm_linux_hw_breakpoint_equal (&p, pts + i))
{
- struct update_registers_data data = { watch, i };
pts[i].control = arm_hwbp_control_disable (pts[i].control);
- find_inferior (&all_threads, update_registers_callback, &data);
+
+ /* Only update the threads of the current process. */
+ for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
+ {
+ update_registers_callback (thread, watch, i);
+ });
+
return 0;
}
return info;
}
+/* Called when a process is being deleted. */
+
+static void
+arm_delete_process (struct arch_process_info *info)
+{
+ xfree (info);
+}
+
/* Called when a new thread is detected. */
static void
arm_new_thread (struct lwp_info *lwp)
lwp->arch_private = info;
}
+/* Function to call when a thread is being deleted. */
+
+static void
+arm_delete_thread (struct arch_lwp_info *arch_lwp)
+{
+ xfree (arch_lwp);
+}
+
static void
arm_new_fork (struct process_info *parent, struct process_info *child)
{
/* Mark all the hardware breakpoints and watchpoints as changed to
make sure that the registers will be updated. */
- child_lwp = find_lwp_pid (ptid_of (child));
+ child_lwp = find_lwp_pid (ptid_t (child->pid));
child_lwp_info = child_lwp->arch_private;
for (i = 0; i < MAX_BPTS; i++)
child_lwp_info->bpts_changed[i] = 1;
}
}
+/* Find the next pc for a sigreturn or rt_sigreturn syscall. In
+ addition, set IS_THUMB depending on whether we will return to ARM
+ or Thumb code.
+ See arm-linux.h for stack layout details. */
+static CORE_ADDR
+arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
+ int *is_thumb)
+{
+ unsigned long sp;
+ unsigned long sp_data;
+ /* Offset of PC register. */
+ int pc_offset = 0;
+ CORE_ADDR next_pc = 0;
+ uint32_t cpsr;
+
+ gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);
+
+ collect_register_by_name (regcache, "sp", &sp);
+ (*the_target->read_memory) (sp, (unsigned char *) &sp_data, 4);
+
+ pc_offset = arm_linux_sigreturn_next_pc_offset
+ (sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0);
+
+ (*the_target->read_memory) (sp + pc_offset, (unsigned char *) &next_pc, 4);
+
+ /* Set IS_THUMB according the CPSR saved on the stack. */
+ (*the_target->read_memory) (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
+ *is_thumb = ((cpsr & CPSR_T) != 0);
+
+ return next_pc;
+}
+
+/* When PC is at a syscall instruction, return the PC of the next
+ instruction to be executed. */
+static CORE_ADDR
+get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self)
+{
+ CORE_ADDR next_pc = 0;
+ CORE_ADDR pc = regcache_read_pc (self->regcache);
+ int is_thumb = arm_is_thumb_mode ();
+ ULONGEST svc_number = 0;
+ struct regcache *regcache = self->regcache;
+
+ if (is_thumb)
+ {
+ collect_register (regcache, 7, &svc_number);
+ next_pc = pc + 2;
+ }
+ else
+ {
+ unsigned long this_instr;
+ unsigned long svc_operand;
+
+ target_read_memory (pc, (unsigned char *) &this_instr, 4);
+ svc_operand = (0x00ffffff & this_instr);
+
+ if (svc_operand) /* OABI. */
+ {
+ svc_number = svc_operand - 0x900000;
+ }
+ else /* EABI. */
+ {
+ collect_register (regcache, 7, &svc_number);
+ }
+
+ next_pc = pc + 4;
+ }
+
+ /* This is a sigreturn or sigreturn_rt syscall. */
+ if (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn)
+ {
+ /* SIGRETURN or RT_SIGRETURN may affect the arm thumb mode, so
+ update IS_THUMB. */
+ next_pc = arm_sigreturn_next_pc (regcache, svc_number, &is_thumb);
+ }
+
+ /* Addresses for calling Thumb functions have the bit 0 set. */
+ if (is_thumb)
+ next_pc = MAKE_THUMB_ADDR (next_pc);
+
+ return next_pc;
+}
static int
arm_get_hwcap (unsigned long *valp)
have_ptrace_getregset = 0;
}
+/* Fetch the next possible PCs after the current instruction executes. */
+
+static std::vector<CORE_ADDR>
+arm_gdbserver_get_next_pcs (struct regcache *regcache)
+{
+ struct arm_get_next_pcs next_pcs_ctx;
+
+ arm_get_next_pcs_ctor (&next_pcs_ctx,
+ &get_next_pcs_ops,
+ /* Byte order is ignored assumed as host. */
+ 0,
+ 0,
+ 1,
+ regcache);
+
+ return arm_get_next_pcs (&next_pcs_ctx);
+}
+
/* Support for hardware single step. */
static int
return 0;
}
+/* Implementation of linux_target_ops method "get_syscall_trapinfo". */
+
+static void
+arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
+{
+ if (arm_is_thumb_mode ())
+ collect_register_by_name (regcache, "r7", sysno);
+ else
+ {
+ unsigned long pc;
+ unsigned long insn;
+
+ collect_register_by_name (regcache, "pc", &pc);
+
+ if ((*the_target->read_memory) (pc - 4, (unsigned char *) &insn, 4))
+ *sysno = UNKNOWN_SYSCALL;
+ else
+ {
+ unsigned long svc_operand = (0x00ffffff & insn);
+
+ if (svc_operand)
+ {
+ /* OABI */
+ *sysno = svc_operand - 0x900000;
+ }
+ else
+ {
+ /* EABI */
+ collect_register_by_name (regcache, "r7", sysno);
+ }
+ }
+ }
+}
+
/* Register sets without using PTRACE_GETREGSET. */
static struct regset_info arm_regsets[] = {
arm_cannot_fetch_register,
arm_cannot_store_register,
NULL, /* fetch_register */
- arm_get_pc,
- arm_set_pc,
+ linux_get_pc_32bit,
+ linux_set_pc_32bit,
arm_breakpoint_kind_from_pc,
arm_sw_breakpoint_from_kind,
- NULL, /* get_next_pcs */
+ arm_gdbserver_get_next_pcs,
0,
arm_breakpoint_at,
arm_supports_z_point_type,
NULL, /* supply_ptrace_register */
NULL, /* siginfo_fixup */
arm_new_process,
+ arm_delete_process,
arm_new_thread,
+ arm_delete_thread,
arm_new_fork,
arm_prepare_to_resume,
NULL, /* process_qsupported */
NULL, /* get_min_fast_tracepoint_insn_len */
NULL, /* supports_range_stepping */
arm_breakpoint_kind_from_current_state,
- arm_supports_hardware_single_step
+ arm_supports_hardware_single_step,
+ arm_get_syscall_trapinfo,
};
void
projects / deliverable / binutils-gdb.git / blobdiff