/* Target-dependent code for the HP PA architecture, for GDB.
- Copyright 1986, 87, 89, 90, 91, 92, 93, 94, 95, 96, 1999
- Free Software Foundation, Inc.
+ Copyright 1986, 1987, 1989-1996, 1999-2000 Free Software Foundation, Inc.
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu).
#include "symfile.h"
#include "objfiles.h"
-/* To support asking "What CPU is this?" */
-#include <unistd.h>
-
/* To support detection of the pseudo-initial frame
that threads have. */
#define THREAD_INITIAL_FRAME_SYMBOL "__pthread_exit"
asection *, unsigned int,
unsigned int, CORE_ADDR));
static void pa_print_registers PARAMS ((char *, int, int));
-static void pa_strcat_registers PARAMS ((char *, int, int, GDB_FILE *));
+static void pa_strcat_registers (char *, int, int, struct ui_file *);
static void pa_register_look_aside PARAMS ((char *, int, long *));
static void pa_print_fp_reg PARAMS ((int));
-static void pa_strcat_fp_reg PARAMS ((int, GDB_FILE *, enum precision_type));
+static void pa_strcat_fp_reg (int, struct ui_file *, enum precision_type);
+static void record_text_segment_lowaddr PARAMS ((bfd *, asection *, void *));
typedef struct
{
struct minimal_symbol *msym;
CORE_ADDR solib_handle;
+ CORE_ADDR return_val;
}
args_for_find_stub;
-static CORE_ADDR cover_find_stub_with_shl_get PARAMS ((args_for_find_stub *));
+static int cover_find_stub_with_shl_get (PTR);
static int is_pa_2 = 0; /* False */
int gcc_p;
struct type *type;
{
- return (TYPE_LENGTH (type) > 8);
+ return (TYPE_LENGTH (type) > 2 * REGISTER_SIZE);
}
\f
/* extract the immediate field from a ld{bhw}s instruction */
-#if 0
-
-unsigned
-get_field (val, from, to)
- unsigned val, from, to;
-{
- val = val >> 31 - to;
- return val & ((1 << 32 - from) - 1);
-}
-
-unsigned
-set_field (val, from, to, new_val)
- unsigned *val, from, to;
-{
- unsigned mask = ~((1 << (to - from + 1)) << (31 - from));
- return *val = *val & mask | (new_val << (31 - from));
-}
-
-/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
-
-int
-extract_3 (word)
- unsigned word;
-{
- return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
-}
-
-#endif
-
static int
extract_5_load (word)
unsigned word;
return low_sign_extend (word >> 16 & MASK_5, 5);
}
-#if 0
-
-/* extract the immediate field from a st{bhw}s instruction */
-
-int
-extract_5_store (word)
- unsigned word;
-{
- return low_sign_extend (word & MASK_5, 5);
-}
-
-#endif /* 0 */
-
/* extract the immediate field from a break instruction */
static unsigned
return (word >> 16 & MASK_5);
}
-/* extract an 11 bit immediate field */
-
-#if 0
-
-int
-extract_11 (word)
- unsigned word;
-{
- return low_sign_extend (word & MASK_11, 11);
-}
-
-#endif
-
/* extract a 14 bit immediate field */
static int
return word | val;
}
-/* extract a 12 bit constant from branch instructions */
-
-#if 0
-
-int
-extract_12 (word)
- unsigned word;
-{
- return sign_extend (GET_FIELD (word, 19, 28) |
- GET_FIELD (word, 29, 29) << 10 |
- (word & 0x1) << 11, 12) << 2;
-}
-
-/* Deposit a 17 bit constant in an instruction (like bl). */
-
-unsigned int
-deposit_17 (opnd, word)
- unsigned opnd, word;
-{
- word |= GET_FIELD (opnd, 15 + 0, 15 + 0); /* w */
- word |= GET_FIELD (opnd, 15 + 1, 15 + 5) << 16; /* w1 */
- word |= GET_FIELD (opnd, 15 + 6, 15 + 6) << 2; /* w2[10] */
- word |= GET_FIELD (opnd, 15 + 7, 15 + 16) << 3; /* w2[0..9] */
-
- return word;
-}
-
-#endif
-
/* extract a 17 bit constant from branch instructions, returning the
19 bit signed value. */
return 0;
}
+static CORE_ADDR low_text_segment_address;
+
+static void
+record_text_segment_lowaddr (abfd, section, ignored)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ asection *section;
+ PTR ignored ATTRIBUTE_UNUSED;
+{
+ if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY)
+ == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
+ && section->vma < low_text_segment_address)
+ low_text_segment_address = section->vma;
+}
+
static void
internalize_unwinds (objfile, table, section, entries, size, text_offset)
struct objfile *objfile;
unsigned i;
char *buf = alloca (size);
+ low_text_segment_address = -1;
+
+ /* If addresses are 64 bits wide, then unwinds are supposed to
+ be segment relative offsets instead of absolute addresses.
+
+ Note that when loading a shared library (text_offset != 0) the
+ unwinds are already relative to the text_offset that will be
+ passed in. */
+ if (TARGET_PTR_BIT == 64 && text_offset == 0)
+ {
+ bfd_map_over_sections (objfile->obfd,
+ record_text_segment_lowaddr, (PTR) NULL);
+
+ /* ?!? Mask off some low bits. Should this instead subtract
+ out the lowest section's filepos or something like that?
+ This looks very hokey to me. */
+ low_text_segment_address &= ~0xfff;
+ text_offset += low_text_segment_address;
+ }
+
bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
/* Now internalize the information being careful to handle host/target
read_unwind_info (objfile)
struct objfile *objfile;
{
- asection *unwind_sec, *elf_unwind_sec, *stub_unwind_sec;
- unsigned unwind_size, elf_unwind_size, stub_unwind_size, total_size;
- unsigned index, unwind_entries, elf_unwind_entries;
+ asection *unwind_sec, *stub_unwind_sec;
+ unsigned unwind_size, stub_unwind_size, total_size;
+ unsigned index, unwind_entries;
unsigned stub_entries, total_entries;
CORE_ADDR text_offset;
struct obj_unwind_info *ui;
ui->cache = NULL;
ui->last = -1;
- /* Get hooks to all unwind sections. Note there is no linker-stub unwind
- section in ELF at the moment. */
- unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_START$");
- elf_unwind_sec = bfd_get_section_by_name (objfile->obfd, ".PARISC.unwind");
- stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
-
- /* Get sizes and unwind counts for all sections. */
- if (unwind_sec)
+ /* For reasons unknown the HP PA64 tools generate multiple unwinder
+ sections in a single executable. So we just iterate over every
+ section in the BFD looking for unwinder sections intead of trying
+ to do a lookup with bfd_get_section_by_name.
+
+ First determine the total size of the unwind tables so that we
+ can allocate memory in a nice big hunk. */
+ total_entries = 0;
+ for (unwind_sec = objfile->obfd->sections;
+ unwind_sec;
+ unwind_sec = unwind_sec->next)
{
- unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
- unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
- }
- else
- {
- unwind_size = 0;
- unwind_entries = 0;
- }
+ if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
+ || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
+ {
+ unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
+ unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
- if (elf_unwind_sec)
- {
- elf_unwind_size = bfd_section_size (objfile->obfd, elf_unwind_sec); /* purecov: deadcode */
- elf_unwind_entries = elf_unwind_size / UNWIND_ENTRY_SIZE; /* purecov: deadcode */
- }
- else
- {
- elf_unwind_size = 0;
- elf_unwind_entries = 0;
+ total_entries += unwind_entries;
+ }
}
+ /* Now compute the size of the stub unwinds. Note the ELF tools do not
+ use stub unwinds at the curren time. */
+ stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
+
if (stub_unwind_sec)
{
stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
}
/* Compute total number of unwind entries and their total size. */
- total_entries = unwind_entries + elf_unwind_entries + stub_entries;
+ total_entries += stub_entries;
total_size = total_entries * sizeof (struct unwind_table_entry);
/* Allocate memory for the unwind table. */
obstack_alloc (&objfile->psymbol_obstack, total_size);
ui->last = total_entries - 1;
- /* Internalize the standard unwind entries. */
+ /* Now read in each unwind section and internalize the standard unwind
+ entries. */
index = 0;
- internalize_unwinds (objfile, &ui->table[index], unwind_sec,
- unwind_entries, unwind_size, text_offset);
- index += unwind_entries;
- internalize_unwinds (objfile, &ui->table[index], elf_unwind_sec,
- elf_unwind_entries, elf_unwind_size, text_offset);
- index += elf_unwind_entries;
-
- /* Now internalize the stub unwind entries. */
+ for (unwind_sec = objfile->obfd->sections;
+ unwind_sec;
+ unwind_sec = unwind_sec->next)
+ {
+ if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
+ || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
+ {
+ unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
+ unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
+
+ internalize_unwinds (objfile, &ui->table[index], unwind_sec,
+ unwind_entries, unwind_size, text_offset);
+ index += unwind_entries;
+ }
+ }
+
+ /* Now read in and internalize the stub unwind entries. */
if (stub_unwind_size > 0)
{
unsigned int i;
sizeof (obj_private_data_t));
obj_private->unwind_info = NULL;
obj_private->so_info = NULL;
+ obj_private->dp = 0;
objfile->obj_private = (PTR) obj_private;
}
{
read_unwind_info (objfile);
if (objfile->obj_private == NULL)
- error ("Internal error reading unwind information."); /* purecov: deadcode */
+ error ("Internal error reading unwind information.");
ui = ((obj_private_data_t *) (objfile->obj_private))->unwind_info;
}
}
/* Called when no unwind descriptor was found for PC. Returns 1 if it
- appears that PC is in a linker stub. */
+ appears that PC is in a linker stub.
+
+ ?!? Need to handle stubs which appear in PA64 code. */
static int
pc_in_linker_stub (pc)
}
if (u->Save_RP)
- return -20;
+ return (TARGET_PTR_BIT == 64 ? -16 : -20);
else if (u->stub_unwind.stub_type != 0)
{
switch (u->stub_unwind.stub_type)
are saved in the exact same order as GDB numbers registers. How
convienent. */
if (pc_in_interrupt_handler (pc))
- return read_memory_integer (frame->frame + PC_REGNUM * 4, 4) & ~0x3;
+ return read_memory_integer (frame->frame + PC_REGNUM * 4,
+ TARGET_PTR_BIT / 8) & ~0x3;
+
+ if ((frame->pc >= frame->frame
+ && frame->pc <= (frame->frame
+ /* A call dummy is sized in words, but it is
+ actually a series of instructions. Account
+ for that scaling factor. */
+ + ((REGISTER_SIZE / INSTRUCTION_SIZE)
+ * CALL_DUMMY_LENGTH)
+ /* Similarly we have to account for 64bit
+ wide register saves. */
+ + (32 * REGISTER_SIZE)
+ /* We always consider FP regs 8 bytes long. */
+ + (NUM_REGS - FP0_REGNUM) * 8
+ /* Similarly we have to account for 64bit
+ wide register saves. */
+ + (6 * REGISTER_SIZE))))
+ {
+ return read_memory_integer ((frame->frame
+ + (TARGET_PTR_BIT == 64 ? -16 : -20)),
+ TARGET_PTR_BIT / 8) & ~0x3;
+ }
#ifdef FRAME_SAVED_PC_IN_SIGTRAMP
/* Deal with signal handler caller frames too. */
struct frame_saved_regs saved_regs;
get_frame_saved_regs (frame->next, &saved_regs);
- if (read_memory_integer (saved_regs.regs[FLAGS_REGNUM], 4) & 0x2)
+ if (read_memory_integer (saved_regs.regs[FLAGS_REGNUM],
+ TARGET_PTR_BIT / 8) & 0x2)
{
- pc = read_memory_integer (saved_regs.regs[31], 4) & ~0x3;
+ pc = read_memory_integer (saved_regs.regs[31],
+ TARGET_PTR_BIT / 8) & ~0x3;
/* Syscalls are really two frames. The syscall stub itself
with a return pointer in %rp and the kernel call with
a return pointer in %r31. We return the %rp variant
if %r31 is the same as frame->pc. */
if (pc == frame->pc)
- pc = read_memory_integer (saved_regs.regs[RP_REGNUM], 4) & ~0x3;
+ pc = read_memory_integer (saved_regs.regs[RP_REGNUM],
+ TARGET_PTR_BIT / 8) & ~0x3;
}
else
- pc = read_memory_integer (saved_regs.regs[RP_REGNUM], 4) & ~0x3;
+ pc = read_memory_integer (saved_regs.regs[RP_REGNUM],
+ TARGET_PTR_BIT / 8) & ~0x3;
}
else
pc = read_register (ret_regnum) & ~0x3;
struct frame_saved_regs saved_regs;
get_frame_saved_regs (frame->next, &saved_regs);
- if (read_memory_integer (saved_regs.regs[FLAGS_REGNUM], 4) & 0x2)
+ if (read_memory_integer (saved_regs.regs[FLAGS_REGNUM],
+ TARGET_PTR_BIT / 8) & 0x2)
{
- pc = read_memory_integer (saved_regs.regs[31], 4) & ~0x3;
+ pc = read_memory_integer (saved_regs.regs[31],
+ TARGET_PTR_BIT / 8) & ~0x3;
/* Syscalls are really two frames. The syscall stub itself
with a return pointer in %rp and the kernel call with
a return pointer in %r31. We return the %rp variant
if %r31 is the same as frame->pc. */
if (pc == frame->pc)
- pc = read_memory_integer (saved_regs.regs[RP_REGNUM], 4) & ~0x3;
+ pc = read_memory_integer (saved_regs.regs[RP_REGNUM],
+ TARGET_PTR_BIT / 8) & ~0x3;
}
else
- pc = read_memory_integer (saved_regs.regs[RP_REGNUM], 4) & ~0x3;
+ pc = read_memory_integer (saved_regs.regs[RP_REGNUM],
+ TARGET_PTR_BIT / 8) & ~0x3;
}
else if (rp_offset == 0)
{
else
{
old_pc = pc;
- pc = read_memory_integer (frame->frame + rp_offset, 4) & ~0x3;
+ pc = read_memory_integer (frame->frame + rp_offset,
+ TARGET_PTR_BIT / 8) & ~0x3;
}
}
CORE_ADDR frame_base;
struct frame_info *tmp_frame;
+ /* A frame in the current frame list, or zero. */
+ struct frame_info *saved_regs_frame = 0;
+ /* Where the registers were saved in saved_regs_frame.
+ If saved_regs_frame is zero, this is garbage. */
+ struct frame_saved_regs saved_regs;
+
CORE_ADDR caller_pc;
struct minimal_symbol *min_frame_symbol;
pull the old stack pointer from. Also see frame_saved_pc for
code to dig a saved PC out of the save state structure. */
if (pc_in_interrupt_handler (frame->pc))
- frame_base = read_memory_integer (frame->frame + SP_REGNUM * 4, 4);
+ frame_base = read_memory_integer (frame->frame + SP_REGNUM * 4,
+ TARGET_PTR_BIT / 8);
#ifdef FRAME_BASE_BEFORE_SIGTRAMP
else if (frame->signal_handler_caller)
{
The previous frame pointer is found at the top of the current frame. */
if (caller_framesize == -1 && my_framesize == -1)
{
- return read_memory_integer (frame_base, 4);
+ return read_memory_integer (frame_base, TARGET_PTR_BIT / 8);
}
/* Caller has a frame pointer, but callee does not. This is a little
more difficult as GCC and HP C lay out locals and callee register save
We use information from unwind descriptors to determine if %r3
is saved into the stack (Entry_GR field has this information). */
- tmp_frame = frame;
- while (tmp_frame)
+ for (tmp_frame = frame; tmp_frame; tmp_frame = tmp_frame->next)
{
u = find_unwind_entry (tmp_frame->pc);
return (CORE_ADDR) 0;
}
- /* Entry_GR specifies the number of callee-saved general registers
- saved in the stack. It starts at %r3, so %r3 would be 1. */
- if (u->Entry_GR >= 1 || u->Save_SP
+ if (u->Save_SP
|| tmp_frame->signal_handler_caller
|| pc_in_interrupt_handler (tmp_frame->pc))
break;
- else
- tmp_frame = tmp_frame->next;
+
+ /* Entry_GR specifies the number of callee-saved general registers
+ saved in the stack. It starts at %r3, so %r3 would be 1. */
+ if (u->Entry_GR >= 1)
+ {
+ /* The unwind entry claims that r3 is saved here. However,
+ in optimized code, GCC often doesn't actually save r3.
+ We'll discover this if we look at the prologue. */
+ get_frame_saved_regs (tmp_frame, &saved_regs);
+ saved_regs_frame = tmp_frame;
+
+ /* If we have an address for r3, that's good. */
+ if (saved_regs.regs[FP_REGNUM])
+ break;
+ }
}
if (tmp_frame)
&& !tmp_frame->signal_handler_caller
&& !pc_in_interrupt_handler (tmp_frame->pc))
{
- return read_memory_integer (tmp_frame->frame, 4);
+ return read_memory_integer (tmp_frame->frame, TARGET_PTR_BIT / 8);
}
/* %r3 was saved somewhere in the stack. Dig it out. */
else
{
- struct frame_saved_regs saved_regs;
-
/* Sick.
For optimization purposes many kernels don't have the
fail miserably if the function which performs the
system call has a variable sized stack frame. */
- get_frame_saved_regs (tmp_frame, &saved_regs);
+ if (tmp_frame != saved_regs_frame)
+ get_frame_saved_regs (tmp_frame, &saved_regs);
/* Abominable hack. */
if (current_target.to_has_execution == 0
&& ((saved_regs.regs[FLAGS_REGNUM]
- && (read_memory_integer (saved_regs.regs[FLAGS_REGNUM], 4)
+ && (read_memory_integer (saved_regs.regs[FLAGS_REGNUM],
+ TARGET_PTR_BIT / 8)
& 0x2))
|| (saved_regs.regs[FLAGS_REGNUM] == 0
&& read_register (FLAGS_REGNUM) & 0x2)))
u = find_unwind_entry (FRAME_SAVED_PC (frame));
if (!u)
{
- return read_memory_integer (saved_regs.regs[FP_REGNUM], 4);
+ return read_memory_integer (saved_regs.regs[FP_REGNUM],
+ TARGET_PTR_BIT / 8);
}
else
{
}
}
- return read_memory_integer (saved_regs.regs[FP_REGNUM], 4);
+ return read_memory_integer (saved_regs.regs[FP_REGNUM],
+ TARGET_PTR_BIT / 8);
}
}
else
{
- struct frame_saved_regs saved_regs;
-
/* Get the innermost frame. */
tmp_frame = frame;
while (tmp_frame->next != NULL)
tmp_frame = tmp_frame->next;
- get_frame_saved_regs (tmp_frame, &saved_regs);
+ if (tmp_frame != saved_regs_frame)
+ get_frame_saved_regs (tmp_frame, &saved_regs);
+
/* Abominable hack. See above. */
if (current_target.to_has_execution == 0
&& ((saved_regs.regs[FLAGS_REGNUM]
- && (read_memory_integer (saved_regs.regs[FLAGS_REGNUM], 4)
+ && (read_memory_integer (saved_regs.regs[FLAGS_REGNUM],
+ TARGET_PTR_BIT / 8)
& 0x2))
|| (saved_regs.regs[FLAGS_REGNUM] == 0
&& read_register (FLAGS_REGNUM) & 0x2)))
u = find_unwind_entry (FRAME_SAVED_PC (frame));
if (!u)
{
- return read_memory_integer (saved_regs.regs[FP_REGNUM], 4);
+ return read_memory_integer (saved_regs.regs[FP_REGNUM],
+ TARGET_PTR_BIT / 8);
}
else
{
{
CORE_ADDR sp, pc, pcspace;
register int regnum;
- int int_buffer;
+ CORE_ADDR int_buffer;
double freg_buffer;
/* Oh, what a hack. If we're trying to perform an inferior call
/* Space for "arguments"; the RP goes in here. */
sp = read_register (SP_REGNUM) + 48;
int_buffer = read_register (RP_REGNUM) | 0x3;
- write_memory (sp - 20, (char *) &int_buffer, 4);
+
+ /* The 32bit and 64bit ABIs save the return pointer into different
+ stack slots. */
+ if (REGISTER_SIZE == 8)
+ write_memory (sp - 16, (char *) &int_buffer, REGISTER_SIZE);
+ else
+ write_memory (sp - 20, (char *) &int_buffer, REGISTER_SIZE);
int_buffer = TARGET_READ_FP ();
- write_memory (sp, (char *) &int_buffer, 4);
+ write_memory (sp, (char *) &int_buffer, REGISTER_SIZE);
write_register (FP_REGNUM, sp);
- sp += 8;
+ sp += 2 * REGISTER_SIZE;
for (regnum = 1; regnum < 32; regnum++)
if (regnum != RP_REGNUM && regnum != FP_REGNUM)
sp = push_word (sp, read_register (regnum));
- sp += 4;
+ /* This is not necessary for the 64bit ABI. In fact it is dangerous. */
+ if (REGISTER_SIZE != 8)
+ sp += 4;
for (regnum = FP0_REGNUM; regnum < NUM_REGS; regnum++)
{
CORE_ADDR fp = frame->frame;
int i;
- frame_saved_regs->regs[RP_REGNUM] = (fp - 20) & ~0x3;
+ /* The 32bit and 64bit ABIs save RP into different locations. */
+ if (REGISTER_SIZE == 8)
+ frame_saved_regs->regs[RP_REGNUM] = (fp - 16) & ~0x3;
+ else
+ frame_saved_regs->regs[RP_REGNUM] = (fp - 20) & ~0x3;
+
frame_saved_regs->regs[FP_REGNUM] = fp;
- frame_saved_regs->regs[1] = fp + 8;
- for (fp += 12, i = 3; i < 32; i++)
+ frame_saved_regs->regs[1] = fp + (2 * REGISTER_SIZE);
+
+ for (fp += 3 * REGISTER_SIZE, i = 3; i < 32; i++)
{
if (i != FP_REGNUM)
{
frame_saved_regs->regs[i] = fp;
- fp += 4;
+ fp += REGISTER_SIZE;
}
}
- fp += 4;
+ /* This is not necessary or desirable for the 64bit ABI. */
+ if (REGISTER_SIZE != 8)
+ fp += 4;
+
for (i = FP0_REGNUM; i < NUM_REGS; i++, fp += 8)
frame_saved_regs->regs[i] = fp;
frame_saved_regs->regs[IPSW_REGNUM] = fp;
- frame_saved_regs->regs[SAR_REGNUM] = fp + 4;
- frame_saved_regs->regs[PCOQ_HEAD_REGNUM] = fp + 8;
- frame_saved_regs->regs[PCSQ_HEAD_REGNUM] = fp + 12;
- frame_saved_regs->regs[PCOQ_TAIL_REGNUM] = fp + 16;
- frame_saved_regs->regs[PCSQ_TAIL_REGNUM] = fp + 20;
+ frame_saved_regs->regs[SAR_REGNUM] = fp + REGISTER_SIZE;
+ frame_saved_regs->regs[PCOQ_HEAD_REGNUM] = fp + 2 * REGISTER_SIZE;
+ frame_saved_regs->regs[PCSQ_HEAD_REGNUM] = fp + 3 * REGISTER_SIZE;
+ frame_saved_regs->regs[PCOQ_TAIL_REGNUM] = fp + 4 * REGISTER_SIZE;
+ frame_saved_regs->regs[PCSQ_TAIL_REGNUM] = fp + 5 * REGISTER_SIZE;
}
void
for (regnum = 31; regnum > 0; regnum--)
if (fsr.regs[regnum])
- write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
+ write_register (regnum, read_memory_integer (fsr.regs[regnum],
+ REGISTER_SIZE));
for (regnum = NUM_REGS - 1; regnum >= FP0_REGNUM; regnum--)
if (fsr.regs[regnum])
if (fsr.regs[IPSW_REGNUM])
write_register (IPSW_REGNUM,
- read_memory_integer (fsr.regs[IPSW_REGNUM], 4));
+ read_memory_integer (fsr.regs[IPSW_REGNUM],
+ REGISTER_SIZE));
if (fsr.regs[SAR_REGNUM])
write_register (SAR_REGNUM,
- read_memory_integer (fsr.regs[SAR_REGNUM], 4));
+ read_memory_integer (fsr.regs[SAR_REGNUM],
+ REGISTER_SIZE));
/* If the PC was explicitly saved, then just restore it. */
if (fsr.regs[PCOQ_TAIL_REGNUM])
{
- npc = read_memory_integer (fsr.regs[PCOQ_TAIL_REGNUM], 4);
+ npc = read_memory_integer (fsr.regs[PCOQ_TAIL_REGNUM],
+ REGISTER_SIZE);
write_register (PCOQ_TAIL_REGNUM, npc);
}
/* Else use the value in %rp to set the new PC. */
write_pc (npc);
}
- write_register (FP_REGNUM, read_memory_integer (fp, 4));
+ write_register (FP_REGNUM, read_memory_integer (fp, REGISTER_SIZE));
if (fsr.regs[IPSW_REGNUM]) /* call dummy */
write_register (SP_REGNUM, fp - 48);
/* Start up the inferior. */
clear_proceed_status ();
proceed_to_finish = 1;
- proceed ((CORE_ADDR) - 1, TARGET_SIGNAL_DEFAULT, 0);
+ proceed ((CORE_ADDR) -1, TARGET_SIGNAL_DEFAULT, 0);
/* Perform our cleanups. */
do_cleanups (old_chain);
struct frame_saved_regs *fsr;
{
CORE_ADDR pc = read_pc ();
- CORE_ADDR new_pc = read_memory_integer (fsr->regs[PCOQ_HEAD_REGNUM], 4);
+ CORE_ADDR new_pc = read_memory_integer (fsr->regs[PCOQ_HEAD_REGNUM],
+ TARGET_PTR_BIT / 8);
struct target_waitstatus w;
int insn_count;
So, load up the registers and single step until we are in the
right place. */
- write_register (21, read_memory_integer (fsr->regs[PCSQ_HEAD_REGNUM], 4));
+ write_register (21, read_memory_integer (fsr->regs[PCSQ_HEAD_REGNUM],
+ REGISTER_SIZE));
write_register (22, new_pc);
for (insn_count = 0; insn_count < 3; insn_count++)
return 1;
}
-#if 0
+
+#ifdef PA20W_CALLING_CONVENTIONS
+
+/* This function pushes a stack frame with arguments as part of the
+ inferior function calling mechanism.
+
+ This is the version for the PA64, in which later arguments appear
+ at higher addresses. (The stack always grows towards higher
+ addresses.)
+
+ We simply allocate the appropriate amount of stack space and put
+ arguments into their proper slots. The call dummy code will copy
+ arguments into registers as needed by the ABI.
+
+ This ABI also requires that the caller provide an argument pointer
+ to the callee, so we do that too. */
+
CORE_ADDR
hppa_push_arguments (nargs, args, sp, struct_return, struct_addr)
int nargs;
{
/* array of arguments' offsets */
int *offset = (int *) alloca (nargs * sizeof (int));
- int cum = 0;
- int i, alignment;
+ /* array of arguments' lengths: real lengths in bytes, not aligned to
+ word size */
+ int *lengths = (int *) alloca (nargs * sizeof (int));
+
+ /* The value of SP as it was passed into this function after
+ aligning. */
+ CORE_ADDR orig_sp = STACK_ALIGN (sp);
+
+ /* The number of stack bytes occupied by the current argument. */
+ int bytes_reserved;
+
+ /* The total number of bytes reserved for the arguments. */
+ int cum_bytes_reserved = 0;
+
+ /* Similarly, but aligned. */
+ int cum_bytes_aligned = 0;
+ int i;
+
+ /* Iterate over each argument provided by the user. */
for (i = 0; i < nargs; i++)
{
- int x = 0;
- /* cum is the sum of the lengths in bytes of
- the arguments seen so far */
- cum += TYPE_LENGTH (VALUE_TYPE (args[i]));
+ struct type *arg_type = VALUE_TYPE (args[i]);
- /* value must go at proper alignment. Assume alignment is a
- power of two. */
- alignment = hppa_alignof (VALUE_TYPE (args[i]));
+ /* Integral scalar values smaller than a register are padded on
+ the left. We do this by promoting them to full-width,
+ although the ABI says to pad them with garbage. */
+ if (is_integral_type (arg_type)
+ && TYPE_LENGTH (arg_type) < REGISTER_SIZE)
+ {
+ args[i] = value_cast ((TYPE_UNSIGNED (arg_type)
+ ? builtin_type_unsigned_long
+ : builtin_type_long),
+ args[i]);
+ arg_type = VALUE_TYPE (args[i]);
+ }
+
+ lengths[i] = TYPE_LENGTH (arg_type);
+
+ /* Align the size of the argument to the word size for this
+ target. */
+ bytes_reserved = (lengths[i] + REGISTER_SIZE - 1) & -REGISTER_SIZE;
- if (cum % alignment)
- cum = (cum + alignment) & -alignment;
- offset[i] = -cum;
+ offset[i] = cum_bytes_reserved;
+
+ /* Aggregates larger than eight bytes (the only types larger
+ than eight bytes we have) are aligned on a 16-byte boundary,
+ possibly padded on the right with garbage. This may leave an
+ empty word on the stack, and thus an unused register, as per
+ the ABI. */
+ if (bytes_reserved > 8)
+ {
+ /* Round up the offset to a multiple of two slots. */
+ int new_offset = ((offset[i] + 2*REGISTER_SIZE-1)
+ & -(2*REGISTER_SIZE));
+ /* Note the space we've wasted, if any. */
+ bytes_reserved += new_offset - offset[i];
+ offset[i] = new_offset;
+ }
+
+ cum_bytes_reserved += bytes_reserved;
}
- sp += max ((cum + 7) & -8, 16);
+ /* CUM_BYTES_RESERVED already accounts for all the arguments
+ passed by the user. However, the ABIs mandate minimum stack space
+ allocations for outgoing arguments.
+
+ The ABIs also mandate minimum stack alignments which we must
+ preserve. */
+ cum_bytes_aligned = STACK_ALIGN (cum_bytes_reserved);
+ sp += max (cum_bytes_aligned, REG_PARM_STACK_SPACE);
+
+ /* Now write each of the args at the proper offset down the stack. */
for (i = 0; i < nargs; i++)
- write_memory (sp + offset[i], VALUE_CONTENTS (args[i]),
- TYPE_LENGTH (VALUE_TYPE (args[i])));
+ write_memory (orig_sp + offset[i], VALUE_CONTENTS (args[i]), lengths[i]);
+ /* If a structure has to be returned, set up register 28 to hold its
+ address */
if (struct_return)
write_register (28, struct_addr);
- return sp + 32;
+
+ /* For the PA64 we must pass a pointer to the outgoing argument list.
+ The ABI mandates that the pointer should point to the first byte of
+ storage beyond the register flushback area.
+
+ However, the call dummy expects the outgoing argument pointer to
+ be passed in register %r4. */
+ write_register (4, orig_sp + REG_PARM_STACK_SPACE);
+
+ /* ?!? This needs further work. We need to set up the global data
+ pointer for this procedure. This assumes the same global pointer
+ for every procedure. The call dummy expects the dp value to
+ be passed in register %r6. */
+ write_register (6, read_register (27));
+
+ /* The stack will have 64 bytes of additional space for a frame marker. */
+ return sp + 64;
}
-#endif
-/* elz: I am rewriting this function, because the one above is a very
- obscure piece of code.
- This function pushes the arguments on the stack. The stack grows up
- on the PA.
- Each argument goes in one (or more) word (4 bytes) on the stack.
- The first four words for the args must be allocated, even if they
- are not used.
- The 'topmost' arg is arg0, the 'bottom-most' is arg3. (if you think of
- them as 1 word long).
- Below these there can be any number of arguments, as needed by the function.
- If an arg is bigger than one word, it will be written on the stack
- occupying as many words as needed. Args that are bigger than 64bits
- are not copied on the stack, a pointer is passed instead.
-
- On top of the arg0 word there are other 8 words (32bytes) which are used
- for other purposes */
+#else
+
+/* This function pushes a stack frame with arguments as part of the
+ inferior function calling mechanism.
+
+ This is the version of the function for the 32-bit PA machines, in
+ which later arguments appear at lower addresses. (The stack always
+ grows towards higher addresses.)
+ We simply allocate the appropriate amount of stack space and put
+ arguments into their proper slots. The call dummy code will copy
+ arguments into registers as needed by the ABI. */
+
CORE_ADDR
hppa_push_arguments (nargs, args, sp, struct_return, struct_addr)
int nargs;
{
/* array of arguments' offsets */
int *offset = (int *) alloca (nargs * sizeof (int));
- /* array of arguments' lengths: real lengths in bytes, not aligned to word size */
+
+ /* array of arguments' lengths: real lengths in bytes, not aligned to
+ word size */
int *lengths = (int *) alloca (nargs * sizeof (int));
- int bytes_reserved; /* this is the number of bytes on the stack occupied by an
- argument. This will be always a multiple of 4 */
+ /* The number of stack bytes occupied by the current argument. */
+ int bytes_reserved;
- int cum_bytes_reserved = 0; /* this is the total number of bytes reserved by the args
- seen so far. It is a multiple of 4 always */
- int cum_bytes_aligned = 0; /* same as above, but aligned on 8 bytes */
- int i;
+ /* The total number of bytes reserved for the arguments. */
+ int cum_bytes_reserved = 0;
- /* When an arg does not occupy a whole word, for instance in bitfields:
- if the arg is x bits (0<x<32), it must be written
- starting from the (x-1)-th position down until the 0-th position.
- It is enough to align it to the word. */
- /* if an arg occupies 8 bytes, it must be aligned on the 64-bits
- high order word in odd arg word. */
- /* if an arg is larger than 64 bits, we need to pass a pointer to it, and
- copy the actual value on the stack, so that the callee can play with it.
- This is taken care of in valops.c in the call_function_by_hand function.
- The argument that is received in this function here has already be converted
- to a pointer to whatever is needed, so that it just can be pushed
- as a word argument */
+ /* Similarly, but aligned. */
+ int cum_bytes_aligned = 0;
+ int i;
+ /* Iterate over each argument provided by the user. */
for (i = 0; i < nargs; i++)
{
-
lengths[i] = TYPE_LENGTH (VALUE_TYPE (args[i]));
- if (lengths[i] % 4)
- bytes_reserved = (lengths[i] / 4) * 4 + 4;
- else
- bytes_reserved = lengths[i];
+ /* Align the size of the argument to the word size for this
+ target. */
+ bytes_reserved = (lengths[i] + REGISTER_SIZE - 1) & -REGISTER_SIZE;
offset[i] = cum_bytes_reserved + lengths[i];
- if ((bytes_reserved == 8) && (offset[i] % 8)) /* if 64-bit arg is not 64 bit aligned */
+ /* If the argument is a double word argument, then it needs to be
+ double word aligned. */
+ if ((bytes_reserved == 2 * REGISTER_SIZE)
+ && (offset[i] % 2 * REGISTER_SIZE))
{
int new_offset = 0;
- /* bytes_reserved is already aligned to the word, so we put it at one word
- more down the stack. This will leave one empty word on the
- stack, and one unused register. This is OK, see the calling
- convention doc */
- /* the offset may have to be moved to the corresponding position
- one word down the stack, to maintain
- alignment. */
- new_offset = (offset[i] / 8) * 8 + 8;
- if ((new_offset - offset[i]) >= 4)
+ /* BYTES_RESERVED is already aligned to the word, so we put
+ the argument at one word more down the stack.
+
+ This will leave one empty word on the stack, and one unused
+ register as mandated by the ABI. */
+ new_offset = ((offset[i] + 2 * REGISTER_SIZE - 1)
+ & -(2 * REGISTER_SIZE));
+
+ if ((new_offset - offset[i]) >= 2 * REGISTER_SIZE)
{
- bytes_reserved += 4;
- offset[i] += 4;
+ bytes_reserved += REGISTER_SIZE;
+ offset[i] += REGISTER_SIZE;
}
}
}
- /* now move up the sp to reserve at least 4 words required for the args,
- or more than this if needed */
- /* wee also need to keep the sp aligned to 8 bytes */
+ /* CUM_BYTES_RESERVED already accounts for all the arguments passed
+ by the user. However, the ABI mandates minimum stack space
+ allocations for outgoing arguments.
+
+ The ABI also mandates minimum stack alignments which we must
+ preserve. */
cum_bytes_aligned = STACK_ALIGN (cum_bytes_reserved);
- sp += max (cum_bytes_aligned, 16);
+ sp += max (cum_bytes_aligned, REG_PARM_STACK_SPACE);
- /* now write each of the args at the proper offset down the stack */
+ /* Now write each of the args at the proper offset down the stack.
+ ?!? We need to promote values to a full register instead of skipping
+ words in the stack. */
for (i = 0; i < nargs; i++)
write_memory (sp - offset[i], VALUE_CONTENTS (args[i]), lengths[i]);
-
- /* if a structure has to be returned, set up register 28 to hold its address */
+ /* If a structure has to be returned, set up register 28 to hold its
+ address */
if (struct_return)
write_register (28, struct_addr);
- /* the stack will have other 8 words on top of the args */
+ /* The stack will have 32 bytes of additional space for a frame marker. */
return sp + 32;
}
+#endif
/* elz: this function returns a value which is built looking at the given address.
It is called from call_function_by_hand, in case we need to return a
target_read_memory (value_return_addr, (char *) &stub_addr, sizeof (stub_addr));
if (stub_addr <= 0)
- error ("call to __d_shl_get failed, error code is %d", err_value); /* purecov: deadcode */
+ error ("call to __d_shl_get failed, error code is %d", err_value);
return (stub_addr);
}
/* Cover routine for find_stub_with_shl_get to pass to catch_errors */
-static CORE_ADDR
-cover_find_stub_with_shl_get (args)
- args_for_find_stub *args;
+static int
+cover_find_stub_with_shl_get (PTR args_untyped)
{
- return find_stub_with_shl_get (args->msym, args->solib_handle);
+ args_for_find_stub *args = args_untyped;
+ args->return_val = find_stub_with_shl_get (args->msym, args->solib_handle);
+ return 0;
}
-
/* Insert the specified number of args and function address
into a call sequence of the above form stored at DUMMYNAME.
CORE_ADDR solib_handle = 0;
/* Nonzero if we will use GCC's PLT call routine. This routine must be
- passed an import stub, not a PLABEL. It is also necessary to set %r19
- (the PIC register) before performing the call.
+ passed an import stub, not a PLABEL. It is also necessary to set %r19
+ (the PIC register) before performing the call.
If zero, then we are using __d_plt_call (HP's PLT call routine) or we
are calling the target directly. When using __d_plt_call we want to
use a PLABEL instead of an import stub. */
int using_gcc_plt_call = 1;
+#ifdef GDB_TARGET_IS_HPPA_20W
+ /* We currently use completely different code for the PA2.0W inferior
+ function call sequences. This needs to be cleaned up. */
+ {
+ CORE_ADDR pcsqh, pcsqt, pcoqh, pcoqt, sr5;
+ struct target_waitstatus w;
+ int inst1, inst2;
+ char buf[4];
+ int status;
+ struct objfile *objfile;
+
+ /* We can not modify the PC space queues directly, so we start
+ up the inferior and execute a couple instructions to set the
+ space queues so that they point to the call dummy in the stack. */
+ pcsqh = read_register (PCSQ_HEAD_REGNUM);
+ sr5 = read_register (SR5_REGNUM);
+ if (1)
+ {
+ pcoqh = read_register (PCOQ_HEAD_REGNUM);
+ pcoqt = read_register (PCOQ_TAIL_REGNUM);
+ if (target_read_memory (pcoqh, buf, 4) != 0)
+ error ("Couldn't modify space queue\n");
+ inst1 = extract_unsigned_integer (buf, 4);
+
+ if (target_read_memory (pcoqt, buf, 4) != 0)
+ error ("Couldn't modify space queue\n");
+ inst2 = extract_unsigned_integer (buf, 4);
+
+ /* BVE (r1) */
+ *((int *) buf) = 0xe820d000;
+ if (target_write_memory (pcoqh, buf, 4) != 0)
+ error ("Couldn't modify space queue\n");
+
+ /* NOP */
+ *((int *) buf) = 0x08000240;
+ if (target_write_memory (pcoqt, buf, 4) != 0)
+ {
+ *((int *) buf) = inst1;
+ target_write_memory (pcoqh, buf, 4);
+ error ("Couldn't modify space queue\n");
+ }
+
+ write_register (1, pc);
+
+ /* Single step twice, the BVE instruction will set the space queue
+ such that it points to the PC value written immediately above
+ (ie the call dummy). */
+ resume (1, 0);
+ target_wait (inferior_pid, &w);
+ resume (1, 0);
+ target_wait (inferior_pid, &w);
+
+ /* Restore the two instructions at the old PC locations. */
+ *((int *) buf) = inst1;
+ target_write_memory (pcoqh, buf, 4);
+ *((int *) buf) = inst2;
+ target_write_memory (pcoqt, buf, 4);
+ }
+
+ /* The call dummy wants the ultimate destination address initially
+ in register %r5. */
+ write_register (5, fun);
+
+ /* We need to see if this objfile has a different DP value than our
+ own (it could be a shared library for example). */
+ ALL_OBJFILES (objfile)
+ {
+ struct obj_section *s;
+ obj_private_data_t *obj_private;
+
+ /* See if FUN is in any section within this shared library. */
+ for (s = objfile->sections; s < objfile->sections_end; s++)
+ if (s->addr <= fun && fun < s->endaddr)
+ break;
+
+ if (s >= objfile->sections_end)
+ continue;
+
+ obj_private = (obj_private_data_t *) objfile->obj_private;
+
+ /* The DP value may be different for each objfile. But within an
+ objfile each function uses the same dp value. Thus we do not need
+ to grope around the opd section looking for dp values.
+
+ ?!? This is not strictly correct since we may be in a shared library
+ and want to call back into the main program. To make that case
+ work correctly we need to set obj_private->dp for the main program's
+ objfile, then remove this conditional. */
+ if (obj_private->dp)
+ write_register (27, obj_private->dp);
+ break;
+ }
+ return pc;
+ }
+#endif
+
+#ifndef GDB_TARGET_IS_HPPA_20W
/* Prefer __gcc_plt_call over the HP supplied routine because
__gcc_plt_call works for any number of arguments. */
trampoline = NULL;
/* Get the GOT/DP value for the target function. It's
at *(fun+4). Note the call dummy is *NOT* allowed to
trash %r19 before calling the target function. */
- write_register (19, read_memory_integer ((fun & ~0x3) + 4, 4));
+ write_register (19, read_memory_integer ((fun & ~0x3) + 4,
+ REGISTER_SIZE));
/* Now get the real address for the function we are calling, it's
at *fun. */
- fun = (CORE_ADDR) read_memory_integer (fun & ~0x3, 4);
+ fun = (CORE_ADDR) read_memory_integer (fun & ~0x3,
+ TARGET_PTR_BIT / 8);
}
else
{
funsymbol = lookup_minimal_symbol_by_pc (fun);
if (!funsymbol)
- error ("Unable to find minimal symbol for target fucntion.\n");
+ error ("Unable to find minimal symbol for target function.\n");
/* Search all the object files for an import symbol with the
right name. */
/* It must also be an import stub. */
u = find_unwind_entry (SYMBOL_VALUE (stub_symbol));
- if (!u
- || (u->stub_unwind.stub_type != IMPORT)
- && u->stub_unwind.stub_type != IMPORT_SHLIB)
+ if (u == NULL
+ || (u->stub_unwind.stub_type != IMPORT
+#ifdef GDB_NATIVE_HPUX_11
+ /* Sigh. The hpux 10.20 dynamic linker will blow
+ chunks if we perform a call to an unbound function
+ via the IMPORT_SHLIB stub. The hpux 11.00 dynamic
+ linker will blow chunks if we do not call the
+ unbound function via the IMPORT_SHLIB stub.
+
+ We currently have no way to select bevahior on just
+ the target. However, we only support HPUX/SOM in
+ native mode. So we conditinalize on a native
+ #ifdef. Ugly. Ugly. Ugly */
+ && u->stub_unwind.stub_type != IMPORT_SHLIB
+#endif
+ ))
continue;
/* OK. Looks like the correct import stub. */
newfun = SYMBOL_VALUE (stub_symbol);
fun = newfun;
+
+ /* If we found an IMPORT stub, then we want to stop
+ searching now. If we found an IMPORT_SHLIB, we want
+ to continue the search in the hopes that we will find
+ an IMPORT stub. */
+ if (u->stub_unwind.stub_type == IMPORT)
+ break;
}
}
#endif
else
return dyncall_addr;
+#endif
}
pa_do_strcat_registers_info (regnum, fpregs, stream, precision)
int regnum;
int fpregs;
- GDB_FILE *stream;
+ struct ui_file *stream;
enum precision_type precision;
{
char raw_regs[REGISTER_BYTES];
int fpregs;
{
int i, j;
- long raw_val[2]; /* Alas, we are compiled so that "long long" is 32 bits */
+ /* Alas, we are compiled so that "long long" is 32 bits */
+ long raw_val[2];
long long_val;
+ int rows = 48, columns = 2;
- for (i = 0; i < 18; i++)
+ for (i = 0; i < rows; i++)
{
- for (j = 0; j < 4; j++)
+ for (j = 0; j < columns; j++)
{
+ /* We display registers in column-major order. */
+ int regnum = i + j * rows;
+
/* Q: Why is the value passed through "extract_signed_integer",
while above, in "pa_do_registers_info" it isn't?
A: ? */
- pa_register_look_aside (raw_regs, i + (j * 18), &raw_val[0]);
+ pa_register_look_aside (raw_regs, regnum, &raw_val[0]);
/* Even fancier % formats to prevent leading zeros
and still maintain the output in columns. */
/* Being big-endian, on this machine the low bits
(the ones we want to look at) are in the second longword. */
long_val = extract_signed_integer (&raw_val[1], 4);
- printf_filtered ("%8.8s: %8x ",
- REGISTER_NAME (i + (j * 18)), long_val);
+ printf_filtered ("%10.10s: %8x ",
+ REGISTER_NAME (regnum), long_val);
}
else
{
/* raw_val = extract_signed_integer(&raw_val, 8); */
if (raw_val[0] == 0)
- printf_filtered ("%8.8s: %8x ",
- REGISTER_NAME (i + (j * 18)), raw_val[1]);
+ printf_filtered ("%10.10s: %8x ",
+ REGISTER_NAME (regnum), raw_val[1]);
else
- printf_filtered ("%8.8s: %8x%8.8x ", REGISTER_NAME (i + (j * 18)),
+ printf_filtered ("%10.10s: %8x%8.8x ",
+ REGISTER_NAME (regnum),
raw_val[0], raw_val[1]);
}
}
char *raw_regs;
int regnum;
int fpregs;
- GDB_FILE *stream;
+ struct ui_file *stream;
{
int i, j;
long raw_val[2]; /* Alas, we are compiled so that "long long" is 32 bits */
static void
pa_strcat_fp_reg (i, stream, precision)
int i;
- GDB_FILE *stream;
+ struct ui_file *stream;
enum precision_type precision;
{
char raw_buffer[MAX_REGISTER_RAW_SIZE];
static CORE_ADDR dyncall = 0;
static CORE_ADDR sr4export = 0;
-/* FIXME XXX - dyncall and sr4export must be initialized whenever we get a
- new exec file */
+#ifdef GDB_TARGET_IS_HPPA_20W
+ /* PA64 has a completely different stub/trampoline scheme. Is it
+ better? Maybe. It's certainly harder to determine with any
+ certainty that we are in a stub because we can not refer to the
+ unwinders to help.
+
+ The heuristic is simple. Try to lookup the current PC value in th
+ minimal symbol table. If that fails, then assume we are not in a
+ stub and return.
+
+ Then see if the PC value falls within the section bounds for the
+ section containing the minimal symbol we found in the first
+ step. If it does, then assume we are not in a stub and return.
+
+ Finally peek at the instructions to see if they look like a stub. */
+ {
+ struct minimal_symbol *minsym;
+ asection *sec;
+ CORE_ADDR addr;
+ int insn, i;
+
+ minsym = lookup_minimal_symbol_by_pc (pc);
+ if (! minsym)
+ return 0;
+
+ sec = SYMBOL_BFD_SECTION (minsym);
+
+ if (sec->vma <= pc
+ && sec->vma + sec->_cooked_size < pc)
+ return 0;
+
+ /* We might be in a stub. Peek at the instructions. Stubs are 3
+ instructions long. */
+ insn = read_memory_integer (pc, 4);
+
+ /* Find out where we we think we are within the stub. */
+ if ((insn & 0xffffc00e) == 0x53610000)
+ addr = pc;
+ else if ((insn & 0xffffffff) == 0xe820d000)
+ addr = pc - 4;
+ else if ((insn & 0xffffc00e) == 0x537b0000)
+ addr = pc - 8;
+ else
+ return 0;
+
+ /* Now verify each insn in the range looks like a stub instruction. */
+ insn = read_memory_integer (addr, 4);
+ if ((insn & 0xffffc00e) != 0x53610000)
+ return 0;
+
+ /* Now verify each insn in the range looks like a stub instruction. */
+ insn = read_memory_integer (addr + 4, 4);
+ if ((insn & 0xffffffff) != 0xe820d000)
+ return 0;
+
+ /* Now verify each insn in the range looks like a stub instruction. */
+ insn = read_memory_integer (addr + 8, 4);
+ if ((insn & 0xffffc00e) != 0x537b0000)
+ return 0;
+
+ /* Looks like a stub. */
+ return 1;
+ }
+#endif
+
+ /* FIXME XXX - dyncall and sr4export must be initialized whenever we get a
+ new exec file */
/* First see if PC is in one of the two C-library trampolines. */
if (!dyncall)
if (pc == dyncall || pc == sr4export)
return 1;
+ minsym = lookup_minimal_symbol_by_pc (pc);
+ if (minsym && strcmp (SYMBOL_NAME (minsym), ".stub") == 0)
+ return 1;
+
/* Get the unwind descriptor corresponding to PC, return zero
if no unwind was found. */
u = find_unwind_entry (pc);
}
/* Should never happen. */
- warning ("Unable to find branch in parameter relocation stub.\n"); /* purecov: deadcode */
- return 0; /* purecov: deadcode */
+ warning ("Unable to find branch in parameter relocation stub.\n");
+ return 0;
}
/* Unknown stub type. For now, just return zero. */
- return 0; /* purecov: deadcode */
+ return 0;
}
/* Return one if PC is in the return path of a trampoline, else return zero.
}
/* Should never happen. */
- warning ("Unable to find branch in parameter relocation stub.\n"); /* purecov: deadcode */
- return 0; /* purecov: deadcode */
+ warning ("Unable to find branch in parameter relocation stub.\n");
+ return 0;
}
/* Unknown stub type. For now, just return zero. */
- return 0; /* purecov: deadcode */
+ return 0;
}
calling an argument relocation stub. It even handles some stubs
used in dynamic executables. */
-#if 0
-CORE_ADDR
-skip_trampoline_code (pc, name)
- CORE_ADDR pc;
- char *name;
-{
- return find_solib_trampoline_target (pc);
-}
-
-#endif
-
CORE_ADDR
skip_trampoline_code (pc, name)
CORE_ADDR pc;
struct minimal_symbol *msym;
struct unwind_table_entry *u;
-
-/* FIXME XXX - dyncall and sr4export must be initialized whenever we get a
- new exec file */
+ /* FIXME XXX - dyncall and sr4export must be initialized whenever we get a
+ new exec file */
if (!dyncall)
{
the PLT entry for this function, not the address of the function
itself. Bit 31 has meaning too, but only for MPE. */
if (pc & 0x2)
- pc = (CORE_ADDR) read_memory_integer (pc & ~0x3, 4);
+ pc = (CORE_ADDR) read_memory_integer (pc & ~0x3, TARGET_PTR_BIT / 8);
}
if (pc == dyncall_external)
{
pc = (CORE_ADDR) read_register (22);
- pc = (CORE_ADDR) read_memory_integer (pc & ~0x3, 4);
+ pc = (CORE_ADDR) read_memory_integer (pc & ~0x3, TARGET_PTR_BIT / 8);
}
else if (pc == sr4export)
pc = (CORE_ADDR) (read_register (22));
else if ((curr_inst & 0xffe0f000) == 0xe840d000)
{
return (read_memory_integer
- (read_register (SP_REGNUM) - 24, 4)) & ~0x3;
+ (read_register (SP_REGNUM) - 24, TARGET_PTR_BIT / 8)) & ~0x3;
}
/* What about be,n 0(sr0,%rp)? It's just another way we return to
I guess we could check for the previous instruction being
mtsp %r1,%sr0 if we want to do sanity checking. */
return (read_memory_integer
- (read_register (SP_REGNUM) - 24, 4)) & ~0x3;
+ (read_register (SP_REGNUM) - 24, TARGET_PTR_BIT / 8)) & ~0x3;
}
/* Haven't found the branch yet, but we're still in the stub.
if ((inst & 0xffe00000) == 0x6fc00000)
return extract_14 (inst);
+ /* std,ma X,D(sp) */
+ if ((inst & 0xffe00008) == 0x73c00008)
+ return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
+
/* addil high21,%r1; ldo low11,(%r1),%r30)
save high bits in save_high21 for later use. */
if ((inst & 0xffe00000) == 0x28200000)
case 0x21:
case 0x22:
case 0x23:
+ case 0x27:
case 0x28:
case 0x29:
case 0x2a:
case 0x2b:
+ case 0x2f:
case 0x30:
case 0x31:
case 0x32:
case 0x38:
case 0x39:
case 0x3a:
+ case 0x3b:
return 1;
default:
unsigned long inst;
{
/* Does it look like a stw? */
- if ((inst >> 26) == 0x1a)
+ if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
+ || (inst >> 26) == 0x1f
+ || ((inst >> 26) == 0x1f
+ && ((inst >> 6) == 0xa)))
+ return extract_5R_store (inst);
+
+ /* Does it look like a std? */
+ if ((inst >> 26) == 0x1c
+ || ((inst >> 26) == 0x03
+ && ((inst >> 6) & 0xf) == 0xb))
return extract_5R_store (inst);
/* Does it look like a stwm? GCC & HPC may use this in prologues. */
/* Does it look like sth or stb? HPC versions 9.0 and later use these
too. */
- if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18)
+ if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
+ || ((inst >> 26) == 0x3
+ && (((inst >> 6) & 0xf) == 0x8
+ || (inst >> 6) & 0xf) == 0x9))
return extract_5R_store (inst);
return 0;
inst_saves_fr (inst)
unsigned long inst;
{
- /* is this an FSTDS ? */
+ /* is this an FSTD ? */
if ((inst & 0xfc00dfc0) == 0x2c001200)
return extract_5r_store (inst);
- /* is this an FSTWS ? */
+ if ((inst & 0xfc000002) == 0x70000002)
+ return extract_5R_store (inst);
+ /* is this an FSTW ? */
if ((inst & 0xfc00df80) == 0x24001200)
return extract_5r_store (inst);
+ if ((inst & 0xfc000002) == 0x7c000000)
+ return extract_5R_store (inst);
return 0;
}
/* Note the interesting effects of this instruction. */
stack_remaining -= prologue_inst_adjust_sp (inst);
- /* There is only one instruction used for saving RP into the stack. */
- if (inst == 0x6bc23fd9)
+ /* There are limited ways to store the return pointer into the
+ stack. */
+ if (inst == 0x6bc23fd9 || inst == 0x0fc212c1)
save_rp = 0;
- /* This is the only way we save SP into the stack. At this time
+ /* These are the only ways we save SP into the stack. At this time
the HP compilers never bother to save SP into the stack. */
- if ((inst & 0xffffc000) == 0x6fc10000)
+ if ((inst & 0xffffc000) == 0x6fc10000
+ || (inst & 0xffffc00c) == 0x73c10008)
save_sp = 0;
+ /* Are we loading some register with an offset from the argument
+ pointer? */
+ if ((inst & 0xffe00000) == 0x37a00000
+ || (inst & 0xffffffe0) == 0x081d0240)
+ {
+ pc += 4;
+ continue;
+ }
+
/* Account for general and floating-point register saves. */
reg_num = inst_saves_gr (inst);
save_gr &= ~(1 << reg_num);
FIXME. Can still die if we have a mix of GR and FR argument
stores! */
- if (reg_num >= 23 && reg_num <= 26)
+ if (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
{
- while (reg_num >= 23 && reg_num <= 26)
+ while (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
{
pc += 4;
status = target_read_memory (pc, buf, 4);
save. */
if ((inst & 0xfc000000) == 0x34000000
&& inst_saves_fr (next_inst) >= 4
- && inst_saves_fr (next_inst) <= 7)
+ && inst_saves_fr (next_inst) <= (TARGET_PTR_BIT == 64 ? 11 : 7))
{
/* So we drop into the code below in a reasonable state. */
reg_num = inst_saves_fr (next_inst);
This is a kludge as on the HP compiler sets this bit and it
never does prologue scheduling. So once we see one, skip past
all of them. */
- if (reg_num >= 4 && reg_num <= 7)
+ if (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
{
- while (reg_num >= 4 && reg_num <= 7)
+ while (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
{
pc += 8;
status = target_read_memory (pc, buf, 4);
}
-
-
-
-/* return 0 if we cannot determine the end of the prologue,
- return the new pc value if we know where the prologue ends */
+/* Return the address of the PC after the last prologue instruction if
+ we can determine it from the debug symbols. Else return zero. */
static CORE_ADDR
after_prologue (pc)
CORE_ADDR func_addr, func_end;
struct symbol *f;
+ /* If we can not find the symbol in the partial symbol table, then
+ there is no hope we can determine the function's start address
+ with this code. */
if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
- return 0; /* Unknown */
-
- f = find_pc_function (pc);
- if (!f)
- return 0; /* no debug info, do it the hard way! */
+ return 0;
+ /* Get the line associated with FUNC_ADDR. */
sal = find_pc_line (func_addr, 0);
- if (sal.end < func_end)
- {
- /* this happens when the function has no prologue, because the way
- find_pc_line works: elz. Note: this may not be a very good
- way to decide whether a function has a prologue or not, but
- it is the best I can do with the info available
- Also, this will work for functions like: int f()
- {
- return 2;
- }
- I.e. the bp will be inserted at the first open brace.
- For functions where the body is only one line written like this:
- int f()
- { return 2; }
- this will make the breakpoint to be at the last brace, after the body
- has been executed already. What's the point of stepping through a function
- without any variables anyway?? */
-
- if ((SYMBOL_LINE (f) > 0) && (SYMBOL_LINE (f) < sal.line))
- return pc; /*no adjusment will be made */
- else
- return sal.end; /* this is the end of the prologue */
- }
- /* The line after the prologue is after the end of the function. In this
- case, put the end of the prologue is the beginning of the function. */
- /* This should happen only when the function is prologueless and has no
- code in it. For instance void dumb(){} Note: this kind of function
- is used quite a lot in the test system */
+ /* There are only two cases to consider. First, the end of the source line
+ is within the function bounds. In that case we return the end of the
+ source line. Second is the end of the source line extends beyond the
+ bounds of the current function. We need to use the slow code to
+ examine instructions in that case.
+ Anything else is simply a bug elsewhere. Fixing it here is absolutely
+ the wrong thing to do. In fact, it should be entirely possible for this
+ function to always return zero since the slow instruction scanning code
+ is supposed to *always* work. If it does not, then it is a bug. */
+ if (sal.end < func_end)
+ return sal.end;
else
- return pc; /* no adjustment will be made */
+ return 0;
}
/* To skip prologues, I use this predicate. Returns either PC itself
CORE_ADDR post_prologue_pc;
char buf[4];
-#ifdef GDB_TARGET_HAS_SHARED_LIBS
- /* Silently return the unaltered pc upon memory errors.
- This could happen on OSF/1 if decode_line_1 tries to skip the
- prologue for quickstarted shared library functions when the
- shared library is not yet mapped in.
- Reading target memory is slow over serial lines, so we perform
- this check only if the target has shared libraries. */
- if (target_read_memory (pc, buf, 4))
- return pc;
-#endif
-
/* See if we can determine the end of the prologue via the symbol table.
If so, then return either PC, or the PC after the prologue, whichever
is greater. */
post_prologue_pc = after_prologue (pc);
+ /* If after_prologue returned a useful address, then use it. Else
+ fall back on the instruction skipping code.
+
+ Some folks have claimed this causes problems because the breakpoint
+ may be the first instruction of the prologue. If that happens, then
+ the instruction skipping code has a bug that needs to be fixed. */
if (post_prologue_pc != 0)
return max (pc, post_prologue_pc);
-
-
- /* Can't determine prologue from the symbol table, (this can happen if there
- is no debug information) so we need to fall back on the old code, which
- looks at the instructions */
- /* FIXME (elz) !!!!: this may create a problem if, once the bp is hit, the user says
- where: the backtrace info is not right: this is because the point at which we
- break is at the very first instruction of the function. At this time the stuff that
- needs to be saved on the stack, has not been saved yet, so the backtrace
- cannot know all it needs to know. This will need to be fixed in the
- actual backtrace code. (Note: this is what DDE does) */
-
else
return (skip_prologue_hard_way (pc));
-
-#if 0
-/* elz: I am keeping this code around just in case, but remember, all the
- instructions are for alpha: you should change all to the hppa instructions */
-
- /* Can't determine prologue from the symbol table, need to examine
- instructions. */
-
- /* Skip the typical prologue instructions. These are the stack adjustment
- instruction and the instructions that save registers on the stack
- or in the gcc frame. */
- for (offset = 0; offset < 100; offset += 4)
- {
- int status;
-
- status = read_memory_nobpt (pc + offset, buf, 4);
- if (status)
- memory_error (status, pc + offset);
- inst = extract_unsigned_integer (buf, 4);
-
- /* The alpha has no delay slots. But let's keep the lenient stuff,
- we might need it for something else in the future. */
- if (lenient && 0)
- continue;
-
- if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
- continue;
- if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
- continue;
- if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
- continue;
- else if ((inst & 0xfc1f0000) == 0xb41e0000
- && (inst & 0xffff0000) != 0xb7fe0000)
- continue; /* stq reg,n($sp) */
- /* reg != $zero */
- else if ((inst & 0xfc1f0000) == 0x9c1e0000
- && (inst & 0xffff0000) != 0x9ffe0000)
- continue; /* stt reg,n($sp) */
- /* reg != $zero */
- else if (inst == 0x47de040f) /* bis sp,sp,fp */
- continue;
- else
- break;
- }
- return pc + offset;
-#endif /* 0 */
}
/* Put here the code to store, into a struct frame_saved_regs,
int status, i, reg;
char buf[4];
int fp_loc = -1;
+ int final_iteration;
/* Zero out everything. */
memset (frame_saved_regs, '\0', sizeof (struct frame_saved_regs));
instead, let find_dummy_frame_regs fill in the correct offsets
for the saved registers. */
if ((frame_info->pc >= frame_info->frame
- && frame_info->pc <= (frame_info->frame + CALL_DUMMY_LENGTH
- + 32 * 4 + (NUM_REGS - FP0_REGNUM) * 8
- + 6 * 4)))
+ && frame_info->pc <= (frame_info->frame
+ /* A call dummy is sized in words, but it is
+ actually a series of instructions. Account
+ for that scaling factor. */
+ + ((REGISTER_SIZE / INSTRUCTION_SIZE)
+ * CALL_DUMMY_LENGTH)
+ /* Similarly we have to account for 64bit
+ wide register saves. */
+ + (32 * REGISTER_SIZE)
+ /* We always consider FP regs 8 bytes long. */
+ + (NUM_REGS - FP0_REGNUM) * 8
+ /* Similarly we have to account for 64bit
+ wide register saves. */
+ + (6 * REGISTER_SIZE))))
find_dummy_frame_regs (frame_info, frame_saved_regs);
/* Interrupt handlers are special too. They lay out the register
/* SP is a little special. */
if (i == SP_REGNUM)
frame_saved_regs->regs[SP_REGNUM]
- = read_memory_integer (frame_info->frame + SP_REGNUM * 4, 4);
+ = read_memory_integer (frame_info->frame + SP_REGNUM * 4,
+ TARGET_PTR_BIT / 8);
else
frame_saved_regs->regs[i] = frame_info->frame + i * 4;
}
For unoptimized GCC code and for any HP CC code this will never ever
examine any user instructions.
- For optimzied GCC code we're faced with problems. GCC will schedule
+ For optimized GCC code we're faced with problems. GCC will schedule
its prologue and make prologue instructions available for delay slot
filling. The end result is user code gets mixed in with the prologue
and a prologue instruction may be in the delay slot of the first branch
Some unexpected things are expected with debugging optimized code, so
we allow this routine to walk past user instructions in optimized
GCC code. */
- while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
+ final_iteration = 0;
+ while ((save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
+ && pc <= frame_info->pc)
{
status = target_read_memory (pc, buf, 4);
inst = extract_unsigned_integer (buf, 4);
/* Note the interesting effects of this instruction. */
stack_remaining -= prologue_inst_adjust_sp (inst);
- /* There is only one instruction used for saving RP into the stack. */
- if (inst == 0x6bc23fd9)
+ /* There are limited ways to store the return pointer into the
+ stack. */
+ if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
{
save_rp = 0;
frame_saved_regs->regs[RP_REGNUM] = frame_info->frame - 20;
}
+ else if (inst == 0x0fc212c1) /* std rp,-0x10(sr0,sp) */
+ {
+ save_rp = 0;
+ frame_saved_regs->regs[RP_REGNUM] = frame_info->frame - 16;
+ }
- /* Just note that we found the save of SP into the stack. The
- value for frame_saved_regs was computed above. */
- if ((inst & 0xffffc000) == 0x6fc10000)
- save_sp = 0;
+ /* Note if we saved SP into the stack. This also happens to indicate
+ the location of the saved frame pointer. */
+ if ( (inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
+ || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
+ {
+ frame_saved_regs->regs[FP_REGNUM] = frame_info->frame;
+ save_sp = 0;
+ }
/* Account for general and floating-point register saves. */
reg = inst_saves_gr (inst);
if ((inst >> 26) == 0x1b
&& extract_14 (inst) >= 0)
frame_saved_regs->regs[reg] = frame_info->frame;
+ /* A std has explicit post_modify forms. */
+ else if ((inst & 0xfc00000c0) == 0x70000008)
+ frame_saved_regs->regs[reg] = frame_info->frame;
else
{
+ CORE_ADDR offset;
+
+ if ((inst >> 26) == 0x1c)
+ offset = (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
+ else if ((inst >> 26) == 0x03)
+ offset = low_sign_extend (inst & 0x1f, 5);
+ else
+ offset = extract_14 (inst);
+
/* Handle code with and without frame pointers. */
if (u->Save_SP)
frame_saved_regs->regs[reg]
- = frame_info->frame + extract_14 (inst);
+ = frame_info->frame + offset;
else
frame_saved_regs->regs[reg]
- = frame_info->frame + (u->Total_frame_size << 3)
- + extract_14 (inst);
+ = (frame_info->frame + (u->Total_frame_size << 3)
+ + offset);
}
}
}
}
- /* Quit if we hit any kind of branch. This can happen if a prologue
- instruction is in the delay slot of the first call/branch. */
- if (is_branch (inst))
+ /* Quit if we hit any kind of branch the previous iteration.
+ if (final_iteration)
break;
+ /* We want to look precisely one instruction beyond the branch
+ if we have not found everything yet. */
+ if (is_branch (inst))
+ final_iteration = 1;
+
/* Bump the PC. */
pc += 4;
}
/* Similar to above, but imported from breakpoint.c -- non-target-specific */
extern int exception_support_initialized;
/* Address of __eh_notify_hook */
-static CORE_ADDR eh_notify_hook_addr = NULL;
+static CORE_ADDR eh_notify_hook_addr = 0;
/* Address of __d_eh_notify_callback */
-static CORE_ADDR eh_notify_callback_addr = NULL;
+static CORE_ADDR eh_notify_callback_addr = 0;
/* Address of __d_eh_break */
-static CORE_ADDR eh_break_addr = NULL;
+static CORE_ADDR eh_break_addr = 0;
/* Address of __d_eh_catch_catch */
-static CORE_ADDR eh_catch_catch_addr = NULL;
+static CORE_ADDR eh_catch_catch_addr = 0;
/* Address of __d_eh_catch_throw */
-static CORE_ADDR eh_catch_throw_addr = NULL;
+static CORE_ADDR eh_catch_throw_addr = 0;
/* Sal for __d_eh_break */
-static struct symtab_and_line *break_callback_sal = NULL;
+static struct symtab_and_line *break_callback_sal = 0;
/* Code in end.c expects __d_pid to be set in the inferior,
otherwise __d_eh_notify_callback doesn't bother to call
return 0;
}
+#ifndef GDB_TARGET_IS_HPPA_20W
/* Check whether the executable is dynamically linked or archive bound */
/* With an archive-bound executable we can use the raw addresses we find
for the callback function, etc. without modification. For an executable
args.solib_handle = som_solib_get_solib_by_pc (eh_notify_callback_addr);
args.msym = msym;
+ args.return_val = 0;
recurse++;
- eh_notify_callback_addr = catch_errors ((int (*)PARAMS ((char *))) cover_find_stub_with_shl_get,
- (char *) &args,
- message, RETURN_MASK_ALL);
+ catch_errors (cover_find_stub_with_shl_get, (PTR) &args, message,
+ RETURN_MASK_ALL);
+ eh_notify_callback_addr = args.return_val;
recurse--;
exception_catchpoints_are_fragile = 1;
}
else
exception_catchpoints_are_fragile = 0;
+#endif
/* Now, look for the breakpointable routine in end.o */
/* This should also be available in the SOM symbol dict. if end.o linked in */
}
else
{
- warning ("Internal error: Invalid inferior pid? Cannot intercept exception events."); /* purecov: deadcode */
- return (struct symtab_and_line *) -1; /* purecov: deadcode */
+ warning ("Internal error: Invalid inferior pid? Cannot intercept exception events.");
+ return (struct symtab_and_line *) -1;
}
}
return (struct symtab_and_line *) -1;
}
break;
- default: /* purecov: deadcode */
- error ("Request to enable unknown or unsupported exception event."); /* purecov: deadcode */
+ default:
+ error ("Request to enable unknown or unsupported exception event.");
}
/* Copy break address into new sal struct, malloc'ing if needed. */
}
#endif /* PREPARE_TO_PROCEED */
+void
+hppa_skip_permanent_breakpoint ()
+{
+ /* To step over a breakpoint instruction on the PA takes some
+ fiddling with the instruction address queue.
+
+ When we stop at a breakpoint, the IA queue front (the instruction
+ we're executing now) points at the breakpoint instruction, and
+ the IA queue back (the next instruction to execute) points to
+ whatever instruction we would execute after the breakpoint, if it
+ were an ordinary instruction. This is the case even if the
+ breakpoint is in the delay slot of a branch instruction.
+
+ Clearly, to step past the breakpoint, we need to set the queue
+ front to the back. But what do we put in the back? What
+ instruction comes after that one? Because of the branch delay
+ slot, the next insn is always at the back + 4. */
+ write_register (PCOQ_HEAD_REGNUM, read_register (PCOQ_TAIL_REGNUM));
+ write_register (PCSQ_HEAD_REGNUM, read_register (PCSQ_TAIL_REGNUM));
+
+ write_register (PCOQ_TAIL_REGNUM, read_register (PCOQ_TAIL_REGNUM) + 4);
+ /* We can leave the tail's space the same, since there's no jump. */
+}
+
void
_initialize_hppa_tdep ()
{