#include "completer.h"
#include "osabi.h"
#include "gdb_assert.h"
+#include "gdb_stdint.h"
#include "arch-utils.h"
/* For argument passing to the inferior */
#include "symtab.h"
{
if (hppa_debug)
fprintf_unfiltered (gdb_stdlog, "0x%s (cached) }\n",
- paddr_nz ((CORE_ADDR) ui->cache));
+ paddr_nz ((uintptr_t) ui->cache));
return ui->cache;
}
ui->cache = &ui->table[middle];
if (hppa_debug)
fprintf_unfiltered (gdb_stdlog, "0x%s }\n",
- paddr_nz ((CORE_ADDR) ui->cache));
+ paddr_nz ((uintptr_t) ui->cache));
return &ui->table[middle];
}
/* If a structure has to be returned, set up register 28 to hold its
address */
if (struct_return)
- write_register (28, struct_addr);
+ regcache_cooked_write_unsigned (regcache, 28, struct_addr);
gp = tdep->find_global_pointer (function);
if (gp != 0)
- write_register (19, gp);
+ regcache_cooked_write_unsigned (regcache, 19, gp);
/* Set the return address. */
if (!gdbarch_push_dummy_code_p (gdbarch))
}
CORE_ADDR
-hppa_read_pc (ptid_t ptid)
+hppa_read_pc (struct regcache *regcache)
{
ULONGEST ipsw;
- CORE_ADDR pc;
+ ULONGEST pc;
- ipsw = read_register_pid (HPPA_IPSW_REGNUM, ptid);
- pc = read_register_pid (HPPA_PCOQ_HEAD_REGNUM, ptid);
+ regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
+ regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
/* If the current instruction is nullified, then we are effectively
still executing the previous instruction. Pretend we are still
}
void
-hppa_write_pc (CORE_ADDR pc, ptid_t ptid)
+hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
{
- write_register_pid (HPPA_PCOQ_HEAD_REGNUM, pc, ptid);
- write_register_pid (HPPA_PCOQ_TAIL_REGNUM, pc + 4, ptid);
+ regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
+ regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
}
/* return the alignment of a type in bytes. Structures have the maximum
FIXME. Can still die if we have a mix of GR and FR argument
stores! */
- if (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
+ if (reg_num >= (gdbarch_ptr_bit (current_gdbarch) == 64 ? 19 : 23)
+ && reg_num <= 26)
{
- while (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
+ while (reg_num >= (gdbarch_ptr_bit (current_gdbarch) == 64 ? 19 : 23)
+ && reg_num <= 26)
{
pc += 4;
status = read_memory_nobpt (pc, buf, 4);
save. */
if ((inst & 0xfc000000) == 0x34000000
&& inst_saves_fr (next_inst) >= 4
- && inst_saves_fr (next_inst) <= (TARGET_PTR_BIT == 64 ? 11 : 7))
+ && inst_saves_fr (next_inst)
+ <= (gdbarch_ptr_bit (current_gdbarch) == 64 ? 11 : 7))
{
/* So we drop into the code below in a reasonable state. */
reg_num = inst_saves_fr (next_inst);
This is a kludge as on the HP compiler sets this bit and it
never does prologue scheduling. So once we see one, skip past
all of them. */
- if (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
+ if (reg_num >= 4
+ && reg_num <= (gdbarch_ptr_bit (current_gdbarch) == 64 ? 11 : 7))
{
- while (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
+ while (reg_num >= 4
+ && reg_num
+ <= (gdbarch_ptr_bit (current_gdbarch) == 64 ? 11 : 7))
{
pc += 8;
status = read_memory_nobpt (pc, buf, 4);
/* Both we're expecting the SP to be saved and the SP has been
saved. The entry SP value is saved at this frame's SP
address. */
- cache->base = read_memory_integer (this_sp, TARGET_PTR_BIT / 8);
+ cache->base = read_memory_integer
+ (this_sp, gdbarch_ptr_bit (current_gdbarch) / 8);
if (hppa_debug)
fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [saved]",
{
/* Convert all the offsets into addresses. */
int reg;
- for (reg = 0; reg < NUM_REGS; reg++)
+ for (reg = 0; reg < gdbarch_num_regs (current_gdbarch); reg++)
{
if (trad_frame_addr_p (cache->saved_regs, reg))
cache->saved_regs[reg].addr += cache->base;
if (pc == 0
|| (tdep->in_solib_call_trampoline != NULL
&& tdep->in_solib_call_trampoline (pc, NULL))
- || IN_SOLIB_RETURN_TRAMPOLINE (pc, NULL))
+ || gdbarch_in_solib_return_trampoline (current_gdbarch, pc, NULL))
return &hppa_stub_frame_unwind;
return NULL;
}
systems: $$dyncall, import stubs and PLT stubs. */
CORE_ADDR
-hppa_skip_trampoline_code (CORE_ADDR pc)
+hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
{
unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
int dp_rel;
/* $$dyncall handles both PLABELs and direct addresses. */
if (hppa_in_dyncall (pc))
{
- pc = read_register (HPPA_R0_REGNUM + 22);
+ pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
/* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
if (pc & 0x2)
pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
if (dp_rel)
- pc += read_register (HPPA_DP_REGNUM);
+ pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
else
- pc += read_register (HPPA_R0_REGNUM + 19);
+ pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
/* fallthrough */
}