int regno;
{
register unsigned int regaddr;
+ char buf[80];
extern char registers[];
register int i;
-
unsigned int offset = U_REGS_OFFSET;
+ int scratch;
if (regno >= 0)
{
+ if (CANNOT_STORE_REGISTER (regno))
+ return;
regaddr = register_addr (regno, offset);
- for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof(int))
- {
- errno = 0;
- ptrace (PT_WUREGS, inferior_pid, (PTRACE_ARG3_TYPE) regaddr,
- *(int *) ®isters[REGISTER_BYTE (regno) + i]);
- if (errno != 0)
- {
- char *err = safe_strerror (errno);
- char *msg = alloca (strlen (err) + 128);
- sprintf (msg, "writing register %s: %s", reg_names[regno], err);
- warning (msg);
- }
- regaddr += sizeof(int);
- }
+ errno = 0;
+ if (regno == PCOQ_HEAD_REGNUM || regno == PCOQ_TAIL_REGNUM)
+ {
+ scratch = *(int *) ®isters[REGISTER_BYTE (regno)] | 0x3;
+ ptrace (PT_WUREGS, inferior_pid, (PTRACE_ARG3_TYPE) regaddr,
+ scratch);
+ if (errno != 0)
+ {
+ /* Error, even if attached. Failing to write these two
+ registers is pretty serious. */
+ sprintf (buf, "writing register number %d", regno);
+ perror_with_name (buf);
+ }
+ }
+ else
+ for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof(int))
+ {
+ errno = 0;
+ ptrace (PT_WUREGS, inferior_pid, (PTRACE_ARG3_TYPE) regaddr,
+ *(int *) ®isters[REGISTER_BYTE (regno) + i]);
+ if (errno != 0)
+ {
+ /* Warning, not error, in case we are attached; sometimes the
+ kernel doesn't let us at the registers. */
+ char *err = safe_strerror (errno);
+ char *msg = alloca (strlen (err) + 128);
+ sprintf (msg, "writing register %s: %s",
+ reg_names[regno], err);
+ warning (msg);
+ return;
+ }
+ regaddr += sizeof(int);
+ }
}
else
- {
- for (regno = 0; regno < NUM_REGS; regno++)
- {
- if (CANNOT_STORE_REGISTER (regno))
- continue;
- store_inferior_registers (regno);
- }
- }
- return;
+ for (regno = 0; regno < NUM_REGS; regno++)
+ store_inferior_registers (regno);
}
+/* PT_PROT is specific to the PA BSD kernel and isn't documented
+ anywhere (except here).
+
+ PT_PROT allows one to enable/disable the data memory break bit
+ for pages of memory in an inferior process. This bit is used
+ to cause "Data memory break traps" to occur when the appropriate
+ page is written to.
+
+ The arguments are as follows:
+
+ PT_PROT -- The ptrace action to perform.
+
+ INFERIOR_PID -- The pid of the process who's page table entries
+ will be modified.
+
+ PT_ARGS -- The *address* of a 3 word block of memory which has
+ additional information:
+
+ word 0 -- The start address to watch. This should be a page-aligned
+ address.
+
+ word 1 -- The ending address to watch. Again, this should be a
+ page aligned address.
+
+ word 2 -- Nonzero to enable the data memory break bit on the
+ given address range or zero to disable the data memory break
+ bit on the given address range.
+
+ This call may fail if the given addresses are not valid in the inferior
+ process. This most often happens when restarting a program which
+ as watchpoints inserted on heap or stack memory. */
+
+#define PT_PROT 21
+
+int
+hppa_set_watchpoint (addr, len, flag)
+ int addr, len, flag;
+{
+ int pt_args[3];
+ pt_args[0] = addr;
+ pt_args[1] = addr + len;
+ pt_args[2] = flag;
+
+ /* Mask off the lower 12 bits since we want to work on a page basis. */
+ pt_args[0] >>= 12;
+ pt_args[1] >>= 12;
+
+ /* Rounding adjustments. */
+ pt_args[1] -= pt_args[0];
+ pt_args[1]++;
+
+ /* Put the lower 12 bits back as zero. */
+ pt_args[0] <<= 12;
+ pt_args[1] <<= 12;
+
+ /* Do it. */
+ return ptrace (PT_PROT, inferior_pid, (PTRACE_ARG3_TYPE) pt_args, 0);
+}