Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
- 2010 Free Software Foundation, Inc.
+ 2010, 2011 Free Software Foundation, Inc.
This file is part of GDB.
#include "features/i386/i386.c"
#include "features/i386/i386-avx.c"
+#include "features/i386/i386-mmx.c"
/* Register names. */
return regnum >= 0 && regnum < tdep->num_dword_regs;
}
-int
+static int
i386_ymmh_regnum_p (struct gdbarch *gdbarch, int regnum)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
static int
i386_absolute_jmp_p (const gdb_byte *insn)
{
- /* jmp far (absolute address in operand) */
+ /* jmp far (absolute address in operand). */
if (insn[0] == 0xea)
return 1;
if (insn[0] == 0xff)
{
- /* jump near, absolute indirect (/4) */
+ /* jump near, absolute indirect (/4). */
if ((insn[1] & 0x38) == 0x20)
return 1;
- /* jump far, absolute indirect (/5) */
+ /* jump far, absolute indirect (/5). */
if ((insn[1] & 0x38) == 0x28)
return 1;
}
static int
i386_absolute_call_p (const gdb_byte *insn)
{
- /* call far, absolute */
+ /* call far, absolute. */
if (insn[0] == 0x9a)
return 1;
if (insn[0] == 0xff)
{
- /* Call near, absolute indirect (/2) */
+ /* Call near, absolute indirect (/2). */
if ((insn[1] & 0x38) == 0x10)
return 1;
- /* Call far, absolute indirect (/3) */
+ /* Call far, absolute indirect (/3). */
if ((insn[1] & 0x38) == 0x18)
return 1;
}
{
switch (insn[0])
{
- case 0xc2: /* ret near, pop N bytes */
+ case 0xc2: /* ret near, pop N bytes. */
case 0xc3: /* ret near */
- case 0xca: /* ret far, pop N bytes */
+ case 0xca: /* ret far, pop N bytes. */
case 0xcb: /* ret far */
case 0xcf: /* iret */
return 1;
if (i386_absolute_call_p (insn))
return 1;
- /* call near, relative */
+ /* call near, relative. */
if (insn[0] == 0xe8)
return 1;
length in bytes. Otherwise, return zero. */
static int
-i386_syscall_p (const gdb_byte *insn, ULONGEST *lengthp)
+i386_syscall_p (const gdb_byte *insn, int *lengthp)
{
if (insn[0] == 0xcd)
{
return 0;
}
+/* Some kernels may run one past a syscall insn, so we have to cope.
+ Otherwise this is just simple_displaced_step_copy_insn. */
+
+struct displaced_step_closure *
+i386_displaced_step_copy_insn (struct gdbarch *gdbarch,
+ CORE_ADDR from, CORE_ADDR to,
+ struct regcache *regs)
+{
+ size_t len = gdbarch_max_insn_length (gdbarch);
+ gdb_byte *buf = xmalloc (len);
+
+ read_memory (from, buf, len);
+
+ /* GDB may get control back after the insn after the syscall.
+ Presumably this is a kernel bug.
+ If this is a syscall, make sure there's a nop afterwards. */
+ {
+ int syscall_length;
+ gdb_byte *insn;
+
+ insn = i386_skip_prefixes (buf, len);
+ if (insn != NULL && i386_syscall_p (insn, &syscall_length))
+ insn[syscall_length] = NOP_OPCODE;
+ }
+
+ write_memory (to, buf, len);
+
+ if (debug_displaced)
+ {
+ fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
+ paddress (gdbarch, from), paddress (gdbarch, to));
+ displaced_step_dump_bytes (gdb_stdlog, buf, len);
+ }
+
+ return (struct displaced_step_closure *) buf;
+}
+
/* Fix up the state of registers and memory after having single-stepped
a displaced instruction. */
&& ! i386_ret_p (insn))
{
ULONGEST orig_eip;
- ULONGEST insn_len;
+ int insn_len;
regcache_cooked_read_unsigned (regs, I386_EIP_REGNUM, &orig_eip);
it unrelocated. Goodness help us if there are PC-relative
system calls. */
if (i386_syscall_p (insn, &insn_len)
- && orig_eip != to + (insn - insn_start) + insn_len)
+ && orig_eip != to + (insn - insn_start) + insn_len
+ /* GDB can get control back after the insn after the syscall.
+ Presumably this is a kernel bug.
+ i386_displaced_step_copy_insn ensures its a nop,
+ we add one to the length for it. */
+ && orig_eip != to + (insn - insn_start) + insn_len + 1)
{
if (debug_displaced)
fprintf_unfiltered (gdb_stdlog,
paddress (gdbarch, retaddr));
}
}
+
+static void
+append_insns (CORE_ADDR *to, ULONGEST len, const gdb_byte *buf)
+{
+ target_write_memory (*to, buf, len);
+ *to += len;
+}
+
+static void
+i386_relocate_instruction (struct gdbarch *gdbarch,
+ CORE_ADDR *to, CORE_ADDR oldloc)
+{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ gdb_byte buf[I386_MAX_INSN_LEN];
+ int offset = 0, rel32, newrel;
+ int insn_length;
+ gdb_byte *insn = buf;
+
+ read_memory (oldloc, buf, I386_MAX_INSN_LEN);
+
+ insn_length = gdb_buffered_insn_length (gdbarch, insn,
+ I386_MAX_INSN_LEN, oldloc);
+
+ /* Get past the prefixes. */
+ insn = i386_skip_prefixes (insn, I386_MAX_INSN_LEN);
+
+ /* Adjust calls with 32-bit relative addresses as push/jump, with
+ the address pushed being the location where the original call in
+ the user program would return to. */
+ if (insn[0] == 0xe8)
+ {
+ gdb_byte push_buf[16];
+ unsigned int ret_addr;
+
+ /* Where "ret" in the original code will return to. */
+ ret_addr = oldloc + insn_length;
+ push_buf[0] = 0x68; /* pushq $... */
+ memcpy (&push_buf[1], &ret_addr, 4);
+ /* Push the push. */
+ append_insns (to, 5, push_buf);
+
+ /* Convert the relative call to a relative jump. */
+ insn[0] = 0xe9;
+
+ /* Adjust the destination offset. */
+ rel32 = extract_signed_integer (insn + 1, 4, byte_order);
+ newrel = (oldloc - *to) + rel32;
+ store_signed_integer (insn + 1, 4, newrel, byte_order);
+
+ /* Write the adjusted jump into its displaced location. */
+ append_insns (to, 5, insn);
+ return;
+ }
+
+ /* Adjust jumps with 32-bit relative addresses. Calls are already
+ handled above. */
+ if (insn[0] == 0xe9)
+ offset = 1;
+ /* Adjust conditional jumps. */
+ else if (insn[0] == 0x0f && (insn[1] & 0xf0) == 0x80)
+ offset = 2;
+
+ if (offset)
+ {
+ rel32 = extract_signed_integer (insn + offset, 4, byte_order);
+ newrel = (oldloc - *to) + rel32;
+ store_signed_integer (insn + offset, 4, newrel, byte_order);
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog,
+ "Adjusted insn rel32=0x%s at 0x%s to"
+ " rel32=0x%s at 0x%s\n",
+ hex_string (rel32), paddress (gdbarch, oldloc),
+ hex_string (newrel), paddress (gdbarch, *to));
+ }
+
+ /* Write the adjusted instructions into their displaced
+ location. */
+ append_insns (to, insn_length, buf);
+}
+
\f
#ifdef I386_REGNO_TO_SYMMETRY
#error "The Sequent Symmetry is no longer supported."
struct i386_insn i386_frame_setup_skip_insns[] =
{
- /* Check for `movb imm8, r' and `movl imm32, r'.
+ /* Check for `movb imm8, r' and `movl imm32, r'.
??? Should we handle 16-bit operand-sizes here? */
}
else
internal_error (__FILE__, __LINE__,
- _("Cannot extract return value of %d bytes long."), len);
+ _("Cannot extract return value of %d bytes long."),
+ len);
}
}
init_vector_type (bt->builtin_int128, 2));
TYPE_VECTOR (t) = 1;
- TYPE_NAME (t) = "builtin_type_vec128i";
+ TYPE_NAME (t) = "builtin_type_vec256i";
tdep->i386_ymm_type = t;
}
}
/* Return the GDB type object for the "standard" data type of data in
- register REGNUM. */
+ register REGNUM. */
static struct type *
i386_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
{
regnum -= tdep->ymm0_regnum;
- /* Extract (always little endian). Read lower 128bits. */
+ /* Extract (always little endian). Read lower 128bits. */
regcache_raw_read (regcache,
I387_XMM0_REGNUM (tdep) + regnum,
raw_buf);
needs any special handling. */
static int
-i386_convert_register_p (struct gdbarch *gdbarch, int regnum, struct type *type)
+i386_convert_register_p (struct gdbarch *gdbarch,
+ int regnum, struct type *type)
{
int len = TYPE_LENGTH (type);
struct regcache *regcache, int regnum,
const void *xstateregs, size_t len)
{
- const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
i387_supply_xsave (regcache, regnum, xstateregs);
}
const struct regcache *regcache,
int regnum, void *xstateregs, size_t len)
{
- const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
i387_collect_xsave (regcache, regnum, xstateregs, 1);
}
tdep->jb_pc_offset = 36;
/* DJGPP does not support the SSE registers. */
- tdep->num_xmm_regs = 0;
- set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I387_NUM_REGS);
+ if (! tdesc_has_registers (info.target_desc))
+ tdep->tdesc = tdesc_i386_mmx;
/* Native compiler is GCC, which uses the SVR4 register numbering
even in COFF and STABS. See the comment in i386_gdbarch_init,
set_gdbarch_sdb_reg_to_regnum. */
set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
+
+ set_gdbarch_has_dos_based_file_system (gdbarch, 1);
}
\f
};
/* Parse "modrm" part in current memory address that irp->addr point to
- Return -1 if something wrong. */
+ Return -1 if something wrong. */
static int
i386_record_modrm (struct i386_record_s *irp)
/* Get the memory address that current instruction write to and set it to
the argument "addr".
- Return -1 if something wrong. */
+ Return -1 if something wrong. */
static int
i386_record_lea_modrm_addr (struct i386_record_s *irp, uint64_t *addr)
/* Record the value of the memory that willbe changed in current instruction
to "record_arch_list".
- Return -1 if something wrong. */
+ Return -1 if something wrong. */
static int
i386_record_lea_modrm (struct i386_record_s *irp)
if (irp->override >= 0)
{
- warning (_("Process record ignores the memory change "
- "of instruction at address %s because it "
- "can't get the value of the segment register."),
- paddress (gdbarch, irp->orig_addr));
+ if (record_memory_query)
+ {
+ int q;
+
+ target_terminal_ours ();
+ q = yquery (_("\
+Process record ignores the memory change of instruction at address %s\n\
+because it can't get the value of the segment register.\n\
+Do you want to stop the program?"),
+ paddress (gdbarch, irp->orig_addr));
+ target_terminal_inferior ();
+ if (q)
+ return -1;
+ }
+
return 0;
}
}
/* Record the push operation to "record_arch_list".
- Return -1 if something wrong. */
+ Return -1 if something wrong. */
static int
i386_record_push (struct i386_record_s *irp, int size)
#define I386_SAVE_FPU_ENV 0xfffe
#define I386_SAVE_FPU_ENV_REG_STACK 0xffff
-/* Record the value of floating point registers which will be changed by the
- current instruction to "record_arch_list". Return -1 if something is wrong.
-*/
+/* Record the value of floating point registers which will be changed
+ by the current instruction to "record_arch_list". Return -1 if
+ something is wrong. */
static int i386_record_floats (struct gdbarch *gdbarch,
struct i386_record_s *ir,
/* Parse the current instruction and record the values of the registers and
memory that will be changed in current instruction to "record_arch_list".
- Return -1 if something wrong. */
+ Return -1 if something wrong. */
#define I386_RECORD_ARCH_LIST_ADD_REG(regnum) \
record_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)])
else if (ir.regmap[X86_RECORD_R8_REGNUM])
ir.aflag = 2;
- /* now check op code */
+ /* Now check op code. */
opcode = (uint32_t) opcode8;
reswitch:
switch (opcode)
case 0xa3:
if (ir.override >= 0)
{
- warning (_("Process record ignores the memory change "
- "of instruction at address %s because "
- "it can't get the value of the segment "
- "register."),
- paddress (gdbarch, ir.orig_addr));
+ if (record_memory_query)
+ {
+ int q;
+
+ target_terminal_ours ();
+ q = yquery (_("\
+Process record ignores the memory change of instruction at address %s\n\
+because it can't get the value of the segment register.\n\
+Do you want to stop the program?"),
+ paddress (gdbarch, ir.orig_addr));
+ target_terminal_inferior ();
+ if (q)
+ return -1;
+ }
}
else
{
ir.reg |= ((opcode & 7) << 3);
if (ir.mod != 3)
{
- /* Memory. */
+ /* Memory. */
uint64_t addr64;
if (i386_record_lea_modrm_addr (&ir, &addr64))
if (ir.aflag && (es != ds))
{
/* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
- warning (_("Process record ignores the memory "
- "change of instruction at address %s "
- "because it can't get the value of the "
- "ES segment register."),
- paddress (gdbarch, ir.orig_addr));
+ if (record_memory_query)
+ {
+ int q;
+
+ target_terminal_ours ();
+ q = yquery (_("\
+Process record ignores the memory change of instruction at address %s\n\
+because it can't get the value of the segment register.\n\
+Do you want to stop the program?"),
+ paddress (gdbarch, ir.orig_addr));
+ target_terminal_inferior ();
+ if (q)
+ return -1;
+ }
}
else
{
break;
case 0x0f31: /* rdtsc */
- printf_unfiltered (_("Process record does not support "
- "instruction rdtsc.\n"));
- ir.addr -= 2;
- goto no_support;
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
break;
case 0x0f34: /* sysenter */
}
if (ir.override >= 0)
{
- warning (_("Process record ignores the memory "
- "change of instruction at "
- "address %s because it can't get "
- "the value of the segment "
- "register."),
- paddress (gdbarch, ir.orig_addr));
+ if (record_memory_query)
+ {
+ int q;
+
+ target_terminal_ours ();
+ q = yquery (_("\
+Process record ignores the memory change of instruction at address %s\n\
+because it can't get the value of the segment register.\n\
+Do you want to stop the program?"),
+ paddress (gdbarch, ir.orig_addr));
+ target_terminal_inferior ();
+ if (q)
+ return -1;
+ }
}
else
{
/* sidt */
if (ir.override >= 0)
{
- warning (_("Process record ignores the memory "
- "change of instruction at "
- "address %s because it can't get "
- "the value of the segment "
- "register."),
- paddress (gdbarch, ir.orig_addr));
+ if (record_memory_query)
+ {
+ int q;
+
+ target_terminal_ours ();
+ q = yquery (_("\
+Process record ignores the memory change of instruction at address %s\n\
+because it can't get the value of the segment register.\n\
+Do you want to stop the program?"),
+ paddress (gdbarch, ir.orig_addr));
+ target_terminal_inferior ();
+ if (q)
+ return -1;
+ }
}
else
{
case 0x660f3804: /* pmaddubsw */
case 0x660f3805: /* phsubw */
case 0x660f3806: /* phsubd */
- case 0x660f3807: /* phaddsw */
+ case 0x660f3807: /* phsubsw */
case 0x660f3808: /* psignb */
case 0x660f3809: /* psignw */
case 0x660f380a: /* psignd */
case 0x660f63: /* packsswb */
case 0x660f64: /* pcmpgtb */
case 0x660f65: /* pcmpgtw */
- case 0x660f66: /* pcmpgtl */
+ case 0x660f66: /* pcmpgtd */
case 0x660f67: /* packuswb */
case 0x660f68: /* punpckhbw */
case 0x660f69: /* punpckhwd */
case 0xf30f70: /* pshufhw */
case 0x660f74: /* pcmpeqb */
case 0x660f75: /* pcmpeqw */
- case 0x660f76: /* pcmpeql */
+ case 0x660f76: /* pcmpeqd */
case 0x660f7c: /* haddpd */
case 0xf20f7c: /* haddps */
case 0x660f7d: /* hsubpd */
case 0x660fed: /* paddsw */
case 0x660fee: /* pmaxsw */
case 0x660fef: /* pxor */
- case 0x660ff0: /* lddqu */
+ case 0xf20ff0: /* lddqu */
case 0x660ff1: /* psllw */
case 0x660ff2: /* pslld */
case 0x660ff3: /* psllq */
case 0x660ff6: /* psadbw */
case 0x660ff8: /* psubb */
case 0x660ff9: /* psubw */
- case 0x660ffa: /* psubl */
+ case 0x660ffa: /* psubd */
case 0x660ffb: /* psubq */
case 0x660ffc: /* paddb */
case 0x660ffd: /* paddw */
- case 0x660ffe: /* paddl */
+ case 0x660ffe: /* paddd */
if (i386_record_modrm (&ir))
return -1;
ir.reg |= rex_r;
|| opcode == 0x0f17 || opcode == 0x660f17)
goto no_support;
ir.rm |= ir.rex_b;
- if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ if (!i386_xmm_regnum_p (gdbarch,
+ I387_XMM0_REGNUM (tdep) + ir.rm))
goto no_support;
record_arch_list_add_reg (ir.regcache,
I387_XMM0_REGNUM (tdep) + ir.rm);
case 0x0f3804: /* pmaddubsw */
case 0x0f3805: /* phsubw */
case 0x0f3806: /* phsubd */
- case 0x0f3807: /* phaddsw */
+ case 0x0f3807: /* phsubsw */
case 0x0f3808: /* psignb */
case 0x0f3809: /* psignw */
case 0x0f380a: /* psignd */
case 0x0f63: /* packsswb */
case 0x0f64: /* pcmpgtb */
case 0x0f65: /* pcmpgtw */
- case 0x0f66: /* pcmpgtl */
+ case 0x0f66: /* pcmpgtd */
case 0x0f67: /* packuswb */
case 0x0f68: /* punpckhbw */
case 0x0f69: /* punpckhwd */
case 0x0f70: /* pshufw */
case 0x0f74: /* pcmpeqb */
case 0x0f75: /* pcmpeqw */
- case 0x0f76: /* pcmpeql */
+ case 0x0f76: /* pcmpeqd */
case 0x0fc4: /* pinsrw */
case 0x0fd1: /* psrlw */
case 0x0fd2: /* psrld */
case 0x0ff6: /* psadbw */
case 0x0ff8: /* psubb */
case 0x0ff9: /* psubw */
- case 0x0ffa: /* psubl */
+ case 0x0ffa: /* psubd */
case 0x0ffb: /* psubq */
case 0x0ffc: /* paddb */
case 0x0ffd: /* paddw */
- case 0x0ffe: /* paddl */
+ case 0x0ffe: /* paddd */
if (i386_record_modrm (&ir))
return -1;
if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
if (ir.mod == 3)
{
ir.rm |= ir.rex_b;
- if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ if (!i386_xmm_regnum_p (gdbarch,
+ I387_XMM0_REGNUM (tdep) + ir.rm))
goto no_support;
record_arch_list_add_reg (ir.regcache,
I387_XMM0_REGNUM (tdep) + ir.rm);
/* Return a bit of target-specific detail to add to the caller's
generic failure message. */
if (msg)
- *msg = xstrprintf (_("; instruction is only %d bytes long, need at least %d bytes for the jump"),
+ *msg = xstrprintf (_("; instruction is only %d bytes long, "
+ "need at least %d bytes for the jump"),
len, jumplen);
return 0;
}
/* Get core registers. */
feature_core = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.core");
+ if (feature_core == NULL)
+ return 0;
/* Get SSE registers. */
feature_sse = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.sse");
- if (feature_core == NULL || feature_sse == NULL)
- return 0;
-
/* Try AVX registers. */
feature_avx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx");
/* The XCR0 bits. */
if (feature_avx)
{
+ /* AVX register description requires SSE register description. */
+ if (!feature_sse)
+ return 0;
+
tdep->xcr0 = I386_XSTATE_AVX_MASK;
/* It may have been set by OSABI initialization function. */
tdep->ymm0h_regnum + i,
tdep->ymmh_register_names[i]);
}
- else
+ else if (feature_sse)
tdep->xcr0 = I386_XSTATE_SSE_MASK;
+ else
+ {
+ tdep->xcr0 = I386_XSTATE_X87_MASK;
+ tdep->num_xmm_regs = 0;
+ }
num_regs = tdep->num_core_regs;
for (i = 0; i < num_regs; i++)
valid_p &= tdesc_numbered_register (feature_core, tdesc_data, i,
tdep->register_names[i]);
- /* Need to include %mxcsr, so add one. */
- num_regs += tdep->num_xmm_regs + 1;
- for (; i < num_regs; i++)
- valid_p &= tdesc_numbered_register (feature_sse, tdesc_data, i,
- tdep->register_names[i]);
+ if (feature_sse)
+ {
+ /* Need to include %mxcsr, so add one. */
+ num_regs += tdep->num_xmm_regs + 1;
+ for (; i < num_regs; i++)
+ valid_p &= tdesc_numbered_register (feature_sse, tdesc_data, i,
+ tdep->register_names[i]);
+ }
return valid_p;
}
and the SSE registers. This can be overridden for a specific ABI
by adjusting the members `st0_regnum', `mm0_regnum' and
`num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
- will show up in the output of "info all-registers". Ideally we
- should try to autodetect whether they are available, such that we
- can prevent "info all-registers" from displaying registers that
- aren't available.
-
- NOTE: kevinb/2003-07-13: ... if it's a choice between printing
- [the SSE registers] always (even when they don't exist) or never
- showing them to the user (even when they do exist), I prefer the
- former over the latter. */
+ will show up in the output of "info all-registers". */
tdep->st0_regnum = I386_ST0_REGNUM;
tdesc_data = tdesc_data_alloc ();
+ set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
+
/* Hook in ABI-specific overrides, if they have been registered. */
info.tdep_info = (void *) tdesc_data;
gdbarch_init_osabi (info, gdbarch);
ymm0_regnum = tdep->ax_regnum + tdep->num_word_regs;
if (tdep->num_dword_regs)
{
- /* Support dword pseudo-registesr if it hasn't been disabled, */
+ /* Support dword pseudo-register if it hasn't been disabled. */
tdep->eax_regnum = ymm0_regnum;
ymm0_regnum += tdep->num_dword_regs;
}
mm0_regnum = ymm0_regnum;
if (tdep->num_ymm_regs)
{
- /* Support YMM pseudo-registesr if it is available, */
+ /* Support YMM pseudo-register if it is available. */
tdep->ymm0_regnum = ymm0_regnum;
mm0_regnum += tdep->num_ymm_regs;
}
if (tdep->num_mmx_regs != 0)
{
- /* Support MMX pseudo-registesr if MMX hasn't been disabled, */
+ /* Support MMX pseudo-register if MMX hasn't been disabled. */
tdep->mm0_regnum = mm0_regnum;
}
else
/* Initialize the standard target descriptions. */
initialize_tdesc_i386 ();
+ initialize_tdesc_i386_mmx ();
initialize_tdesc_i386_avx ();
/* Tell remote stub that we support XML target description. */
projects / deliverable / binutils-gdb.git / blobdiff