/* Intel 386 target-dependent stuff.
- Copyright (C) 1988-2018 Free Software Foundation, Inc.
+ Copyright (C) 1988-2019 Free Software Foundation, Inc.
This file is part of GDB.
#include "remote.h"
#include "i386-tdep.h"
#include "i387-tdep.h"
-#include "x86-xstate.h"
+#include "common/x86-xstate.h"
#include "x86-tdep.h"
#include "record.h"
}
/* This will hopefully provoke a warning. */
- return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch);
+ return gdbarch_num_cooked_regs (gdbarch);
}
/* Convert SVR4 DWARF register number REG to the appropriate register number
int regnum = i386_svr4_dwarf_reg_to_regnum (gdbarch, reg);
if (regnum == -1)
- return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch);
+ return gdbarch_num_cooked_regs (gdbarch);
return regnum;
}
cache = i386_alloc_frame_cache ();
*this_cache = cache;
- TRY
+ try
{
i386_frame_cache_1 (this_frame, cache);
}
- CATCH (ex, RETURN_MASK_ERROR)
+ catch (const gdb_exception_error &ex)
{
if (ex.error != NOT_AVAILABLE_ERROR)
- throw_exception (ex);
+ throw;
}
- END_CATCH
return cache;
}
cache = i386_alloc_frame_cache ();
*this_cache = cache;
- TRY
+ try
{
cache->pc = get_frame_func (this_frame);
cache->base_p = 1;
}
- CATCH (ex, RETURN_MASK_ERROR)
+ catch (const gdb_exception_error &ex)
{
if (ex.error != NOT_AVAILABLE_ERROR)
- throw_exception (ex);
+ throw;
}
- END_CATCH
return cache;
}
cache = i386_alloc_frame_cache ();
- TRY
+ try
{
get_frame_register (this_frame, I386_ESP_REGNUM, buf);
cache->base = extract_unsigned_integer (buf, 4, byte_order) - 4;
cache->base_p = 1;
}
- CATCH (ex, RETURN_MASK_ERROR)
+ catch (const gdb_exception_error &ex)
{
if (ex.error != NOT_AVAILABLE_ERROR)
- throw_exception (ex);
+ throw;
}
- END_CATCH
*this_cache = cache;
return cache;
static CORE_ADDR
i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
- struct value **args, CORE_ADDR sp, int struct_return,
+ struct value **args, CORE_ADDR sp,
+ function_call_return_method return_method,
CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
{
int args_space_used = 0;
- if (struct_return)
+ if (return_method == return_method_struct)
{
if (write_pass)
{
{
if ((regnum == i || regnum == -1)
&& tdep->gregset_reg_offset[i] != -1)
- regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]);
+ regcache->raw_supply (i, regs + tdep->gregset_reg_offset[i]);
}
}
{
if ((regnum == i || regnum == -1)
&& tdep->gregset_reg_offset[i] != -1)
- regcache_raw_collect (regcache, i, regs + tdep->gregset_reg_offset[i]);
+ regcache->raw_collect (i, regs + tdep->gregset_reg_offset[i]);
}
}
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- cb (".reg", tdep->sizeof_gregset, &i386_gregset, NULL, cb_data);
+ cb (".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, &i386_gregset, NULL,
+ cb_data);
if (tdep->sizeof_fpregset)
- cb (".reg2", tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data);
+ cb (".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset,
+ NULL, cb_data);
}
\f
const struct tdesc_feature *feature_core;
const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx,
- *feature_avx512, *feature_pkeys;
+ *feature_avx512, *feature_pkeys, *feature_segments;
int i, num_regs, valid_p;
if (! tdesc_has_registers (tdesc))
/* Try AVX512 registers. */
feature_avx512 = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx512");
+ /* Try segment base registers. */
+ feature_segments = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.segments");
+
/* Try PKEYS */
feature_pkeys = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.pkeys");
tdep->mpx_register_names[i]);
}
+ if (feature_segments)
+ {
+ if (tdep->fsbase_regnum < 0)
+ tdep->fsbase_regnum = I386_FSBASE_REGNUM;
+ valid_p &= tdesc_numbered_register (feature_segments, tdesc_data,
+ tdep->fsbase_regnum, "fs_base");
+ valid_p &= tdesc_numbered_register (feature_segments, tdesc_data,
+ tdep->fsbase_regnum + 1, "gs_base");
+ }
+
if (feature_pkeys)
{
tdep->xcr0 |= X86_XSTATE_PKRU;
return 4;
}
- return TYPE_LENGTH (type);
+ return 0;
}
\f
/* Even though the default ABI only includes general-purpose registers,
floating-point registers and the SSE registers, we have to leave a
gap for the upper AVX, MPX and AVX512 registers. */
- set_gdbarch_num_regs (gdbarch, I386_PKEYS_NUM_REGS);
+ set_gdbarch_num_regs (gdbarch, I386_NUM_REGS);
set_gdbarch_gnu_triplet_regexp (gdbarch, i386_gnu_triplet_regexp);
/* Get the x86 target description from INFO. */
tdesc = info.target_desc;
if (! tdesc_has_registers (tdesc))
- tdesc = i386_target_description (X86_XSTATE_SSE_MASK);
+ tdesc = i386_target_description (X86_XSTATE_SSE_MASK, false);
tdep->tdesc = tdesc;
tdep->num_core_regs = I386_NUM_GREGS + I387_NUM_REGS;
tdep->pkru_regnum = -1;
tdep->num_pkeys_regs = 0;
+ /* No segment base registers. */
+ tdep->fsbase_regnum = -1;
+
tdesc_data = tdesc_data_alloc ();
set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
/* Return the target description for a specified XSAVE feature mask. */
const struct target_desc *
-i386_target_description (uint64_t xcr0)
+i386_target_description (uint64_t xcr0, bool segments)
{
static target_desc *i386_tdescs \
- [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/] = {};
+ [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
target_desc **tdesc;
tdesc = &i386_tdescs[(xcr0 & X86_XSTATE_SSE) ? 1 : 0]
[(xcr0 & X86_XSTATE_AVX) ? 1 : 0]
[(xcr0 & X86_XSTATE_MPX) ? 1 : 0]
[(xcr0 & X86_XSTATE_AVX512) ? 1 : 0]
- [(xcr0 & X86_XSTATE_PKRU) ? 1 : 0];
+ [(xcr0 & X86_XSTATE_PKRU) ? 1 : 0]
+ [segments ? 1 : 0];
if (*tdesc == NULL)
- *tdesc = i386_create_target_description (xcr0, false);
+ *tdesc = i386_create_target_description (xcr0, false, segments);
return *tdesc;
}
for (auto &a : xml_masks)
{
- auto tdesc = i386_target_description (a.mask);
+ auto tdesc = i386_target_description (a.mask, false);
selftests::record_xml_tdesc (a.xml, tdesc);
}