#include "osabi.h"
#include "regcache.h"
#include "reggroups.h"
+#include "regset.h"
#include "symfile.h"
#include "symtab.h"
#include "target.h"
#include "value.h"
+#include "dis-asm.h"
#include "gdb_assert.h"
#include "gdb_string.h"
"mxcsr"
};
-static const int i386_num_register_names =
- (sizeof (i386_register_names) / sizeof (*i386_register_names));
+static const int i386_num_register_names = ARRAY_SIZE (i386_register_names);
/* MMX registers. */
"mm4", "mm5", "mm6", "mm7"
};
-static const int i386_num_mmx_regs =
- (sizeof (i386_mmx_names) / sizeof (i386_mmx_names[0]));
-
-#define MM0_REGNUM NUM_REGS
+static const int i386_num_mmx_regs = ARRAY_SIZE (i386_mmx_names);
static int
-i386_mmx_regnum_p (int regnum)
+i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum)
{
- return (regnum >= MM0_REGNUM
- && regnum < MM0_REGNUM + i386_num_mmx_regs);
+ int mm0_regnum = gdbarch_tdep (gdbarch)->mm0_regnum;
+
+ if (mm0_regnum < 0)
+ return 0;
+
+ return (regnum >= mm0_regnum && regnum < mm0_regnum + i386_num_mmx_regs);
}
-/* FP register? */
+/* SSE register? */
-int
-i386_fp_regnum_p (int regnum)
+static int
+i386_sse_regnum_p (struct gdbarch *gdbarch, int regnum)
{
- return (regnum < NUM_REGS
- && (FP0_REGNUM && FP0_REGNUM <= regnum && regnum < FPC_REGNUM));
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+#define I387_ST0_REGNUM tdep->st0_regnum
+#define I387_NUM_XMM_REGS tdep->num_xmm_regs
+
+ if (I387_NUM_XMM_REGS == 0)
+ return 0;
+
+ return (I387_XMM0_REGNUM <= regnum && regnum < I387_MXCSR_REGNUM);
+
+#undef I387_ST0_REGNUM
+#undef I387_NUM_XMM_REGS
}
-int
-i386_fpc_regnum_p (int regnum)
+static int
+i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum)
{
- return (regnum < NUM_REGS
- && (FPC_REGNUM <= regnum && regnum < XMM0_REGNUM));
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+#define I387_ST0_REGNUM tdep->st0_regnum
+#define I387_NUM_XMM_REGS tdep->num_xmm_regs
+
+ if (I387_NUM_XMM_REGS == 0)
+ return 0;
+
+ return (regnum == I387_MXCSR_REGNUM);
+
+#undef I387_ST0_REGNUM
+#undef I387_NUM_XMM_REGS
}
-/* SSE register? */
+#define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
+#define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
+#define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
+
+/* FP register? */
int
-i386_sse_regnum_p (int regnum)
+i386_fp_regnum_p (int regnum)
{
- return (regnum < NUM_REGS
- && (XMM0_REGNUM <= regnum && regnum < MXCSR_REGNUM));
+ if (I387_ST0_REGNUM < 0)
+ return 0;
+
+ return (I387_ST0_REGNUM <= regnum && regnum < I387_FCTRL_REGNUM);
}
int
-i386_mxcsr_regnum_p (int regnum)
+i386_fpc_regnum_p (int regnum)
{
- return (regnum < NUM_REGS
- && regnum == MXCSR_REGNUM);
+ if (I387_ST0_REGNUM < 0)
+ return 0;
+
+ return (I387_FCTRL_REGNUM <= regnum && regnum < I387_XMM0_REGNUM);
}
/* Return the name of register REG. */
const char *
i386_register_name (int reg)
{
- if (i386_mmx_regnum_p (reg))
- return i386_mmx_names[reg - MM0_REGNUM];
+ if (i386_mmx_regnum_p (current_gdbarch, reg))
+ return i386_mmx_names[reg - I387_MM0_REGNUM];
if (reg >= 0 && reg < i386_num_register_names)
return i386_register_names[reg];
else if (reg >= 12 && reg <= 19)
{
/* Floating-point registers. */
- return reg - 12 + FP0_REGNUM;
+ return reg - 12 + I387_ST0_REGNUM;
}
else if (reg >= 21 && reg <= 28)
{
/* SSE registers. */
- return reg - 21 + XMM0_REGNUM;
+ return reg - 21 + I387_XMM0_REGNUM;
}
else if (reg >= 29 && reg <= 36)
{
/* MMX registers. */
- return reg - 29 + MM0_REGNUM;
+ return reg - 29 + I387_MM0_REGNUM;
}
/* This will hopefully provoke a warning. */
else if (reg >= 11 && reg <= 18)
{
/* Floating-point registers. */
- return reg - 11 + FP0_REGNUM;
+ return reg - 11 + I387_ST0_REGNUM;
}
else if (reg >= 21)
{
/* This will hopefully provoke a warning. */
return NUM_REGS + NUM_PSEUDO_REGS;
}
+
+#undef I387_ST0_REGNUM
+#undef I387_MM0_REGNUM
+#undef I387_NUM_XMM_REGS
\f
/* This is the variable that is set with "set disassembly-flavor", and
struct i386_frame_cache *cache)
{
unsigned char op;
+ int skip = 0;
if (current_pc <= pc)
return current_pc;
if (current_pc <= pc + 1)
return current_pc;
- /* Check for `movl %esp, %ebp' -- can be written in two ways. */
op = read_memory_unsigned_integer (pc + 1, 1);
+
+ /* Check for some special instructions that might be migrated
+ by GCC into the prologue. We check for
+
+ xorl %ebx, %ebx
+ xorl %ecx, %ecx
+ xorl %edx, %edx
+ xorl %eax, %eax
+
+ and the equivalent
+
+ subl %ebx, %ebx
+ subl %ecx, %ecx
+ subl %edx, %edx
+ subl %eax, %eax
+
+ Make sure we only skip these instructions if we later see the
+ `movl %esp, %ebp' that actually sets up the frame. */
+ while (op == 0x29 || op == 0x31)
+ {
+ op = read_memory_unsigned_integer (pc + skip + 2, 1);
+ switch (op)
+ {
+ case 0xdb: /* %ebx */
+ case 0xc9: /* %ecx */
+ case 0xd2: /* %edx */
+ case 0xc0: /* %eax */
+ skip += 2;
+ break;
+ default:
+ return pc + 1;
+ }
+
+ op = read_memory_unsigned_integer (pc + skip + 1, 1);
+ }
+
+ /* Check for `movl %esp, %ebp' -- can be written in two ways. */
switch (op)
{
case 0x8b:
- if (read_memory_unsigned_integer (pc + 2, 1) != 0xec)
+ if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xec)
return pc + 1;
break;
case 0x89:
- if (read_memory_unsigned_integer (pc + 2, 1) != 0xe5)
+ if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xe5)
return pc + 1;
break;
default:
return pc + 1;
}
- /* OK, we actually have a frame. We just don't know how large it is
- yet. Set its size to zero. We'll adjust it if necessary. */
+ /* OK, we actually have a frame. We just don't know how large
+ it is yet. Set its size to zero. We'll adjust it if
+ necessary. We also now commit to skipping the special
+ instructions mentioned before. */
cache->locals = 0;
+ pc += skip;
/* If that's all, return now. */
if (current_pc <= pc + 3)
i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
struct i386_frame_cache *cache)
{
- if (cache->locals >= 0)
- {
- CORE_ADDR offset;
- unsigned char op;
- int i;
+ CORE_ADDR offset = 0;
+ unsigned char op;
+ int i;
- offset = - 4 - cache->locals;
- for (i = 0; i < 8 && pc < current_pc; i++)
- {
- op = read_memory_unsigned_integer (pc, 1);
- if (op < 0x50 || op > 0x57)
- break;
+ if (cache->locals > 0)
+ offset -= cache->locals;
+ for (i = 0; i < 8 && pc < current_pc; i++)
+ {
+ op = read_memory_unsigned_integer (pc, 1);
+ if (op < 0x50 || op > 0x57)
+ break;
- cache->saved_regs[op - 0x50] = offset;
- offset -= 4;
- pc++;
- }
+ offset -= 4;
+ cache->saved_regs[op - 0x50] = offset;
+ cache->sp_offset += 4;
+ pc++;
}
return pc;
ULONGEST val;
/* Clear the direction flag. */
- frame_unwind_unsigned_register (next_frame, PS_REGNUM, &val);
+ val = frame_unwind_register_unsigned (next_frame,
+ I386_EFLAGS_REGNUM);
val &= ~(1 << 10);
store_unsigned_integer (valuep, 4, val);
}
};
static const struct frame_unwind *
-i386_frame_p (CORE_ADDR pc)
+i386_frame_sniffer (struct frame_info *next_frame)
{
return &i386_frame_unwind;
}
};
static const struct frame_unwind *
-i386_sigtramp_frame_p (CORE_ADDR pc)
+i386_sigtramp_frame_sniffer (struct frame_info *next_frame)
{
+ CORE_ADDR pc = frame_pc_unwind (next_frame);
char *name;
/* We shouldn't even bother to try if the OSABI didn't register
if (jb_pc_offset == -1)
return 0;
- sp = read_register (SP_REGNUM);
+ /* Don't use I386_ESP_REGNUM here, since this function is also used
+ for AMD64. */
+ regcache_cooked_read (current_regcache, SP_REGNUM, buf);
+ sp = extract_typed_address (buf, builtin_type_void_data_ptr);
if (target_read_memory (sp + len, buf, len))
return 0;
- jb_addr = extract_typed_address (buf, builtin_type_void_func_ptr);
+ jb_addr = extract_typed_address (buf, builtin_type_void_data_ptr);
if (target_read_memory (jb_addr + jb_pc_offset, buf, len))
return 0;
#define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
#define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
-/* Extract from an array REGBUF containing the (raw) register state, a
- function return value of TYPE, and copy that, in virtual format,
- into VALBUF. */
+/* Read, for architecture GDBARCH, a function return value of TYPE
+ from REGCACHE, and copy that into VALBUF. */
static void
-i386_extract_return_value (struct type *type, struct regcache *regcache,
- void *dst)
+i386_extract_return_value (struct gdbarch *gdbarch, struct type *type,
+ struct regcache *regcache, void *valbuf)
{
- bfd_byte *valbuf = dst;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int len = TYPE_LENGTH (type);
char buf[I386_MAX_REGISTER_SIZE];
- if (TYPE_CODE (type) == TYPE_CODE_STRUCT
- && TYPE_NFIELDS (type) == 1)
- {
- i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf);
- return;
- }
-
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
- if (FP0_REGNUM < 0)
+ if (tdep->st0_regnum < 0)
{
warning ("Cannot find floating-point return value.");
memset (valbuf, 0, len);
}
else
{
- int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
- int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
+ int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM);
+ int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM);
if (len <= low_size)
{
regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
memcpy (valbuf, buf, low_size);
regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf);
- memcpy (valbuf + low_size, buf, len - low_size);
+ memcpy ((char *) valbuf + low_size, buf, len - low_size);
}
else
internal_error (__FILE__, __LINE__,
}
}
-/* Write into the appropriate registers a function return value stored
- in VALBUF of type TYPE, given in virtual format. */
+/* Write, for architecture GDBARCH, a function return value of TYPE
+ from VALBUF into REGCACHE. */
static void
-i386_store_return_value (struct type *type, struct regcache *regcache,
- const void *valbuf)
+i386_store_return_value (struct gdbarch *gdbarch, struct type *type,
+ struct regcache *regcache, const void *valbuf)
{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int len = TYPE_LENGTH (type);
- if (TYPE_CODE (type) == TYPE_CODE_STRUCT
- && TYPE_NFIELDS (type) == 1)
- {
- i386_store_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf);
- return;
- }
+ /* Define I387_ST0_REGNUM such that we use the proper definitions
+ for the architecture. */
+#define I387_ST0_REGNUM I386_ST0_REGNUM
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
ULONGEST fstat;
- char buf[FPU_REG_RAW_SIZE];
+ char buf[I386_MAX_REGISTER_SIZE];
- if (FP0_REGNUM < 0)
+ if (tdep->st0_regnum < 0)
{
warning ("Cannot set floating-point return value.");
return;
actual value doesn't really matter, but 7 is what a normal
function return would end up with if the program started out
with a freshly initialized FPU. */
- regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat);
+ regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
fstat |= (7 << 11);
- regcache_raw_write_unsigned (regcache, FSTAT_REGNUM, fstat);
+ regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat);
/* Mark %st(1) through %st(7) as empty. Since we set the top of
the floating-point register stack to 7, the appropriate value
for the tag word is 0x3fff. */
- regcache_raw_write_unsigned (regcache, FTAG_REGNUM, 0x3fff);
+ regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff);
}
else
{
- int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
- int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
+ int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM);
+ int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM);
if (len <= low_size)
regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf);
internal_error (__FILE__, __LINE__,
"Cannot store return value of %d bytes long.", len);
}
+
+#undef I387_ST0_REGNUM
}
/* Extract from REGCACHE, which contains the (raw) register state, the
};
static const char *struct_convention = default_struct_convention;
+/* Return non-zero if TYPE, which is assumed to be a structure or
+ union type, should be returned in registers for architecture
+ GDBARCH. */
+
static int
-i386_use_struct_convention (int gcc_p, struct type *type)
+i386_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type)
{
- enum struct_return struct_return;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ enum type_code code = TYPE_CODE (type);
+ int len = TYPE_LENGTH (type);
- if (struct_convention == default_struct_convention)
- struct_return = gdbarch_tdep (current_gdbarch)->struct_return;
- else if (struct_convention == pcc_struct_convention)
- struct_return = pcc_struct_return;
- else
- struct_return = reg_struct_return;
+ gdb_assert (code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION);
+
+ if (struct_convention == pcc_struct_convention
+ || (struct_convention == default_struct_convention
+ && tdep->struct_return == pcc_struct_return))
+ return 0;
+
+ return (len == 1 || len == 2 || len == 4 || len == 8);
+}
+
+/* Determine, for architecture GDBARCH, how a return value of TYPE
+ should be returned. If it is supposed to be returned in registers,
+ and READBUF is non-zero, read the appropriate value from REGCACHE,
+ and copy it into READBUF. If WRITEBUF is non-zero, write the value
+ from WRITEBUF into REGCACHE. */
+
+static enum return_value_convention
+i386_return_value (struct gdbarch *gdbarch, struct type *type,
+ struct regcache *regcache, void *readbuf,
+ const void *writebuf)
+{
+ enum type_code code = TYPE_CODE (type);
+
+ if ((code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION)
+ && !i386_reg_struct_return_p (gdbarch, type))
+ return RETURN_VALUE_STRUCT_CONVENTION;
+
+ /* This special case is for structures consisting of a single
+ `float' or `double' member. These structures are returned in
+ %st(0). For these structures, we call ourselves recursively,
+ changing TYPE into the type of the first member of the structure.
+ Since that should work for all structures that have only one
+ member, we don't bother to check the member's type here. */
+ if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
+ {
+ type = check_typedef (TYPE_FIELD_TYPE (type, 0));
+ return i386_return_value (gdbarch, type, regcache, readbuf, writebuf);
+ }
+
+ if (readbuf)
+ i386_extract_return_value (gdbarch, type, regcache, readbuf);
+ if (writebuf)
+ i386_store_return_value (gdbarch, type, regcache, writebuf);
- return generic_use_struct_convention (struct_return == reg_struct_return,
- type);
+ return RETURN_VALUE_REGISTER_CONVENTION;
}
\f
if (i386_fp_regnum_p (regnum))
return builtin_type_i387_ext;
- if (i386_sse_regnum_p (regnum))
+ if (i386_sse_regnum_p (gdbarch, regnum))
return builtin_type_vec128i;
- if (i386_mmx_regnum_p (regnum))
+ if (i386_mmx_regnum_p (gdbarch, regnum))
return builtin_type_vec64i;
return builtin_type_int;
static int
i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum)
{
- int mmxi;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
+ int mmxreg, fpreg;
ULONGEST fstat;
int tos;
- int fpi;
- mmxi = regnum - MM0_REGNUM;
- regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat);
+ /* Define I387_ST0_REGNUM such that we use the proper definitions
+ for REGCACHE's architecture. */
+#define I387_ST0_REGNUM tdep->st0_regnum
+
+ mmxreg = regnum - tdep->mm0_regnum;
+ regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
tos = (fstat >> 11) & 0x7;
- fpi = (mmxi + tos) % 8;
+ fpreg = (mmxreg + tos) % 8;
+
+ return (I387_ST0_REGNUM + fpreg);
- return (FP0_REGNUM + fpi);
+#undef I387_ST0_REGNUM
}
static void
i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
int regnum, void *buf)
{
- if (i386_mmx_regnum_p (regnum))
+ if (i386_mmx_regnum_p (gdbarch, regnum))
{
char mmx_buf[MAX_REGISTER_SIZE];
int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
/* Extract (always little endian). */
regcache_raw_read (regcache, fpnum, mmx_buf);
- memcpy (buf, mmx_buf, REGISTER_RAW_SIZE (regnum));
+ memcpy (buf, mmx_buf, register_size (gdbarch, regnum));
}
else
regcache_raw_read (regcache, regnum, buf);
i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
int regnum, const void *buf)
{
- if (i386_mmx_regnum_p (regnum))
+ if (i386_mmx_regnum_p (gdbarch, regnum))
{
char mmx_buf[MAX_REGISTER_SIZE];
int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
/* Read ... */
regcache_raw_read (regcache, fpnum, mmx_buf);
/* ... Modify ... (always little endian). */
- memcpy (mmx_buf, buf, REGISTER_RAW_SIZE (regnum));
+ memcpy (mmx_buf, buf, register_size (gdbarch, regnum));
/* ... Write. */
regcache_raw_write (regcache, fpnum, mmx_buf);
}
}
\f
-/* These registers don't have pervasive standard uses. Move them to
- i386-tdep.h if necessary. */
-
-#define I386_EBX_REGNUM 3 /* %ebx */
-#define I386_ECX_REGNUM 1 /* %ecx */
-#define I386_ESI_REGNUM 6 /* %esi */
-#define I386_EDI_REGNUM 7 /* %edi */
-
/* Return the register number of the register allocated by GCC after
REGNUM, or -1 if there is no such register. */
I386_EBP_REGNUM /* Slot for %edi. */
};
- if (regnum < sizeof (next_regnum) / sizeof (next_regnum[0]))
+ if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0]))
return next_regnum[regnum];
return -1;
static int
i386_convert_register_p (int regnum, struct type *type)
{
+ int len = TYPE_LENGTH (type);
+
/* Values may be spread across multiple registers. Most debugging
formats aren't expressive enough to specify the locations, so
some heuristics is involved. Right now we only handle types that
- are exactly 8 bytes long as GCC doesn't seem to put any other
- types into registers. */
- if (TYPE_LENGTH (type) == 8 && i386_next_regnum (regnum) != -1)
- return 1;
+ have a length that is a multiple of the word size, since GCC
+ doesn't seem to put any other types into registers. */
+ if (len > 4 && len % 4 == 0)
+ {
+ int last_regnum = regnum;
+
+ while (len > 4)
+ {
+ last_regnum = i386_next_regnum (last_regnum);
+ len -= 4;
+ }
+
+ if (last_regnum != -1)
+ return 1;
+ }
return i386_fp_regnum_p (regnum);
}
i386_register_to_value (struct frame_info *frame, int regnum,
struct type *type, void *to)
{
+ int len = TYPE_LENGTH (type);
+ char *buf = to;
+
/* FIXME: kettenis/20030609: What should we do if REGNUM isn't
available in FRAME (i.e. if it wasn't saved)? */
if (i386_fp_regnum_p (regnum))
{
- char from[I386_MAX_REGISTER_SIZE];
+ i387_register_to_value (frame, regnum, type, to);
+ return;
+ }
- /* We only support floating-point values. */
- if (TYPE_CODE (type) != TYPE_CODE_FLT)
- {
- warning ("Cannot convert floating-point register value "
- "to non-floating-point type.");
- return;
- }
+ /* Read a value spread accross multiple registers. */
- /* Convert to TYPE. This should be a no-op if TYPE is
- equivalent to the extended floating-point format used by the
- FPU. */
- frame_read_register (frame, regnum, from);
- convert_typed_floating (from, builtin_type_i387_ext, to, type);
- }
- else
- {
- gdb_assert (TYPE_LENGTH (type) == 8);
+ gdb_assert (len > 4 && len % 4 == 0);
- /* Read the first part. */
+ while (len > 0)
+ {
+ gdb_assert (regnum != -1);
gdb_assert (register_size (current_gdbarch, regnum) == 4);
- frame_read_register (frame, regnum, (char *) to + 0);
- /* Read the second part. */
+ get_frame_register (frame, regnum, buf);
regnum = i386_next_regnum (regnum);
- gdb_assert (regnum != -1);
- gdb_assert (register_size (current_gdbarch, regnum));
- frame_read_register (frame, regnum, (char *) to + 4);
+ len -= 4;
+ buf += 4;
}
}
i386_value_to_register (struct frame_info *frame, int regnum,
struct type *type, const void *from)
{
+ int len = TYPE_LENGTH (type);
+ const char *buf = from;
+
if (i386_fp_regnum_p (regnum))
{
- char to[I386_MAX_REGISTER_SIZE];
+ i387_value_to_register (frame, regnum, type, from);
+ return;
+ }
- /* We only support floating-point values. */
- if (TYPE_CODE (type) != TYPE_CODE_FLT)
- {
- warning ("Cannot convert non-floating-point type "
- "to floating-point register value.");
- return;
- }
+ /* Write a value spread accross multiple registers. */
- /* Convert from TYPE. This should be a no-op if TYPE is
- equivalent to the extended floating-point format used by the
- FPU. */
- convert_typed_floating (from, type, to, builtin_type_i387_ext);
- put_frame_register (frame, regnum, to);
- }
- else
- {
- gdb_assert (TYPE_LENGTH (type) == 8);
+ gdb_assert (len > 4 && len % 4 == 0);
- /* Write the first part. */
+ while (len > 0)
+ {
+ gdb_assert (regnum != -1);
gdb_assert (register_size (current_gdbarch, regnum) == 4);
- put_frame_register (frame, regnum, (const char *) from + 0);
- /* Write the second part. */
+ put_frame_register (frame, regnum, buf);
regnum = i386_next_regnum (regnum);
- gdb_assert (regnum != -1);
- gdb_assert (register_size (current_gdbarch, regnum) == 4);
- put_frame_register (frame, regnum, (const char *) from + 4);
- }
+ len -= 4;
+ buf += 4;
+ }
}
\f
+/* Supply register REGNUM from the general-purpose register set REGSET
+ to register cache REGCACHE. If REGNUM is -1, do this for all
+ registers in REGSET. */
+
+void
+i386_supply_gregset (const struct regset *regset, struct regcache *regcache,
+ int regnum, const void *gregs, size_t len)
+{
+ const struct gdbarch_tdep *tdep = regset->descr;
+ const char *regs = gregs;
+ int i;
+
+ gdb_assert (len == tdep->sizeof_gregset);
+ for (i = 0; i < tdep->gregset_num_regs; i++)
+ {
+ if ((regnum == i || regnum == -1)
+ && tdep->gregset_reg_offset[i] != -1)
+ regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]);
+ }
+}
+
+/* Supply register REGNUM from the floating-point register set REGSET
+ to register cache REGCACHE. If REGNUM is -1, do this for all
+ registers in REGSET. */
+
+static void
+i386_supply_fpregset (const struct regset *regset, struct regcache *regcache,
+ int regnum, const void *fpregs, size_t len)
+{
+ const struct gdbarch_tdep *tdep = regset->descr;
+
+ if (len == I387_SIZEOF_FXSAVE)
+ {
+ i387_supply_fxsave (regcache, regnum, fpregs);
+ return;
+ }
+
+ gdb_assert (len == tdep->sizeof_fpregset);
+ i387_supply_fsave (regcache, regnum, fpregs);
+}
+
+/* Return the appropriate register set for the core section identified
+ by SECT_NAME and SECT_SIZE. */
+
+const struct regset *
+i386_regset_from_core_section (struct gdbarch *gdbarch,
+ const char *sect_name, size_t sect_size)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
+ {
+ if (tdep->gregset == NULL)
+ {
+ tdep->gregset = XMALLOC (struct regset);
+ tdep->gregset->descr = tdep;
+ tdep->gregset->supply_regset = i386_supply_gregset;
+ }
+ return tdep->gregset;
+ }
+
+ if ((strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
+ || (strcmp (sect_name, ".reg-xfp") == 0
+ && sect_size == I387_SIZEOF_FXSAVE))
+ {
+ if (tdep->fpregset == NULL)
+ {
+ tdep->fpregset = XMALLOC (struct regset);
+ tdep->fpregset->descr = tdep;
+ tdep->fpregset->supply_regset = i386_supply_fpregset;
+ }
+ return tdep->fpregset;
+ }
+
+ return NULL;
+}
+\f
#ifdef STATIC_TRANSFORM_NAME
/* SunPRO encodes the static variables. This is not related to C++
deals with switching between those. */
static int
-i386_print_insn (bfd_vma pc, disassemble_info *info)
+i386_print_insn (bfd_vma pc, struct disassemble_info *info)
{
gdb_assert (disassembly_flavor == att_flavor
|| disassembly_flavor == intel_flavor);
i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
struct reggroup *group)
{
- int sse_regnum_p = (i386_sse_regnum_p (regnum)
- || i386_mxcsr_regnum_p (regnum));
+ int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum)
+ || i386_mxcsr_regnum_p (gdbarch, regnum));
int fp_regnum_p = (i386_fp_regnum_p (regnum)
|| i386_fpc_regnum_p (regnum));
- int mmx_regnum_p = (i386_mmx_regnum_p (regnum));
+ int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum));
if (group == i386_mmx_reggroup)
return mmx_regnum_p;
}
\f
-/* Get the ith function argument for the current function. */
+/* Get the ARGIth function argument for the current function. */
+
static CORE_ADDR
i386_fetch_pointer_argument (struct frame_info *frame, int argi,
struct type *type)
{
- CORE_ADDR stack;
- frame_read_register (frame, SP_REGNUM, &stack);
- return read_memory_unsigned_integer (stack + (4 * (argi + 1)), 4);
+ CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM);
+ return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4);
}
\f
tdep = XMALLOC (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
- /* The i386 default settings don't include the SSE registers.
- FIXME: kettenis/20020614: They do include the FPU registers for
- now, which probably is not quite right. */
- tdep->num_xmm_regs = 0;
+ /* General-purpose registers. */
+ tdep->gregset = NULL;
+ tdep->gregset_reg_offset = NULL;
+ tdep->gregset_num_regs = I386_NUM_GREGS;
+ tdep->sizeof_gregset = 0;
+
+ /* Floating-point registers. */
+ tdep->fpregset = NULL;
+ tdep->sizeof_fpregset = I387_SIZEOF_FSAVE;
+
+ /* The default settings include the FPU registers, the MMX registers
+ and the SSE registers. This can be overidden for a specific ABI
+ by adjusting the members `st0_regnum', `mm0_regnum' and
+ `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
+ will show up in the output of "info all-registers". Ideally we
+ should try to autodetect whether they are available, such that we
+ can prevent "info all-registers" from displaying registers that
+ aren't available.
+
+ NOTE: kevinb/2003-07-13: ... if it's a choice between printing
+ [the SSE registers] always (even when they don't exist) or never
+ showing them to the user (even when they do exist), I prefer the
+ former over the latter. */
+
+ tdep->st0_regnum = I386_ST0_REGNUM;
+
+ /* The MMX registers are implemented as pseudo-registers. Put off
+ caclulating the register number for %mm0 until we know the number
+ of raw registers. */
+ tdep->mm0_regnum = 0;
+
+ /* I386_NUM_XREGS includes %mxcsr, so substract one. */
+ tdep->num_xmm_regs = I386_NUM_XREGS - 1;
tdep->jb_pc_offset = -1;
tdep->struct_return = pcc_struct_return;
alignment. */
set_gdbarch_long_double_bit (gdbarch, 96);
- /* The default ABI includes general-purpose registers and
- floating-point registers. */
- set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I386_NUM_FREGS);
+ /* The default ABI includes general-purpose registers,
+ floating-point registers, and the SSE registers. */
+ set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS);
set_gdbarch_register_name (gdbarch, i386_register_name);
set_gdbarch_register_type (gdbarch, i386_register_type);
set_gdbarch_register_to_value (gdbarch, i386_register_to_value);
set_gdbarch_value_to_register (gdbarch, i386_value_to_register);
- set_gdbarch_extract_return_value (gdbarch, i386_extract_return_value);
- set_gdbarch_store_return_value (gdbarch, i386_store_return_value);
+ set_gdbarch_return_value (gdbarch, i386_return_value);
set_gdbarch_extract_struct_value_address (gdbarch,
i386_extract_struct_value_address);
- set_gdbarch_use_struct_convention (gdbarch, i386_use_struct_convention);
set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue);
set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument);
/* Hook in the DWARF CFI frame unwinder. */
- frame_unwind_append_predicate (gdbarch, dwarf2_frame_p);
- set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
+ frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
frame_base_set_default (gdbarch, &i386_frame_base);
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
- frame_unwind_append_predicate (gdbarch, i386_sigtramp_frame_p);
- frame_unwind_append_predicate (gdbarch, i386_frame_p);
+ frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer);
+ frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer);
+
+ /* If we have a register mapping, enable the generic core file
+ support, unless it has already been enabled. */
+ if (tdep->gregset_reg_offset
+ && !gdbarch_regset_from_core_section_p (gdbarch))
+ set_gdbarch_regset_from_core_section (gdbarch,
+ i386_regset_from_core_section);
+
+ /* Unless support for MMX has been disabled, make %mm0 the first
+ pseudo-register. */
+ if (tdep->mm0_regnum == 0)
+ tdep->mm0_regnum = gdbarch_num_regs (gdbarch);
return gdbarch;
}