/* Intel 386 target-dependent stuff.
- Copyright (C) 1988-2013 Free Software Foundation, Inc.
+ Copyright (C) 1988-2014 Free Software Foundation, Inc.
This file is part of GDB.
#include "remote.h"
#include "exceptions.h"
#include "gdb_assert.h"
-#include "gdb_string.h"
+#include <string.h>
#include "i386-tdep.h"
#include "i387-tdep.h"
#include "features/i386/i386.c"
#include "features/i386/i386-avx.c"
+#include "features/i386/i386-mpx.c"
#include "features/i386/i386-mmx.c"
#include "ax.h"
"ymm4h", "ymm5h", "ymm6h", "ymm7h",
};
+static const char *i386_mpx_names[] =
+{
+ "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
+};
+
+/* Register names for MPX pseudo-registers. */
+
+static const char *i386_bnd_names[] =
+{
+ "bnd0", "bnd1", "bnd2", "bnd3"
+};
+
/* Register names for MMX pseudo-registers. */
static const char *i386_mmx_names[] =
return regnum >= 0 && regnum < tdep->num_ymm_regs;
}
+/* BND register? */
+
+int
+i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int bnd0_regnum = tdep->bnd0_regnum;
+
+ if (bnd0_regnum < 0)
+ return 0;
+
+ regnum -= bnd0_regnum;
+ return regnum >= 0 && regnum < I387_NUM_BND_REGS;
+}
+
/* SSE register? */
int
&& regnum < I387_XMM0_REGNUM (tdep));
}
+/* BNDr (raw) register? */
+
+static int
+i386_bndr_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (I387_BND0R_REGNUM (tdep) < 0)
+ return 0;
+
+ regnum -= tdep->bnd0r_regnum;
+ return regnum >= 0 && regnum < I387_NUM_BND_REGS;
+}
+
+/* BND control register? */
+
+static int
+i386_mpx_ctrl_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (I387_BNDCFGU_REGNUM (tdep) < 0)
+ return 0;
+
+ regnum -= I387_BNDCFGU_REGNUM (tdep);
+ return regnum >= 0 && regnum < I387_NUM_MPX_CTRL_REGS;
+}
+
/* Return the name of register REGNUM, or the empty string if it is
an anonymous register. */
i386_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ return i386_bnd_names[regnum - tdep->bnd0_regnum];
if (i386_mmx_regnum_p (gdbarch, regnum))
return i386_mmx_names[regnum - I387_MM0_REGNUM (tdep)];
else if (i386_ymm_regnum_p (gdbarch, regnum))
long delta = 0;
int data16 = 0;
- if (target_read_memory (pc, &op, 1))
+ if (target_read_code (pc, &op, 1))
return pc;
if (op == 0x66)
{
data16 = 1;
- op = read_memory_unsigned_integer (pc + 1, 1, byte_order);
+
+ op = read_code_unsigned_integer (pc + 1, 1, byte_order);
}
switch (op)
if (current_pc <= pc)
return pc;
- if (target_read_memory (pc, &op, 1))
+ if (target_read_code (pc, &op, 1))
return pc;
if (op != 0x58) /* popl %eax */
return pc;
- if (target_read_memory (pc + 1, buf, 4))
+ if (target_read_code (pc + 1, buf, 4))
return pc;
if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0)
gdb_byte buf[8];
gdb_byte op;
- if (target_read_memory (pc, &op, 1))
+ if (target_read_code (pc, &op, 1))
return pc;
if (op == 0x68 || op == 0x6a)
I386_EDI_REGNUM /* %edi */
};
- if (target_read_memory (pc, buf, sizeof buf))
+ if (target_read_code (pc, buf, sizeof buf))
return pc;
/* Check caller-saved saved register. The first instruction has
{
gdb_byte op;
- if (target_read_memory (pc, &op, 1))
+ if (target_read_code (pc, &op, 1))
return 0;
if ((op & pattern.mask[0]) == pattern.insn[0])
gdb_assert (pattern.len > 1);
gdb_assert (pattern.len <= I386_MAX_MATCHED_INSN_LEN);
- if (target_read_memory (pc + 1, buf, pattern.len - 1))
+ if (target_read_code (pc + 1, buf, pattern.len - 1))
return 0;
for (i = 1; i < pattern.len; i++)
gdb_byte op;
int check = 1;
- if (target_read_memory (pc, &op, 1))
+ if (target_read_code (pc, &op, 1))
return pc;
while (check)
if (op == 0x90)
{
pc += 1;
- if (target_read_memory (pc, &op, 1))
+ if (target_read_code (pc, &op, 1))
return pc;
check = 1;
}
else if (op == 0x8b)
{
- if (target_read_memory (pc + 1, &op, 1))
+ if (target_read_code (pc + 1, &op, 1))
return pc;
if (op == 0xff)
{
pc += 2;
- if (target_read_memory (pc, &op, 1))
+ if (target_read_code (pc, &op, 1))
return pc;
check = 1;
if (limit <= pc)
return limit;
- if (target_read_memory (pc, &op, 1))
+ if (target_read_code (pc, &op, 1))
return pc;
if (op == 0x55) /* pushl %ebp */
if (limit <= pc + skip)
return limit;
- if (target_read_memory (pc + skip, &op, 1))
+ if (target_read_code (pc + skip, &op, 1))
return pc + skip;
/* The i386 prologue looks like
{
/* Check for `movl %esp, %ebp' -- can be written in two ways. */
case 0x8b:
- if (read_memory_unsigned_integer (pc + skip + 1, 1, byte_order)
+ if (read_code_unsigned_integer (pc + skip + 1, 1, byte_order)
!= 0xec)
return pc;
pc += (skip + 2);
break;
case 0x89:
- if (read_memory_unsigned_integer (pc + skip + 1, 1, byte_order)
+ if (read_code_unsigned_integer (pc + skip + 1, 1, byte_order)
!= 0xe5)
return pc;
pc += (skip + 2);
break;
case 0x8d: /* Check for 'lea (%ebp), %ebp'. */
- if (read_memory_unsigned_integer (pc + skip + 1, 2, byte_order)
+ if (read_code_unsigned_integer (pc + skip + 1, 2, byte_order)
!= 0x242c)
return pc;
pc += (skip + 3);
NOTE: You can't subtract a 16-bit immediate from a 32-bit
reg, so we don't have to worry about a data16 prefix. */
- if (target_read_memory (pc, &op, 1))
+ if (target_read_code (pc, &op, 1))
return pc;
if (op == 0x83)
{
/* `subl' with 8-bit immediate. */
- if (read_memory_unsigned_integer (pc + 1, 1, byte_order) != 0xec)
+ if (read_code_unsigned_integer (pc + 1, 1, byte_order) != 0xec)
/* Some instruction starting with 0x83 other than `subl'. */
return pc;
/* `subl' with signed 8-bit immediate (though it wouldn't
make sense to be negative). */
- cache->locals = read_memory_integer (pc + 2, 1, byte_order);
+ cache->locals = read_code_integer (pc + 2, 1, byte_order);
return pc + 3;
}
else if (op == 0x81)
{
/* Maybe it is `subl' with a 32-bit immediate. */
- if (read_memory_unsigned_integer (pc + 1, 1, byte_order) != 0xec)
+ if (read_code_unsigned_integer (pc + 1, 1, byte_order) != 0xec)
/* Some instruction starting with 0x81 other than `subl'. */
return pc;
/* It is `subl' with a 32-bit immediate. */
- cache->locals = read_memory_integer (pc + 2, 4, byte_order);
+ cache->locals = read_code_integer (pc + 2, 4, byte_order);
return pc + 6;
}
else if (op == 0x8d)
{
/* The ModR/M byte is 0x64. */
- if (read_memory_unsigned_integer (pc + 1, 1, byte_order) != 0x64)
+ if (read_code_unsigned_integer (pc + 1, 1, byte_order) != 0x64)
return pc;
/* 'lea' with 8-bit displacement. */
- cache->locals = -1 * read_memory_integer (pc + 3, 1, byte_order);
+ cache->locals = -1 * read_code_integer (pc + 3, 1, byte_order);
return pc + 4;
}
else
}
else if (op == 0xc8) /* enter */
{
- cache->locals = read_memory_unsigned_integer (pc + 1, 2, byte_order);
+ cache->locals = read_code_unsigned_integer (pc + 1, 2, byte_order);
return pc + 4;
}
offset -= cache->locals;
for (i = 0; i < 8 && pc < current_pc; i++)
{
- if (target_read_memory (pc, &op, 1))
+ if (target_read_code (pc, &op, 1))
return pc;
if (op < 0x50 || op > 0x57)
break;
for (i = 0; i < 6; i++)
{
- if (target_read_memory (pc + i, &op, 1))
+ if (target_read_code (pc + i, &op, 1))
return pc;
if (pic_pat[i] != op)
{
int delta = 6;
- if (target_read_memory (pc + delta, &op, 1))
+ if (target_read_code (pc + delta, &op, 1))
return pc;
if (op == 0x89) /* movl %ebx, x(%ebp) */
{
- op = read_memory_unsigned_integer (pc + delta + 1, 1, byte_order);
+ op = read_code_unsigned_integer (pc + delta + 1, 1, byte_order);
if (op == 0x5d) /* One byte offset from %ebp. */
delta += 3;
else /* Unexpected instruction. */
delta = 0;
- if (target_read_memory (pc + delta, &op, 1))
+ if (target_read_code (pc + delta, &op, 1))
return pc;
}
/* addl y,%ebx */
if (delta > 0 && op == 0x81
- && read_memory_unsigned_integer (pc + delta + 1, 1, byte_order)
+ && read_code_unsigned_integer (pc + delta + 1, 1, byte_order)
== 0xc3)
{
pc += delta + 6;
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte op;
- if (target_read_memory (pc, &op, 1))
+ if (target_read_code (pc, &op, 1))
return pc;
if (op == 0xe8)
{
gdb_byte buf[4];
- if (target_read_memory (pc + 1, buf, sizeof buf) == 0)
+ if (target_read_code (pc + 1, buf, sizeof buf) == 0)
{
/* Make sure address is computed correctly as a 32bit
integer even if CORE_ADDR is 64 bit wide. */
- struct minimal_symbol *s;
+ struct bound_minimal_symbol s;
CORE_ADDR call_dest;
call_dest = pc + 5 + extract_signed_integer (buf, 4, byte_order);
call_dest = call_dest & 0xffffffffU;
s = lookup_minimal_symbol_by_pc (call_dest);
- if (s != NULL
- && SYMBOL_LINKAGE_NAME (s) != NULL
- && strcmp (SYMBOL_LINKAGE_NAME (s), "__main") == 0)
+ if (s.minsym != NULL
+ && SYMBOL_LINKAGE_NAME (s.minsym) != NULL
+ && strcmp (SYMBOL_LINKAGE_NAME (s.minsym), "__main") == 0)
pc += 5;
}
}
cache->saved_regs[I386_EIP_REGNUM] -= cache->base;
}
else if (cache->pc != 0
- || target_read_memory (get_frame_pc (this_frame), buf, 1))
+ || target_read_code (get_frame_pc (this_frame), buf, 1))
{
/* We're in a known function, but did not find a frame
setup. Assume that the function does not use %ebp.
{
struct i386_frame_cache *cache = i386_frame_cache (this_frame, this_cache);
- /* This marks the outermost frame. */
- if (cache->base == 0)
- return;
-
- /* See the end of i386_push_dummy_call. */
- (*this_id) = frame_id_build (cache->base + 8, cache->pc);
+ if (!cache->base_p)
+ (*this_id) = frame_id_build_unavailable_stack (cache->pc);
+ else if (cache->base == 0)
+ {
+ /* This marks the outermost frame. */
+ }
+ else
+ {
+ /* See the end of i386_push_dummy_call. */
+ (*this_id) = frame_id_build (cache->base + 8, cache->pc);
+ }
}
static enum unwind_stop_reason
i386_epilogue_frame_cache (this_frame, this_cache);
if (!cache->base_p)
- return;
-
- (*this_id) = frame_id_build (cache->base + 8, cache->pc);
+ (*this_id) = frame_id_build_unavailable_stack (cache->pc);
+ else
+ (*this_id) = frame_id_build (cache->base + 8, cache->pc);
}
static struct value *
/* Return whether PC points inside a stack trampoline. */
static int
-i386_in_stack_tramp_p (struct gdbarch *gdbarch, CORE_ADDR pc)
+i386_in_stack_tramp_p (CORE_ADDR pc)
{
gdb_byte insn;
const char *name;
void **this_cache)
{
if (frame_relative_level (this_frame) == 0)
- return i386_in_stack_tramp_p (get_frame_arch (this_frame),
- get_frame_pc (this_frame));
+ return i386_in_stack_tramp_p (get_frame_pc (this_frame));
else
return 0;
}
i386_sigtramp_frame_cache (this_frame, this_cache);
if (!cache->base_p)
- return;
-
- /* See the end of i386_push_dummy_call. */
- (*this_id) = frame_id_build (cache->base + 8, get_frame_pc (this_frame));
+ (*this_id) = frame_id_build_unavailable_stack (get_frame_pc (this_frame));
+ else
+ {
+ /* See the end of i386_push_dummy_call. */
+ (*this_id) = frame_id_build (cache->base + 8, get_frame_pc (this_frame));
+ }
}
static struct value *
return tdep->i387_ext_type;
}
+/* Construct type for pseudo BND registers. We can't use
+ tdesc_find_type since a complement of one value has to be used
+ to describe the upper bound. */
+
+static struct type *
+i386_bnd_type (struct gdbarch *gdbarch)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+
+ if (!tdep->i386_bnd_type)
+ {
+ struct type *t, *bound_t;
+ const struct builtin_type *bt = builtin_type (gdbarch);
+
+ /* The type we're building is described bellow: */
+#if 0
+ struct __bound128
+ {
+ void *lbound;
+ void *ubound; /* One complement of raw ubound field. */
+ };
+#endif
+
+ t = arch_composite_type (gdbarch,
+ "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT);
+
+ append_composite_type_field (t, "lbound", bt->builtin_data_ptr);
+ append_composite_type_field (t, "ubound", bt->builtin_data_ptr);
+
+ TYPE_NAME (t) = "builtin_type_bound128";
+ tdep->i386_bnd_type = t;
+ }
+
+ return tdep->i386_bnd_type;
+}
+
/* Construct vector type for pseudo YMM registers. We can't use
tdesc_find_type since YMM isn't described in target description. */
struct type *
i386_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
{
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ return i386_bnd_type (gdbarch);
if (i386_mmx_regnum_p (gdbarch, regnum))
return i386_mmx_type (gdbarch);
else if (i386_ymm_regnum_p (gdbarch, regnum))
else
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->bnd0_regnum;
- if (i386_ymm_regnum_p (gdbarch, regnum))
+ /* Extract (always little endian). Read lower 128bits. */
+ status = regcache_raw_read (regcache,
+ I387_BND0R_REGNUM (tdep) + regnum,
+ raw_buf);
+ if (status != REG_VALID)
+ mark_value_bytes_unavailable (result_value, 0, 16);
+ else
+ {
+ enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
+ LONGEST upper, lower;
+ int size = TYPE_LENGTH (builtin_type (gdbarch)->builtin_data_ptr);
+
+ lower = extract_unsigned_integer (raw_buf, 8, byte_order);
+ upper = extract_unsigned_integer (raw_buf + 8, 8, byte_order);
+ upper = ~upper;
+
+ memcpy (buf, &lower, size);
+ memcpy (buf + size, &upper, size);
+ }
+ }
+ else if (i386_ymm_regnum_p (gdbarch, regnum))
{
regnum -= tdep->ymm0_regnum;
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- if (i386_ymm_regnum_p (gdbarch, regnum))
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ {
+ ULONGEST upper, lower;
+ int size = TYPE_LENGTH (builtin_type (gdbarch)->builtin_data_ptr);
+ enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
+
+ /* New values from input value. */
+ regnum -= tdep->bnd0_regnum;
+ lower = extract_unsigned_integer (buf, size, byte_order);
+ upper = extract_unsigned_integer (buf + size, size, byte_order);
+
+ /* Fetching register buffer. */
+ regcache_raw_read (regcache,
+ I387_BND0R_REGNUM (tdep) + regnum,
+ raw_buf);
+
+ upper = ~upper;
+
+ /* Set register bits. */
+ memcpy (raw_buf, &lower, 8);
+ memcpy (raw_buf + 8, &upper, 8);
+
+
+ regcache_raw_write (regcache,
+ I387_BND0R_REGNUM (tdep) + regnum,
+ raw_buf);
+ }
+ else if (i386_ymm_regnum_p (gdbarch, regnum))
{
regnum -= tdep->ymm0_regnum;
unsigned long indirect =
read_memory_unsigned_integer (pc + 2, 4, byte_order);
struct minimal_symbol *indsym =
- indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
+ indirect ? lookup_minimal_symbol_by_pc (indirect).minsym : 0;
const char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0;
if (symname)
void
i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
{
+ static const char *const stap_integer_prefixes[] = { "$", NULL };
+ static const char *const stap_register_prefixes[] = { "%", NULL };
+ static const char *const stap_register_indirection_prefixes[] = { "(",
+ NULL };
+ static const char *const stap_register_indirection_suffixes[] = { ")",
+ NULL };
+
/* We typically use stabs-in-ELF with the SVR4 register numbering. */
set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
/* Registering SystemTap handlers. */
- set_gdbarch_stap_integer_prefix (gdbarch, "$");
- set_gdbarch_stap_register_prefix (gdbarch, "%");
- set_gdbarch_stap_register_indirection_prefix (gdbarch, "(");
- set_gdbarch_stap_register_indirection_suffix (gdbarch, ")");
+ set_gdbarch_stap_integer_prefixes (gdbarch, stap_integer_prefixes);
+ set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
+ set_gdbarch_stap_register_indirection_prefixes (gdbarch,
+ stap_register_indirection_prefixes);
+ set_gdbarch_stap_register_indirection_suffixes (gdbarch,
+ stap_register_indirection_suffixes);
set_gdbarch_stap_is_single_operand (gdbarch,
i386_stap_is_single_operand);
set_gdbarch_stap_parse_special_token (gdbarch,
{
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int fp_regnum_p, mmx_regnum_p, xmm_regnum_p, mxcsr_regnum_p,
- ymm_regnum_p, ymmh_regnum_p;
+ ymm_regnum_p, ymmh_regnum_p, bndr_regnum_p, bnd_regnum_p,
+ mpx_ctrl_regnum_p;
/* Don't include pseudo registers, except for MMX, in any register
groups. */
|| ymmh_regnum_p))
return 0;
+ bnd_regnum_p = i386_bnd_regnum_p (gdbarch, regnum);
+ if (group == all_reggroup
+ && ((bnd_regnum_p && (tdep->xcr0 & I386_XSTATE_MPX_MASK))))
+ return bnd_regnum_p;
+
+ bndr_regnum_p = i386_bndr_regnum_p (gdbarch, regnum);
+ if (group == all_reggroup
+ && ((bndr_regnum_p && (tdep->xcr0 & I386_XSTATE_MPX_MASK))))
+ return 0;
+
+ mpx_ctrl_regnum_p = i386_mpx_ctrl_regnum_p (gdbarch, regnum);
+ if (group == all_reggroup
+ && ((mpx_ctrl_regnum_p && (tdep->xcr0 & I386_XSTATE_MPX_MASK))))
+ return mpx_ctrl_regnum_p;
+
if (group == general_reggroup)
return (!fp_regnum_p
&& !mmx_regnum_p
&& !mxcsr_regnum_p
&& !xmm_regnum_p
&& !ymm_regnum_p
- && !ymmh_regnum_p);
+ && !ymmh_regnum_p
+ && !bndr_regnum_p
+ && !bnd_regnum_p
+ && !mpx_ctrl_regnum_p);
return default_register_reggroup_p (gdbarch, regnum, group);
}
ULONGEST offset64;
*addr = 0;
- if (irp->aflag)
+ if (irp->aflag || irp->regmap[X86_RECORD_R8_REGNUM])
{
- /* 32 bits */
+ /* 32/64 bits */
int havesib = 0;
uint8_t scale = 0;
uint8_t byte;
else
*addr = (uint32_t) (*addr + (offset64 << scale));
}
+
+ if (!irp->aflag)
+ {
+ /* Since we are in 64-bit mode with ADDR32 prefix, zero-extend
+ address from 32-bit to 64-bit. */
+ *addr = (uint32_t) *addr;
+ }
}
else
{
case 0x0ffc:
case 0x0ffd:
case 0x0ffe:
- switch (prefixes)
+ /* Mask out PREFIX_ADDR. */
+ switch ((prefixes & ~PREFIX_ADDR))
{
case PREFIX_REPNZ:
opcode |= 0xf20000;
{
const struct target_desc *tdesc = tdep->tdesc;
const struct tdesc_feature *feature_core;
- const struct tdesc_feature *feature_sse, *feature_avx;
+ const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx;
int i, num_regs, valid_p;
if (! tdesc_has_registers (tdesc))
/* Try AVX registers. */
feature_avx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx");
+ /* Try MPX registers. */
+ feature_mpx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx");
+
valid_p = 1;
/* The XCR0 bits. */
tdep->register_names[i]);
}
+ if (feature_mpx)
+ {
+ tdep->xcr0 = I386_XSTATE_MPX_MASK;
+
+ if (tdep->bnd0r_regnum < 0)
+ {
+ tdep->mpx_register_names = i386_mpx_names;
+ tdep->bnd0r_regnum = I386_BND0R_REGNUM;
+ tdep->bndcfgu_regnum = I386_BNDCFGU_REGNUM;
+ }
+
+ for (i = 0; i < I387_NUM_MPX_REGS; i++)
+ valid_p &= tdesc_numbered_register (feature_mpx, tdesc_data,
+ I387_BND0R_REGNUM (tdep) + i,
+ tdep->mpx_register_names[i]);
+ }
+
return valid_p;
}
const struct target_desc *tdesc;
int mm0_regnum;
int ymm0_regnum;
+ int bnd0_regnum;
+ int num_bnd_cooked;
/* If there is already a candidate, use it. */
arches = gdbarch_list_lookup_by_info (arches, &info);
/* Even though the default ABI only includes general-purpose registers,
floating-point registers and the SSE registers, we have to leave a
- gap for the upper AVX registers. */
- set_gdbarch_num_regs (gdbarch, I386_AVX_NUM_REGS);
+ gap for the upper AVX registers and the MPX registers. */
+ set_gdbarch_num_regs (gdbarch, I386_MPX_NUM_REGS);
/* Get the x86 target description from INFO. */
tdesc = info.target_desc;
tdep->num_mmx_regs = 8;
tdep->num_ymm_regs = 0;
+ /* No MPX registers. */
+ tdep->bnd0r_regnum = -1;
+ tdep->bndcfgu_regnum = -1;
+
tdesc_data = tdesc_data_alloc ();
set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
return NULL;
}
+ num_bnd_cooked = (tdep->bnd0r_regnum > 0 ? I387_NUM_BND_REGS : 0);
+
/* Wire in pseudo registers. Number of pseudo registers may be
changed. */
set_gdbarch_num_pseudo_regs (gdbarch, (tdep->num_byte_regs
+ tdep->num_word_regs
+ tdep->num_dword_regs
+ tdep->num_mmx_regs
- + tdep->num_ymm_regs));
+ + tdep->num_ymm_regs
+ + num_bnd_cooked));
/* Target description may be changed. */
tdesc = tdep->tdesc;
else
tdep->ymm0_regnum = -1;
+ bnd0_regnum = mm0_regnum;
if (tdep->num_mmx_regs != 0)
{
/* Support MMX pseudo-register if MMX hasn't been disabled. */
tdep->mm0_regnum = mm0_regnum;
+ bnd0_regnum += tdep->num_mmx_regs;
}
else
tdep->mm0_regnum = -1;
+ if (tdep->bnd0r_regnum > 0)
+ tdep->bnd0_regnum = bnd0_regnum;
+ else
+ tdep-> bnd0_regnum = -1;
+
/* Hook in the legacy prologue-based unwinders last (fallback). */
frame_unwind_append_unwinder (gdbarch, &i386_stack_tramp_frame_unwind);
frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind);
initialize_tdesc_i386 ();
initialize_tdesc_i386_mmx ();
initialize_tdesc_i386_avx ();
+ initialize_tdesc_i386_mpx ();
/* Tell remote stub that we support XML target description. */
register_remote_support_xml ("i386");
projects / deliverable / binutils-gdb.git / blobdiff