/* Target-dependent code for the i386.
- Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007, 2008, 2009, 2010
- Free Software Foundation, Inc.
+ Copyright (C) 2001-2014 Free Software Foundation, Inc.
This file is part of GDB.
reg_struct_return /* Return "short" structures in registers. */
};
-/* Register classes as defined in the AMD x86-64 psABI. */
-
-enum amd64_reg_class
-{
- AMD64_INTEGER,
- AMD64_SSE,
- AMD64_SSEUP,
- AMD64_X87,
- AMD64_X87UP,
- AMD64_COMPLEX_X87,
- AMD64_NO_CLASS,
- AMD64_MEMORY
-};
-
/* i386 architecture specific information. */
struct gdbarch_tdep
{
int gregset_num_regs;
size_t sizeof_gregset;
- /* The general-purpose registers used to pass integers when making
- function calls. This only applies to amd64, as all parameters
- are passed through the stack on x86. */
- int call_dummy_num_integer_regs;
- int *call_dummy_integer_regs;
-
- /* Classify TYPE according to calling conventions, and store
- the result in CLASS. Used on amd64 only. */
- void (*classify) (struct type *type, enum amd64_reg_class class[2]);
-
/* Floating-point registers. */
struct regset *fpregset;
size_t sizeof_fpregset;
+ /* XSAVE extended state. */
+ struct regset *xstateregset;
+
/* Register number for %st(0). The register numbers for the other
registers follow from this one. Set this to -1 to indicate the
absence of an FPU. */
int st0_regnum;
+ /* Number of MMX registers. */
+ int num_mmx_regs;
+
/* Register number for %mm0. Set this to -1 to indicate the absence
of MMX support. */
int mm0_regnum;
+ /* Number of pseudo YMM registers. */
+ int num_ymm_regs;
+
+ /* Register number for %ymm0. Set this to -1 to indicate the absence
+ of pseudo YMM register support. */
+ int ymm0_regnum;
+
+ /* Number of byte registers. */
+ int num_byte_regs;
+
+ /* Register pseudo number for %al. */
+ int al_regnum;
+
+ /* Number of pseudo word registers. */
+ int num_word_regs;
+
+ /* Register number for %ax. */
+ int ax_regnum;
+
+ /* Number of pseudo dword registers. */
+ int num_dword_regs;
+
+ /* Register number for %eax. Set this to -1 to indicate the absence
+ of pseudo dword register support. */
+ int eax_regnum;
+
+ /* Number of core registers. */
+ int num_core_regs;
+
/* Number of SSE registers. */
int num_xmm_regs;
+ /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
+ register), excluding the x87 bit, which are supported by this GDB. */
+
+ uint64_t xcr0;
+
+ /* Offset of XCR0 in XSAVE extended state. */
+ int xsave_xcr0_offset;
+
+ /* Register names. */
+ const char **register_names;
+
+ /* Register number for %ymm0h. Set this to -1 to indicate the absence
+ of upper YMM register support. */
+ int ymm0h_regnum;
+
+ /* Upper YMM register names. Only used for tdesc_numbered_register. */
+ const char **ymmh_register_names;
+
+ /* Register number for %bnd0r. Set this to -1 to indicate the absence
+ bound registers. */
+ int bnd0r_regnum;
+
+ /* Register number for pseudo register %bnd0. Set this to -1 to indicate the absence
+ bound registers. */
+ int bnd0_regnum;
+
+ /* Register number for %bndcfgu. Set this to -1 to indicate the absence
+ bound control registers. */
+ int bndcfgu_regnum;
+
+ /* MPX register names. Only used for tdesc_numbered_register. */
+ const char **mpx_register_names;
+
+ /* Target description. */
+ const struct target_desc *tdesc;
+
+ /* Register group function. */
+ const void *register_reggroup_p;
+
/* Offset of saved PC in jmp_buf. */
int jb_pc_offset;
int sc_sp_offset;
/* ISA-specific data types. */
- struct type *i386_eflags_type;
- struct type *i386_mxcsr_type;
struct type *i386_mmx_type;
- struct type *i386_sse_type;
+ struct type *i386_ymm_type;
struct type *i387_ext_type;
+ struct type *i386_bnd_type;
/* Process record/replay target. */
/* The map for registers because the AMD64's registers order
I386_ES_REGNUM, /* %es */
I386_FS_REGNUM, /* %fs */
I386_GS_REGNUM, /* %gs */
- I386_ST0_REGNUM /* %st(0) */
+ I386_ST0_REGNUM, /* %st(0) */
+ I386_MXCSR_REGNUM = 40, /* %mxcsr */
+ I386_YMM0H_REGNUM, /* %ymm0h */
+ I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
+ I386_BND0R_REGNUM,
+ I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
+ I386_BNDCFGU_REGNUM,
+ I386_BNDSTATUS_REGNUM
};
/* Register numbers of RECORD_REGMAP. */
};
#define I386_NUM_GREGS 16
-#define I386_NUM_FREGS 16
#define I386_NUM_XREGS 9
-#define I386_SSE_NUM_REGS (I386_NUM_GREGS + I386_NUM_FREGS \
- + I386_NUM_XREGS)
+#define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
+#define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
+#define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
/* Size of the largest register. */
#define I386_MAX_REGISTER_SIZE 16
/* Types for i386-specific registers. */
-extern struct type *i386_eflags_type (struct gdbarch *gdbarch);
-extern struct type *i386_mxcsr_type (struct gdbarch *gdbarch);
-extern struct type *i386_mmx_type (struct gdbarch *gdbarch);
-extern struct type *i386_sse_type (struct gdbarch *gdbarch);
extern struct type *i387_ext_type (struct gdbarch *gdbarch);
+/* Checks of different pseudo-registers. */
+extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
+
+extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
+ int regnum);
+extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
+ int regnum);
+
+extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ int regnum,
+ struct value *result);
+
+extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ int regnum, const gdb_byte *buf);
+
/* Segment selectors. */
#define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
-#define I386_SEL_UPL 0x0003 /* User Privilige Level. */
-#define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
+#define I386_SEL_UPL 0x0003 /* User Privilige Level. */
+#define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
/* The length of the longest i386 instruction (according to
include/asm-i386/kprobes.h in Linux 2.6. */
/* Functions exported from i386-tdep.c. */
extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
CORE_ADDR pc, char *name);
-extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc);
+extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
+ CORE_ADDR pc);
/* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
extern int i386_sigtramp_p (struct frame_info *this_frame);
-/* Return the name of register REGNUM. */
-extern char const *i386_register_name (struct gdbarch * gdbarch, int regnum);
-
/* Return non-zero if REGNUM is a member of the specified group. */
extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
struct reggroup *group);
const char *sect_name, size_t sect_size);
+extern struct displaced_step_closure *i386_displaced_step_copy_insn
+ (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
+ struct regcache *regs);
extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
struct displaced_step_closure *closure,
CORE_ADDR from, CORE_ADDR to,
extern int i386_process_record (struct gdbarch *gdbarch,
struct regcache *regcache, CORE_ADDR addr);
+
\f
/* Functions and variables exported from i386bsd-tdep.c. */
extern int i386obsd_sc_reg_offset[];
extern int i386bsd_sc_reg_offset[];
+/* SystemTap related functions. */
+
+extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
+ const char *s);
+
+extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
+ struct stap_parse_info *p);
+
#endif /* i386-tdep.h */
projects / deliverable / binutils-gdb.git / blobdiff