{
CORE_ADDR addr;
- if (regno < 0 || regno >= NUM_REGS)
+ if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
error (_("Invalid register number %d."), regno);
if (u_offsets[regno] == -1)
static int
ia64_cannot_fetch_register (int regno)
{
- return regno < 0 || regno >= NUM_REGS || u_offsets[regno] == -1;
+ return regno < 0
+ || regno >= gdbarch_num_regs (current_gdbarch)
+ || u_offsets[regno] == -1;
}
static int
were previously read from the inferior process to be written
back.) */
- return regno < 0 || regno >= NUM_REGS || u_offsets[regno] == -1
+ return regno < 0
+ || regno >= gdbarch_num_regs (current_gdbarch)
+ || u_offsets[regno] == -1
|| regno == IA64_BSPSTORE_REGNUM;
}
#define IA64_PSR_DD (1UL << 39)
static void
-enable_watchpoints_in_psr (ptid_t ptid)
+enable_watchpoints_in_psr (struct regcache *regcache)
{
- CORE_ADDR psr;
+ ULONGEST psr;
- psr = read_register_pid (IA64_PSR_REGNUM, ptid);
+ regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
if (!(psr & IA64_PSR_DB))
{
psr |= IA64_PSR_DB; /* Set the db bit - this enables hardware
watchpoints and breakpoints. */
- write_register_pid (IA64_PSR_REGNUM, psr, ptid);
+ regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr);
}
}
}
store_debug_register_pair (ptid, idx, &dbr_addr, &dbr_mask);
- enable_watchpoints_in_psr (ptid);
+ enable_watchpoints_in_psr (get_current_regcache ());
return 0;
}
int tid;
struct siginfo siginfo;
ptid_t ptid = inferior_ptid;
+ struct regcache *regcache = get_current_regcache ();
tid = TIDGET(ptid);
if (tid == 0)
(siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
return 0;
- psr = read_register_pid (IA64_PSR_REGNUM, ptid);
+ regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
psr |= IA64_PSR_DD; /* Set the dd bit - this will disable the watchpoint
for the next instruction */
- write_register_pid (IA64_PSR_REGNUM, psr, ptid);
+ regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr);
*addr_p = (CORE_ADDR)siginfo.si_addr;
return 1;
buf[i] = ptrace (PT_READ_U, pid, (PTRACE_TYPE_ARG3)addr, 0);
if (errno != 0)
error (_("Couldn't read register %s (#%d): %s."),
- REGISTER_NAME (regnum), regnum, safe_strerror (errno));
+ gdbarch_register_name (current_gdbarch, regnum),
+ regnum, safe_strerror (errno));
addr += sizeof (PTRACE_TYPE_RET);
}
ia64_linux_fetch_registers (struct regcache *regcache, int regnum)
{
if (regnum == -1)
- for (regnum = 0; regnum < NUM_REGS; regnum++)
+ for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
ia64_linux_fetch_register (regcache, regnum);
else
ia64_linux_fetch_register (regcache, regnum);
ptrace (PT_WRITE_U, pid, (PTRACE_TYPE_ARG3)addr, buf[i]);
if (errno != 0)
error (_("Couldn't write register %s (#%d): %s."),
- REGISTER_NAME (regnum), regnum, safe_strerror (errno));
+ gdbarch_register_name (current_gdbarch, regnum),
+ regnum, safe_strerror (errno));
addr += sizeof (PTRACE_TYPE_RET);
}
ia64_linux_store_registers (struct regcache *regcache, int regnum)
{
if (regnum == -1)
- for (regnum = 0; regnum < NUM_REGS; regnum++)
+ for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
ia64_linux_store_register (regcache, regnum);
else
ia64_linux_store_register (regcache, regnum);