/* Target-dependent code for Renesas M32R, for GDB.
- Copyright (C) 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007,
- 2008, 2009 Free Software Foundation, Inc.
+ Copyright (C) 1996-2015 Free Software Foundation, Inc.
This file is part of GDB.
#include "gdbtypes.h"
#include "gdbcmd.h"
#include "gdbcore.h"
-#include "gdb_string.h"
#include "value.h"
#include "inferior.h"
#include "symfile.h"
#include "regcache.h"
#include "trad-frame.h"
#include "dis-asm.h"
-
-#include "gdb_assert.h"
+#include "objfiles.h"
#include "m32r-tdep.h"
/* Breakpoints
- The little endian mode of M32R is unique. In most of architectures,
+ The little endian mode of M32R is unique. In most of architectures,
two 16-bit instructions, A and B, are placed as the following:
Big endian:
This is because M32R always fetches instructions in 32-bit.
- The following functions take care of this behavior. */
+ The following functions take care of this behavior. */
static int
m32r_memory_insert_breakpoint (struct gdbarch *gdbarch,
struct bp_target_info *bp_tgt)
{
- CORE_ADDR addr = bp_tgt->placed_address;
+ CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
int val;
gdb_byte buf[4];
- gdb_byte *contents_cache = bp_tgt->shadow_contents;
+ gdb_byte contents_cache[4];
gdb_byte bp_entry[] = { 0x10, 0xf1 }; /* dpt */
/* Save the memory contents. */
if (val != 0)
return val; /* return error */
+ memcpy (bp_tgt->shadow_contents, contents_cache, 4);
bp_tgt->placed_size = bp_tgt->shadow_len = 4;
/* Determine appropriate breakpoint contents and size for this address. */
}
/* Write contents. */
- val = target_write_memory (addr & 0xfffffffc, buf, 4);
+ val = target_write_raw_memory (addr & 0xfffffffc, buf, 4);
return val;
}
static const gdb_byte *
-m32r_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
+m32r_breakpoint_from_pc (struct gdbarch *gdbarch,
+ CORE_ADDR *pcptr, int *lenptr)
{
- static gdb_byte be_bp_entry[] = { 0x10, 0xf1, 0x70, 0x00 }; /* dpt -> nop */
- static gdb_byte le_bp_entry[] = { 0x00, 0x70, 0xf1, 0x10 }; /* dpt -> nop */
+ static gdb_byte be_bp_entry[] = {
+ 0x10, 0xf1, 0x70, 0x00
+ }; /* dpt -> nop */
+ static gdb_byte le_bp_entry[] = {
+ 0x00, 0x70, 0xf1, 0x10
+ }; /* dpt -> nop */
gdb_byte *bp;
/* Determine appropriate breakpoint. */
else if (reg_nr == M32R_SP_REGNUM || reg_nr == M32R_FP_REGNUM)
return builtin_type (gdbarch)->builtin_data_ptr;
else
- return builtin_type_int32;
+ return builtin_type (gdbarch)->builtin_int32;
}
/* Write into appropriate registers a function return value
- of type TYPE, given in virtual format.
+ of type TYPE, given in virtual format.
- Things always get returned in RET1_REGNUM, RET2_REGNUM. */
+ Things always get returned in RET1_REGNUM, RET2_REGNUM. */
static void
m32r_store_return_value (struct type *type, struct regcache *regcache,
- const void *valbuf)
+ const gdb_byte *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR regval;
int len = TYPE_LENGTH (type);
- regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len);
+ regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len, byte_order);
regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval);
if (len > 4)
{
- regval = extract_unsigned_integer ((gdb_byte *) valbuf + 4, len - 4);
+ regval = extract_unsigned_integer (valbuf + 4,
+ len - 4, byte_order);
regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval);
}
}
-/* This is required by skip_prologue. The results of decoding a prologue
+/* This is required by skip_prologue. The results of decoding a prologue
should be cached because this thrashing is getting nuts. */
static int
-decode_prologue (CORE_ADDR start_pc, CORE_ADDR scan_limit,
+decode_prologue (struct gdbarch *gdbarch,
+ CORE_ADDR start_pc, CORE_ADDR scan_limit,
CORE_ADDR *pl_endptr, unsigned long *framelength)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
unsigned long framesize;
int insn;
int op1;
for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2)
{
- /* Check if current pc's location is readable. */
- if (!safe_read_memory_integer (current_pc, 2, &return_value))
+ /* Check if current pc's location is readable. */
+ if (!safe_read_memory_integer (current_pc, 2, byte_order, &return_value))
return -1;
- insn = read_memory_unsigned_integer (current_pc, 2);
+ insn = read_memory_unsigned_integer (current_pc, 2, byte_order);
if (insn == 0x0000)
break;
/* If this is a 32 bit instruction, we dont want to examine its
- immediate data as though it were an instruction */
+ immediate data as though it were an instruction. */
if (current_pc & 0x02)
{
- /* decode this instruction further */
+ /* Decode this instruction further. */
insn &= 0x7fff;
}
else
current_pc += 2; /* skip the immediate data */
- /* Check if current pc's location is readable. */
- if (!safe_read_memory_integer (current_pc, 2, &return_value))
+ /* Check if current pc's location is readable. */
+ if (!safe_read_memory_integer (current_pc, 2, byte_order,
+ &return_value))
return -1;
if (insn == 0x8faf) /* add3 sp, sp, xxxx */
/* add 16 bit sign-extended offset */
{
framesize +=
- -((short) read_memory_unsigned_integer (current_pc, 2));
+ -((short) read_memory_unsigned_integer (current_pc,
+ 2, byte_order));
}
else
{
- if (((insn >> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
- && safe_read_memory_integer (current_pc + 2, 2,
+ if (((insn >> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
+ && safe_read_memory_integer (current_pc + 2,
+ 2, byte_order,
&return_value)
&& read_memory_unsigned_integer (current_pc + 2,
- 2) == 0x0f24)
- /* subtract 24 bit sign-extended negative-offset */
+ 2, byte_order)
+ == 0x0f24)
{
- insn = read_memory_unsigned_integer (current_pc - 2, 4);
+ /* Subtract 24 bit sign-extended negative-offset. */
+ insn = read_memory_unsigned_integer (current_pc - 2,
+ 4, byte_order);
if (insn & 0x00800000) /* sign extend */
insn |= 0xff000000; /* negative */
else
continue;
}
}
- op1 = insn & 0xf000; /* isolate just the first nibble */
+ op1 = insn & 0xf000; /* Isolate just the first nibble. */
if ((insn & 0xf0ff) == 0x207f)
{ /* st reg, @-sp */
continue;
}
if ((insn >> 8) == 0x4f) /* addi sp, xx */
- /* add 8 bit sign-extended offset */
+ /* Add 8 bit sign-extended offset. */
{
int stack_adjust = (signed char) (insn & 0xff);
break; /* end of stack adjustments */
}
- /* Nop looks like a branch, continue explicitly */
+ /* Nop looks like a branch, continue explicitly. */
if (insn == 0x7000)
{
after_prologue = current_pc + 2;
- continue; /* nop occurs between pushes */
+ continue; /* nop occurs between pushes. */
}
- /* End of prolog if any of these are trap instructions */
+ /* End of prolog if any of these are trap instructions. */
if ((insn & 0xfff0) == 0x10f0)
{
after_prologue = current_pc;
break;
}
- /* End of prolog if any of these are branch instructions */
+ /* End of prolog if any of these are branch instructions. */
if ((op1 == 0x7000) || (op1 == 0xb000) || (op1 == 0xf000))
{
after_prologue = current_pc;
continue;
}
- /* Some of the branch instructions are mixed with other types */
+ /* Some of the branch instructions are mixed with other types. */
if (op1 == 0x1000)
{
int subop = insn & 0x0ff0;
if (after_stack_adjust != 0)
/* We did not find a "mv fp,sp", but we DID find
a stack_adjust. Is it safe to use that as the
- end of the prologue? I just don't know. */
+ end of the prologue? I just don't know. */
{
*pl_endptr = after_stack_adjust;
}
else if (after_push != 0)
/* We did not find a "mv fp,sp", but we DID find
a push. Is it safe to use that as the
- end of the prologue? I just don't know. */
+ end of the prologue? I just don't know. */
{
*pl_endptr = after_push;
}
else
/* We reached the end of the loop without finding the end
- of the prologue. No way to win -- we should report failure.
- The way we do that is to return the original start_pc.
- GDB will set a breakpoint at the start of the function (etc.) */
+ of the prologue. No way to win -- we should report
+ failure. The way we do that is to return the original
+ start_pc. GDB will set a breakpoint at the start of
+ the function (etc.) */
*pl_endptr = start_pc;
}
return 0;
} /* decode_prologue */
/* Function: skip_prologue
- Find end of function prologue */
+ Find end of function prologue. */
#define DEFAULT_SEARCH_LIMIT 128
static CORE_ADDR
m32r_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR func_addr, func_end;
struct symtab_and_line sal;
LONGEST return_value;
- /* See what the symbol table says */
+ /* See what the symbol table says. */
if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
{
else
func_end = pc + DEFAULT_SEARCH_LIMIT;
- /* If pc's location is not readable, just quit. */
- if (!safe_read_memory_integer (pc, 4, &return_value))
+ /* If pc's location is not readable, just quit. */
+ if (!safe_read_memory_integer (pc, 4, byte_order, &return_value))
return pc;
/* Find the end of prologue. */
- if (decode_prologue (pc, func_end, &sal.end, NULL) < 0)
+ if (decode_prologue (gdbarch, pc, func_end, &sal.end, NULL) < 0)
return pc;
return sal.end;
the saved registers of frame described by FRAME_INFO. This
includes special registers such as pc and fp saved in special ways
in the stack frame. sp is even more special: the address we return
- for it IS the sp for the next frame. */
+ for it IS the sp for the next frame. */
static struct m32r_unwind_cache *
m32r_frame_unwind_cache (struct frame_info *this_frame,
CORE_ADDR pc, scan_limit;
ULONGEST prev_sp;
ULONGEST this_base;
- unsigned long op, op2;
+ unsigned long op;
int i;
struct m32r_unwind_cache *info;
if ((*this_prologue_cache))
- return (*this_prologue_cache);
+ return (struct m32r_unwind_cache *) (*this_prologue_cache);
info = FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache);
(*this_prologue_cache) = info;
}
else if ((op & 0xfff0) == 0x10f0)
{
- /* end of prologue if this is a trap instruction */
- break; /* end of stack adjustments */
+ /* End of prologue if this is a trap instruction. */
+ break; /* End of stack adjustments. */
}
}
return pc;
}
-static void
-m32r_write_pc (struct regcache *regcache, CORE_ADDR val)
-{
- regcache_cooked_write_unsigned (regcache, M32R_PC_REGNUM, val);
-}
-
static CORE_ADDR
m32r_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
struct value **args, CORE_ADDR sp, int struct_return,
CORE_ADDR struct_addr)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int stack_offset, stack_alloc;
int argreg = ARG1_REGNUM;
int argnum;
gdb_byte *val;
gdb_byte valbuf[MAX_REGISTER_SIZE];
int len;
- int odd_sized_struct;
- /* first force sp to a 4-byte alignment */
+ /* First force sp to a 4-byte alignment. */
sp = sp & ~3;
/* Set the return address. For the m32r, the return breakpoint is
argreg++;
}
- /* Now make sure there's space on the stack */
+ /* Now make sure there's space on the stack. */
for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
stack_alloc += ((TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3);
- sp -= stack_alloc; /* make room on stack for args */
+ sp -= stack_alloc; /* Make room on stack for args. */
for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
{
if (len > 8
&& (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
{
- store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (args[argnum]));
+ store_unsigned_integer (valbuf, 4, byte_order,
+ value_address (args[argnum]));
typecode = TYPE_CODE_PTR;
len = 4;
val = valbuf;
}
else if (len < 4)
{
- /* value gets right-justified in the register or stack word */
+ /* Value gets right-justified in the register or stack word. */
memcpy (valbuf + (register_size (gdbarch, argreg) - len),
(gdb_byte *) value_contents (args[argnum]), len);
val = valbuf;
{
if (argreg > ARGN_REGNUM)
{
- /* must go on the stack */
+ /* Must go on the stack. */
write_memory (sp + stack_offset, val, 4);
stack_offset += 4;
}
else if (argreg <= ARGN_REGNUM)
{
- /* there's room in a register */
+ /* There's room in a register. */
regval =
extract_unsigned_integer (val,
- register_size (gdbarch, argreg));
+ register_size (gdbarch, argreg),
+ byte_order);
regcache_cooked_write_unsigned (regcache, argreg++, regval);
}
static void
m32r_extract_return_value (struct type *type, struct regcache *regcache,
- void *dst)
+ gdb_byte *dst)
{
- bfd_byte *valbuf = dst;
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int len = TYPE_LENGTH (type);
ULONGEST tmp;
/* By using store_unsigned_integer we avoid having to do
anything special for small big-endian values. */
regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp);
- store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), tmp);
+ store_unsigned_integer (dst, (len > 4 ? len - 4 : len), byte_order, tmp);
/* Ignore return values more than 8 bytes in size because the m32r
- returns anything more than 8 bytes in the stack. */
+ returns anything more than 8 bytes in the stack. */
if (len > 4)
{
regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp);
- store_unsigned_integer (valbuf + len - 4, 4, tmp);
+ store_unsigned_integer (dst + len - 4, 4, byte_order, tmp);
}
}
static enum return_value_convention
-m32r_return_value (struct gdbarch *gdbarch, struct type *func_type,
+m32r_return_value (struct gdbarch *gdbarch, struct value *function,
struct type *valtype, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
= m32r_frame_unwind_cache (this_frame, this_prologue_cache);
CORE_ADDR base;
CORE_ADDR func;
- struct minimal_symbol *msym_stack;
+ struct bound_minimal_symbol msym_stack;
struct frame_id id;
/* The FUNC is easy. */
/* Check if the stack is empty. */
msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
- if (msym_stack && info->base == SYMBOL_VALUE_ADDRESS (msym_stack))
+ if (msym_stack.minsym && info->base == BMSYMBOL_VALUE_ADDRESS (msym_stack))
return;
/* Hopefully the prologue analysis either correctly determined the
static const struct frame_unwind m32r_frame_unwind = {
NORMAL_FRAME,
+ default_frame_unwind_stop_reason,
m32r_frame_this_id,
m32r_frame_prev_register,
NULL,
return arches->gdbarch;
/* Allocate space for the new architecture. */
- tdep = XMALLOC (struct gdbarch_tdep);
+ tdep = XNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
set_gdbarch_read_pc (gdbarch, m32r_read_pc);
- set_gdbarch_write_pc (gdbarch, m32r_write_pc);
set_gdbarch_unwind_sp (gdbarch, m32r_unwind_sp);
set_gdbarch_num_regs (gdbarch, M32R_NUM_REGS);
+ set_gdbarch_pc_regnum (gdbarch, M32R_PC_REGNUM);
set_gdbarch_sp_regnum (gdbarch, M32R_SP_REGNUM);
set_gdbarch_register_name (gdbarch, m32r_register_name);
set_gdbarch_register_type (gdbarch, m32r_register_type);